Merge tag 'topic/drm-fixes-2015-11-11' of git://anongit.freedesktop.org/drm-intel...
[deliverable/linux.git] / arch / arm64 / kernel / setup.c
CommitLineData
9703d9d7
CM
1/*
2 * Based on arch/arm/kernel/setup.c
3 *
4 * Copyright (C) 1995-2001 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
37655163 20#include <linux/acpi.h>
9703d9d7
CM
21#include <linux/export.h>
22#include <linux/kernel.h>
23#include <linux/stddef.h>
24#include <linux/ioport.h>
25#include <linux/delay.h>
26#include <linux/utsname.h>
27#include <linux/initrd.h>
28#include <linux/console.h>
a41dc0e8 29#include <linux/cache.h>
9703d9d7 30#include <linux/bootmem.h>
9703d9d7
CM
31#include <linux/screen_info.h>
32#include <linux/init.h>
33#include <linux/kexec.h>
34#include <linux/crash_dump.h>
35#include <linux/root_dev.h>
36#include <linux/cpu.h>
37#include <linux/interrupt.h>
38#include <linux/smp.h>
39#include <linux/fs.h>
40#include <linux/proc_fs.h>
41#include <linux/memblock.h>
78d51e0b 42#include <linux/of_iommu.h>
9703d9d7 43#include <linux/of_fdt.h>
d6bafb9b 44#include <linux/of_platform.h>
f84d0275 45#include <linux/efi.h>
bff60792 46#include <linux/psci.h>
9703d9d7 47
37655163 48#include <asm/acpi.h>
bf4b558e 49#include <asm/fixmap.h>
df857416 50#include <asm/cpu.h>
9703d9d7
CM
51#include <asm/cputype.h>
52#include <asm/elf.h>
930da09f 53#include <asm/cpufeature.h>
e8765b26 54#include <asm/cpu_ops.h>
39d114dd 55#include <asm/kasan.h>
9703d9d7
CM
56#include <asm/sections.h>
57#include <asm/setup.h>
4c7aa002 58#include <asm/smp_plat.h>
9703d9d7
CM
59#include <asm/cacheflush.h>
60#include <asm/tlbflush.h>
61#include <asm/traps.h>
62#include <asm/memblock.h>
f84d0275 63#include <asm/efi.h>
5882bfef 64#include <asm/xen/hypervisor.h>
9703d9d7 65
9703d9d7
CM
66phys_addr_t __fdt_pointer __initdata;
67
68/*
69 * Standard memory resources
70 */
71static struct resource mem_res[] = {
72 {
73 .name = "Kernel code",
74 .start = 0,
75 .end = 0,
76 .flags = IORESOURCE_MEM
77 },
78 {
79 .name = "Kernel data",
80 .start = 0,
81 .end = 0,
82 .flags = IORESOURCE_MEM
83 }
84};
85
86#define kernel_code mem_res[0]
87#define kernel_data mem_res[1]
88
da9c177d
AB
89/*
90 * The recorded values of x0 .. x3 upon kernel entry.
91 */
92u64 __cacheline_aligned boot_args[4];
93
71586276
WD
94void __init smp_setup_processor_id(void)
95{
80708677
MR
96 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
97 cpu_logical_map(0) = mpidr;
98
71586276
WD
99 /*
100 * clear __my_cpu_offset on boot CPU to avoid hang caused by
101 * using percpu variable early, for example, lockdep will
102 * access percpu variable inside lock_release
103 */
104 set_my_cpu_offset(0);
80708677 105 pr_info("Booting Linux on physical CPU 0x%lx\n", (unsigned long)mpidr);
71586276
WD
106}
107
6e15d0e0
SK
108bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
109{
110 return phys_id == cpu_logical_map(cpu);
111}
112
976d7d3f 113struct mpidr_hash mpidr_hash;
976d7d3f
LP
114/**
115 * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
116 * level in order to build a linear index from an
117 * MPIDR value. Resulting algorithm is a collision
118 * free hash carried out through shifting and ORing
119 */
120static void __init smp_build_mpidr_hash(void)
121{
122 u32 i, affinity, fs[4], bits[4], ls;
123 u64 mask = 0;
124 /*
125 * Pre-scan the list of MPIDRS and filter out bits that do
126 * not contribute to affinity levels, ie they never toggle.
127 */
128 for_each_possible_cpu(i)
129 mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
130 pr_debug("mask of set bits %#llx\n", mask);
131 /*
132 * Find and stash the last and first bit set at all affinity levels to
133 * check how many bits are required to represent them.
134 */
135 for (i = 0; i < 4; i++) {
136 affinity = MPIDR_AFFINITY_LEVEL(mask, i);
137 /*
138 * Find the MSB bit and LSB bits position
139 * to determine how many bits are required
140 * to express the affinity level.
141 */
142 ls = fls(affinity);
143 fs[i] = affinity ? ffs(affinity) - 1 : 0;
144 bits[i] = ls - fs[i];
145 }
146 /*
147 * An index can be created from the MPIDR_EL1 by isolating the
148 * significant bits at each affinity level and by shifting
149 * them in order to compress the 32 bits values space to a
150 * compressed set of values. This is equivalent to hashing
151 * the MPIDR_EL1 through shifting and ORing. It is a collision free
152 * hash though not minimal since some levels might contain a number
153 * of CPUs that is not an exact power of 2 and their bit
154 * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}.
155 */
156 mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
157 mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
158 mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
159 (bits[1] + bits[0]);
160 mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
161 fs[3] - (bits[2] + bits[1] + bits[0]);
162 mpidr_hash.mask = mask;
163 mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
164 pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n",
165 mpidr_hash.shift_aff[0],
166 mpidr_hash.shift_aff[1],
167 mpidr_hash.shift_aff[2],
168 mpidr_hash.shift_aff[3],
169 mpidr_hash.mask,
170 mpidr_hash.bits);
171 /*
172 * 4x is an arbitrary value used to warn on a hash table much bigger
173 * than expected on most systems.
174 */
175 if (mpidr_hash_size() > 4 * num_possible_cpus())
176 pr_warn("Large number of MPIDR hash buckets detected\n");
177 __flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash));
178}
137650aa 179
9703d9d7
CM
180static void __init setup_machine_fdt(phys_addr_t dt_phys)
181{
61bd93ce
AB
182 void *dt_virt = fixmap_remap_fdt(dt_phys);
183
184 if (!dt_virt || !early_init_dt_scan(dt_virt)) {
185 pr_crit("\n"
186 "Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n"
187 "The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
188 "\nPlease check your bootloader.",
189 &dt_phys, dt_virt);
9703d9d7
CM
190
191 while (true)
192 cpu_relax();
193 }
5e39977e 194
44b82b77 195 dump_stack_set_arch_desc("%s (DT)", of_flat_dt_get_machine_name());
9703d9d7
CM
196}
197
9703d9d7
CM
198static void __init request_standard_resources(void)
199{
200 struct memblock_region *region;
201 struct resource *res;
202
203 kernel_code.start = virt_to_phys(_text);
204 kernel_code.end = virt_to_phys(_etext - 1);
205 kernel_data.start = virt_to_phys(_sdata);
206 kernel_data.end = virt_to_phys(_end - 1);
207
208 for_each_memblock(memory, region) {
209 res = alloc_bootmem_low(sizeof(*res));
210 res->name = "System RAM";
211 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
212 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
213 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
214
215 request_resource(&iomem_resource, res);
216
217 if (kernel_code.start >= res->start &&
218 kernel_code.end <= res->end)
219 request_resource(res, &kernel_code);
220 if (kernel_data.start >= res->start &&
221 kernel_data.end <= res->end)
222 request_resource(res, &kernel_data);
223 }
224}
225
1570f0d7
MS
226#ifdef CONFIG_BLK_DEV_INITRD
227/*
228 * Relocate initrd if it is not completely within the linear mapping.
229 * This would be the case if mem= cuts out all or part of it.
230 */
231static void __init relocate_initrd(void)
232{
233 phys_addr_t orig_start = __virt_to_phys(initrd_start);
234 phys_addr_t orig_end = __virt_to_phys(initrd_end);
235 phys_addr_t ram_end = memblock_end_of_DRAM();
236 phys_addr_t new_start;
237 unsigned long size, to_free = 0;
238 void *dest;
239
240 if (orig_end <= ram_end)
241 return;
242
243 /*
244 * Any of the original initrd which overlaps the linear map should
245 * be freed after relocating.
246 */
247 if (orig_start < ram_end)
248 to_free = ram_end - orig_start;
249
250 size = orig_end - orig_start;
4ca3bc86
MR
251 if (!size)
252 return;
1570f0d7
MS
253
254 /* initrd needs to be relocated completely inside linear mapping */
255 new_start = memblock_find_in_range(0, PFN_PHYS(max_pfn),
256 size, PAGE_SIZE);
257 if (!new_start)
258 panic("Cannot relocate initrd of size %ld\n", size);
259 memblock_reserve(new_start, size);
260
261 initrd_start = __phys_to_virt(new_start);
262 initrd_end = initrd_start + size;
263
264 pr_info("Moving initrd from [%llx-%llx] to [%llx-%llx]\n",
265 orig_start, orig_start + size - 1,
266 new_start, new_start + size - 1);
267
268 dest = (void *)initrd_start;
269
270 if (to_free) {
271 memcpy(dest, (void *)__phys_to_virt(orig_start), to_free);
272 dest += to_free;
273 }
274
275 copy_from_early_mem(dest, orig_start + to_free, size - to_free);
276
277 if (to_free) {
278 pr_info("Freeing original RAMDISK from [%llx-%llx]\n",
279 orig_start, orig_start + to_free - 1);
280 memblock_free(orig_start, to_free);
281 }
282}
283#else
284static inline void __init relocate_initrd(void)
285{
286}
287#endif
288
4c7aa002
JM
289u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
290
9703d9d7
CM
291void __init setup_arch(char **cmdline_p)
292{
4b998ff1 293 pr_info("Boot CPU: AArch64 Processor [%08x]\n", read_cpuid_id());
9703d9d7 294
4b998ff1 295 sprintf(init_utsname()->machine, ELF_PLATFORM);
9703d9d7
CM
296 init_mm.start_code = (unsigned long) _text;
297 init_mm.end_code = (unsigned long) _etext;
298 init_mm.end_data = (unsigned long) _edata;
299 init_mm.brk = (unsigned long) _end;
300
301 *cmdline_p = boot_command_line;
302
af86e597 303 early_fixmap_init();
bf4b558e 304 early_ioremap_init();
0bf757c7 305
61bd93ce
AB
306 setup_machine_fdt(__fdt_pointer);
307
9703d9d7
CM
308 parse_early_param();
309
7a9c43be
JM
310 /*
311 * Unmask asynchronous aborts after bringing up possible earlycon.
312 * (Report possible System Errors once we can report this occurred)
313 */
314 local_async_enable();
315
f84d0275 316 efi_init();
9703d9d7
CM
317 arm64_memblock_init();
318
37655163
AS
319 /* Parse the ACPI tables for possible boot-time configuration */
320 acpi_boot_table_init();
321
9703d9d7 322 paging_init();
1570f0d7 323 relocate_initrd();
39d114dd
AR
324
325 kasan_init();
326
9703d9d7
CM
327 request_standard_resources();
328
0e63ea48 329 early_ioremap_reset();
f84d0275 330
fb094eb1 331 if (acpi_disabled) {
3505f30f 332 unflatten_device_tree();
7c59a3df
GG
333 psci_dt_init();
334 } else {
335 psci_acpi_init();
336 }
5882bfef 337 xen_early_init();
e790f1de 338
0f078336 339 cpu_read_bootcpu_ops();
0f078336 340 smp_init_cpus();
976d7d3f 341 smp_build_mpidr_hash();
9703d9d7
CM
342
343#ifdef CONFIG_VT
344#if defined(CONFIG_VGA_CONSOLE)
345 conswitchp = &vga_con;
346#elif defined(CONFIG_DUMMY_CONSOLE)
347 conswitchp = &dummy_con;
348#endif
349#endif
da9c177d
AB
350 if (boot_args[1] || boot_args[2] || boot_args[3]) {
351 pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
352 "\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n"
353 "This indicates a broken bootloader or old kernel\n",
354 boot_args[1], boot_args[2], boot_args[3]);
355 }
9703d9d7
CM
356}
357
c560ecfe 358static int __init arm64_device_init(void)
de79a64d 359{
e094d445
SH
360 if (of_have_populated_dt()) {
361 of_iommu_init();
362 of_platform_populate(NULL, of_default_bus_match_table,
363 NULL, NULL);
364 } else if (acpi_disabled) {
365 pr_crit("Device tree not populated\n");
366 }
de79a64d
CM
367 return 0;
368}
6ecba8eb 369arch_initcall_sync(arm64_device_init);
de79a64d 370
9703d9d7
CM
371static int __init topology_init(void)
372{
373 int i;
374
375 for_each_possible_cpu(i) {
df857416 376 struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
9703d9d7
CM
377 cpu->hotpluggable = 1;
378 register_cpu(cpu, i);
379 }
380
381 return 0;
382}
383subsys_initcall(topology_init);
This page took 0.24455 seconds and 5 git commands to generate.