[deliverable/linux.git] / arch / arm64 / kvm / reset.c

/*
 * Copyright (C) 2012,2013 - ARM Ltd
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 *
 * Derived from arch/arm/kvm/reset.c
 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/errno.h>
#include <linux/kvm_host.h>
#include <linux/kvm.h>
#include <linux/hw_breakpoint.h>

#include <kvm/arm_arch_timer.h>

#include <asm/cputype.h>
#include <asm/ptrace.h>
#include <asm/kvm_arm.h>
#include <asm/kvm_asm.h>
#include <asm/kvm_coproc.h>
#include <asm/kvm_mmu.h>

/*
 * ARMv8 Reset Values
 */
static const struct kvm_regs default_regs_reset = {
	.regs.pstate = (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT |
			PSR_F_BIT | PSR_D_BIT),
};

static const struct kvm_regs default_regs_reset32 = {
	.regs.pstate = (COMPAT_PSR_MODE_SVC | COMPAT_PSR_A_BIT |
			COMPAT_PSR_I_BIT | COMPAT_PSR_F_BIT),
};

static const struct kvm_irq_level default_vtimer_irq = {
	.irq	= 27,
	.level	= 1,
};

static bool cpu_has_32bit_el1(void)
{
	u64 pfr0;

	pfr0 = read_system_reg(SYS_ID_AA64PFR0_EL1);
	return !!(pfr0 & 0x20);
}

/**
 * kvm_arch_dev_ioctl_check_extension
 *
 * We currently assume that the number of HW registers is uniform
 * across all CPUs (see cpuinfo_sanity_check).
 */
int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
{
	int r;

	switch (ext) {
	case KVM_CAP_ARM_EL1_32BIT:
		r = cpu_has_32bit_el1();
		break;
	case KVM_CAP_GUEST_DEBUG_HW_BPS:
		r = get_num_brps();
		break;
	case KVM_CAP_GUEST_DEBUG_HW_WPS:
		r = get_num_wrps();
		break;
	case KVM_CAP_ARM_PMU_V3:
		r = kvm_arm_support_pmu_v3();
		break;
	case KVM_CAP_SET_GUEST_DEBUG:
	case KVM_CAP_VCPU_ATTRIBUTES:
		r = 1;
		break;
	case KVM_CAP_MSI_DEVID:
		if (!kvm)
			r = -EINVAL;
		else
			r = kvm->arch.vgic.msis_require_devid;
		break;
	default:
		r = 0;
	}

	return r;
}

/**
 * kvm_reset_vcpu - sets core registers and sys_regs to reset value
 * @vcpu: The VCPU pointer
 *
 * This function finds the right table above and sets the registers on
 * the virtual CPU struct to their architecturally defined reset
 * values.
 */
int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
{
	const struct kvm_irq_level *cpu_vtimer_irq;
	const struct kvm_regs *cpu_reset;

	switch (vcpu->arch.target) {
	default:
		if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) {
			if (!cpu_has_32bit_el1())
				return -EINVAL;
			cpu_reset = &default_regs_reset32;
		} else {
			cpu_reset = &default_regs_reset;
		}

		cpu_vtimer_irq = &default_vtimer_irq;
		break;
	}

	/* Reset core registers */
	memcpy(vcpu_gp_regs(vcpu), cpu_reset, sizeof(*cpu_reset));

	/* Reset system registers */
	kvm_reset_sys_regs(vcpu);

	/* Reset PMU */
	kvm_pmu_vcpu_reset(vcpu);

	/* Reset timer */
	return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq);
}
Commit	Line	Data
f4672752 MZ	1	/*
	2	* Copyright (C) 2012,2013 - ARM Ltd
	3	* Author: Marc Zyngier <marc.zyngier@arm.com>
	4	*
	5	* Derived from arch/arm/kvm/reset.c
	6	* Copyright (C) 2012 - Virtual Open Systems and Columbia University
	7	* Author: Christoffer Dall <c.dall@virtualopensystems.com>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License, version 2, as
	11	* published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
	22	#include <linux/errno.h>
	23	#include <linux/kvm_host.h>
	24	#include <linux/kvm.h>
834bf887	25	#include <linux/hw_breakpoint.h>
f4672752	26
003300de MZ	27	#include <kvm/arm_arch_timer.h>
003300de MZ	28
f4672752 MZ	29	#include <asm/cputype.h>
	30	#include <asm/ptrace.h>
	31	#include <asm/kvm_arm.h>
67f69197	32	#include <asm/kvm_asm.h>
f4672752	33	#include <asm/kvm_coproc.h>
67f69197	34	#include <asm/kvm_mmu.h>
f4672752 MZ	35
	36	/*
	37	* ARMv8 Reset Values
	38	*/
	39	static const struct kvm_regs default_regs_reset = {
	40	.regs.pstate = (PSR_MODE_EL1h \| PSR_A_BIT \| PSR_I_BIT \|
	41	PSR_F_BIT \| PSR_D_BIT),
	42	};
	43
0d854a60 MZ	44	static const struct kvm_regs default_regs_reset32 = {
	45	.regs.pstate = (COMPAT_PSR_MODE_SVC \| COMPAT_PSR_A_BIT \|
	46	COMPAT_PSR_I_BIT \| COMPAT_PSR_F_BIT),
	47	};
	48
003300de MZ	49	static const struct kvm_irq_level default_vtimer_irq = {
	50	.irq = 27,
	51	.level = 1,
	52	};
	53
0d854a60 MZ	54	static bool cpu_has_32bit_el1(void)
	55	{
	56	u64 pfr0;
	57
4db8e5ea	58	pfr0 = read_system_reg(SYS_ID_AA64PFR0_EL1);
0d854a60 MZ	59	return !!(pfr0 & 0x20);
	60	}
	61
834bf887 AB	62	/**
	63	* kvm_arch_dev_ioctl_check_extension
	64	*
	65	* We currently assume that the number of HW registers is uniform
	66	* across all CPUs (see cpuinfo_sanity_check).
	67	*/
b46f01ce	68	int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
f4672752 MZ	69	{
	70	int r;
	71
	72	switch (ext) {
0d854a60 MZ	73	case KVM_CAP_ARM_EL1_32BIT:
	74	r = cpu_has_32bit_el1();
	75	break;
834bf887 AB	76	case KVM_CAP_GUEST_DEBUG_HW_BPS:
	77	r = get_num_brps();
	78	break;
	79	case KVM_CAP_GUEST_DEBUG_HW_WPS:
	80	r = get_num_wrps();
	81	break;
808e7381 SZ	82	case KVM_CAP_ARM_PMU_V3:
	83	r = kvm_arm_support_pmu_v3();
	84	break;
834bf887	85	case KVM_CAP_SET_GUEST_DEBUG:
f577f6c2	86	case KVM_CAP_VCPU_ATTRIBUTES:
834bf887 AB	87	r = 1;
834bf887 AB	88	break;
0e4e82f1 AP	89	case KVM_CAP_MSI_DEVID:
	90	if (!kvm)
	91	r = -EINVAL;
	92	else
	93	r = kvm->arch.vgic.msis_require_devid;
	94	break;
f4672752 MZ	95	default:
	96	r = 0;
	97	}
	98
	99	return r;
	100	}
	101
	102	/**
	103	* kvm_reset_vcpu - sets core registers and sys_regs to reset value
	104	* @vcpu: The VCPU pointer
	105	*
	106	* This function finds the right table above and sets the registers on
edce2292	107	* the virtual CPU struct to their architecturally defined reset
f4672752 MZ	108	* values.
	109	*/
	110	int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
	111	{
003300de	112	const struct kvm_irq_level *cpu_vtimer_irq;
f4672752 MZ	113	const struct kvm_regs *cpu_reset;
	114
	115	switch (vcpu->arch.target) {
	116	default:
0d854a60 MZ	117	if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) {
	118	if (!cpu_has_32bit_el1())
	119	return -EINVAL;
	120	cpu_reset = &default_regs_reset32;
0d854a60 MZ	121	} else {
	122	cpu_reset = &default_regs_reset;
	123	}
	124
003300de	125	cpu_vtimer_irq = &default_vtimer_irq;
f4672752 MZ	126	break;
	127	}
	128
	129	/* Reset core registers */
	130	memcpy(vcpu_gp_regs(vcpu), cpu_reset, sizeof(*cpu_reset));
	131
	132	/* Reset system registers */
	133	kvm_reset_sys_regs(vcpu);
	134
2aa36e98 SZ	135	/* Reset PMU */
	136	kvm_pmu_vcpu_reset(vcpu);
	137
003300de	138	/* Reset timer */
f120cd65	139	return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq);
f4672752	140	}