[deliverable/linux.git] / arch / avr32 / include / asm / processor.h

/*
 * Copyright (C) 2004-2006 Atmel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#ifndef __ASM_AVR32_PROCESSOR_H
#define __ASM_AVR32_PROCESSOR_H

#include <asm/page.h>
#include <asm/cache.h>

#define TASK_SIZE	0x80000000

#ifdef __KERNEL__
#define STACK_TOP	TASK_SIZE
#define STACK_TOP_MAX	STACK_TOP
#endif

#ifndef __ASSEMBLY__

static inline void *current_text_addr(void)
{
	register void *pc asm("pc");
	return pc;
}

enum arch_type {
	ARCH_AVR32A,
	ARCH_AVR32B,
	ARCH_MAX
};

enum cpu_type {
	CPU_MORGAN,
	CPU_AT32AP,
	CPU_MAX
};

enum tlb_config {
	TLB_NONE,
	TLB_SPLIT,
	TLB_UNIFIED,
	TLB_INVALID
};

#define AVR32_FEATURE_RMW	(1 << 0)
#define AVR32_FEATURE_DSP	(1 << 1)
#define AVR32_FEATURE_SIMD	(1 << 2)
#define AVR32_FEATURE_OCD	(1 << 3)
#define AVR32_FEATURE_PCTR	(1 << 4)
#define AVR32_FEATURE_JAVA	(1 << 5)
#define AVR32_FEATURE_FPU	(1 << 6)

struct avr32_cpuinfo {
	struct clk *clk;
	unsigned long loops_per_jiffy;
	enum arch_type arch_type;
	enum cpu_type cpu_type;
	unsigned short arch_revision;
	unsigned short cpu_revision;
	enum tlb_config tlb_config;
	unsigned long features;
	u32 device_id;

	struct cache_info icache;
	struct cache_info dcache;
};

static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
{
	return (cpu->device_id >> 1) & 0x7f;
}
static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
{
	return (cpu->device_id >> 12) & 0xffff;
}
static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
{
	return (cpu->device_id >> 28) & 0x0f;
}

extern struct avr32_cpuinfo boot_cpu_data;

/* No SMP support so far */
#define current_cpu_data boot_cpu_data

/* This decides where the kernel will search for a free chunk of vm
 * space during mmap's
 */
#define TASK_UNMAPPED_BASE	(PAGE_ALIGN(TASK_SIZE / 3))

#define cpu_relax()		barrier()
#define cpu_sync_pipeline()	asm volatile("sub pc, -2" : : : "memory")

struct cpu_context {
	unsigned long sr;
	unsigned long pc;
	unsigned long ksp;	/* Kernel stack pointer */
	unsigned long r7;
	unsigned long r6;
	unsigned long r5;
	unsigned long r4;
	unsigned long r3;
	unsigned long r2;
	unsigned long r1;
	unsigned long r0;
};

/* This struct contains the CPU context as stored by switch_to() */
struct thread_struct {
	struct cpu_context cpu_context;
	unsigned long single_step_addr;
	u16 single_step_insn;
};

#define INIT_THREAD {						\
	.cpu_context = {					\
		.ksp = sizeof(init_stack) + (long)&init_stack,	\
	},							\
}

/*
 * Do necessary setup to start up a newly executed thread.
 */
#define start_thread(regs, new_pc, new_sp)	 \
	do {					 \
		memset(regs, 0, sizeof(*regs));	 \
		regs->sr = MODE_USER;		 \
		regs->pc = new_pc & ~1;		 \
		regs->sp = new_sp;		 \
	} while(0)

struct task_struct;

/* Free all resources held by a thread */
extern void release_thread(struct task_struct *);

/* Return saved PC of a blocked thread */
#define thread_saved_pc(tsk)    ((tsk)->thread.cpu_context.pc)

struct pt_regs;
extern unsigned long get_wchan(struct task_struct *p);
extern void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl);
extern void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
			       struct pt_regs *regs, const char *log_lvl);

#define task_pt_regs(p) \
	((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)

#define KSTK_EIP(tsk)	((tsk)->thread.cpu_context.pc)
#define KSTK_ESP(tsk)	((tsk)->thread.cpu_context.ksp)

#define ARCH_HAS_PREFETCH

static inline void prefetch(const void *x)
{
	const char *c = x;
	asm volatile("pref %0" : : "r"(c));
}
#define PREFETCH_STRIDE	L1_CACHE_BYTES

#endif /* __ASSEMBLY__ */

#endif /* __ASM_AVR32_PROCESSOR_H */
Commit	Line	Data
5f97f7f9 HS	1	/*
	2	* Copyright (C) 2004-2006 Atmel Corporation
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8	#ifndef __ASM_AVR32_PROCESSOR_H
	9	#define __ASM_AVR32_PROCESSOR_H
	10
	11	#include <asm/page.h>
	12	#include <asm/cache.h>
	13
	14	#define TASK_SIZE 0x80000000
	15
922a70d3 DH	16	#ifdef __KERNEL__
	17	#define STACK_TOP TASK_SIZE
	18	#define STACK_TOP_MAX STACK_TOP
	19	#endif
	20
5f97f7f9 HS	21	#ifndef __ASSEMBLY__
	22
	23	static inline void *current_text_addr(void)
	24	{
	25	register void *pc asm("pc");
	26	return pc;
	27	}
	28
	29	enum arch_type {
	30	ARCH_AVR32A,
	31	ARCH_AVR32B,
	32	ARCH_MAX
	33	};
	34
	35	enum cpu_type {
	36	CPU_MORGAN,
	37	CPU_AT32AP,
	38	CPU_MAX
	39	};
	40
	41	enum tlb_config {
	42	TLB_NONE,
	43	TLB_SPLIT,
	44	TLB_UNIFIED,
	45	TLB_INVALID
	46	};
	47
3b328c98 HS	48	#define AVR32_FEATURE_RMW (1 << 0)
	49	#define AVR32_FEATURE_DSP (1 << 1)
	50	#define AVR32_FEATURE_SIMD (1 << 2)
	51	#define AVR32_FEATURE_OCD (1 << 3)
	52	#define AVR32_FEATURE_PCTR (1 << 4)
	53	#define AVR32_FEATURE_JAVA (1 << 5)
	54	#define AVR32_FEATURE_FPU (1 << 6)
	55
5f97f7f9 HS	56	struct avr32_cpuinfo {
	57	struct clk *clk;
	58	unsigned long loops_per_jiffy;
	59	enum arch_type arch_type;
	60	enum cpu_type cpu_type;
	61	unsigned short arch_revision;
	62	unsigned short cpu_revision;
	63	enum tlb_config tlb_config;
3b328c98	64	unsigned long features;
281ef58c	65	u32 device_id;
5f97f7f9 HS	66
	67	struct cache_info icache;
	68	struct cache_info dcache;
	69	};
	70
281ef58c HS	71	static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
	72	{
	73	return (cpu->device_id >> 1) & 0x7f;
	74	}
	75	static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
	76	{
	77	return (cpu->device_id >> 12) & 0xffff;
	78	}
	79	static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
	80	{
	81	return (cpu->device_id >> 28) & 0x0f;
	82	}
	83
5f97f7f9 HS	84	extern struct avr32_cpuinfo boot_cpu_data;
5f97f7f9 HS	85
8acc8722	86	/* No SMP support so far */
5f97f7f9	87	#define current_cpu_data boot_cpu_data
5f97f7f9 HS	88
	89	/* This decides where the kernel will search for a free chunk of vm
	90	* space during mmap's
	91	*/
	92	#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
	93
	94	#define cpu_relax() barrier()
	95	#define cpu_sync_pipeline() asm volatile("sub pc, -2" : : : "memory")
	96
	97	struct cpu_context {
	98	unsigned long sr;
	99	unsigned long pc;
	100	unsigned long ksp; /* Kernel stack pointer */
	101	unsigned long r7;
	102	unsigned long r6;
	103	unsigned long r5;
	104	unsigned long r4;
	105	unsigned long r3;
	106	unsigned long r2;
	107	unsigned long r1;
	108	unsigned long r0;
	109	};
	110
	111	/* This struct contains the CPU context as stored by switch_to() */
	112	struct thread_struct {
	113	struct cpu_context cpu_context;
	114	unsigned long single_step_addr;
	115	u16 single_step_insn;
	116	};
	117
	118	#define INIT_THREAD { \
	119	.cpu_context = { \
	120	.ksp = sizeof(init_stack) + (long)&init_stack, \
	121	}, \
	122	}
	123
	124	/*
	125	* Do necessary setup to start up a newly executed thread.
	126	*/
	127	#define start_thread(regs, new_pc, new_sp) \
	128	do { \
5f97f7f9 HS	129	memset(regs, 0, sizeof(*regs)); \
	130	regs->sr = MODE_USER; \
	131	regs->pc = new_pc & ~1; \
	132	regs->sp = new_sp; \
	133	} while(0)
	134
	135	struct task_struct;
	136
	137	/* Free all resources held by a thread */
	138	extern void release_thread(struct task_struct *);
	139
5f97f7f9 HS	140	/* Return saved PC of a blocked thread */
	141	#define thread_saved_pc(tsk) ((tsk)->thread.cpu_context.pc)
	142
	143	struct pt_regs;
5f97f7f9	144	extern unsigned long get_wchan(struct task_struct *p);
623b0355 HS	145	extern void show_regs_log_lvl(struct pt_regs regs, const char log_lvl);
	146	extern void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
	147	struct pt_regs regs, const char log_lvl);
5f97f7f9	148
2507bc13 HS	149	#define task_pt_regs(p) \
	150	((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
	151
5f97f7f9 HS	152	#define KSTK_EIP(tsk) ((tsk)->thread.cpu_context.pc)
	153	#define KSTK_ESP(tsk) ((tsk)->thread.cpu_context.ksp)
	154
	155	#define ARCH_HAS_PREFETCH
	156
	157	static inline void prefetch(const void *x)
	158	{
	159	const char *c = x;
	160	asm volatile("pref %0" : : "r"(c));
	161	}
	162	#define PREFETCH_STRIDE L1_CACHE_BYTES
	163
	164	#endif /* __ASSEMBLY__ */
	165
	166	#endif /* __ASM_AVR32_PROCESSOR_H */