[deliverable/linux.git] / arch / avr32 / mach-at32ap / clock.c

/*
 * Clock management for AT32AP CPUs
 *
 * Copyright (C) 2006 Atmel Corporation
 *
 * Based on arch/arm/mach-at91/clock.c
 *   Copyright (C) 2005 David Brownell
 *   Copyright (C) 2005 Ivan Kokshaysky
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/device.h>
#include <linux/string.h>
#include <linux/list.h>

#include <mach/chip.h>

#include "clock.h"

/* at32 clock list */
static LIST_HEAD(at32_clock_list);

static DEFINE_SPINLOCK(clk_lock);
static DEFINE_SPINLOCK(clk_list_lock);

void at32_clk_register(struct clk *clk)
{
	spin_lock(&clk_list_lock);
	/* add the new item to the end of the list */
	list_add_tail(&clk->list, &at32_clock_list);
	spin_unlock(&clk_list_lock);
}

static struct clk *__clk_get(struct device *dev, const char *id)
{
	struct clk *clk;

	list_for_each_entry(clk, &at32_clock_list, list) {
		if (clk->dev == dev && strcmp(id, clk->name) == 0) {
			return clk;
		}
	}

	return ERR_PTR(-ENOENT);
}

struct clk *clk_get(struct device *dev, const char *id)
{
	struct clk *clk;

	spin_lock(&clk_list_lock);
	clk = __clk_get(dev, id);
	spin_unlock(&clk_list_lock);

	return clk;
}

EXPORT_SYMBOL(clk_get);

void clk_put(struct clk *clk)
{
	/* clocks are static for now, we can't free them */
}
EXPORT_SYMBOL(clk_put);

static void __clk_enable(struct clk *clk)
{
	if (clk->parent)
		__clk_enable(clk->parent);
	if (clk->users++ == 0 && clk->mode)
		clk->mode(clk, 1);
}

int clk_enable(struct clk *clk)
{
	unsigned long flags;

	if (!clk)
		return 0;

	spin_lock_irqsave(&clk_lock, flags);
	__clk_enable(clk);
	spin_unlock_irqrestore(&clk_lock, flags);

	return 0;
}
EXPORT_SYMBOL(clk_enable);

static void __clk_disable(struct clk *clk)
{
	if (clk->users == 0) {
		printk(KERN_ERR "%s: mismatched disable\n", clk->name);
		WARN_ON(1);
		return;
	}

	if (--clk->users == 0 && clk->mode)
		clk->mode(clk, 0);
	if (clk->parent)
		__clk_disable(clk->parent);
}

void clk_disable(struct clk *clk)
{
	unsigned long flags;

	if (IS_ERR_OR_NULL(clk))
		return;

	spin_lock_irqsave(&clk_lock, flags);
	__clk_disable(clk);
	spin_unlock_irqrestore(&clk_lock, flags);
}
EXPORT_SYMBOL(clk_disable);

unsigned long clk_get_rate(struct clk *clk)
{
	unsigned long flags;
	unsigned long rate;

	if (!clk)
		return 0;

	spin_lock_irqsave(&clk_lock, flags);
	rate = clk->get_rate(clk);
	spin_unlock_irqrestore(&clk_lock, flags);

	return rate;
}
EXPORT_SYMBOL(clk_get_rate);

long clk_round_rate(struct clk *clk, unsigned long rate)
{
	unsigned long flags, actual_rate;

	if (!clk)
		return 0;

	if (!clk->set_rate)
		return -ENOSYS;

	spin_lock_irqsave(&clk_lock, flags);
	actual_rate = clk->set_rate(clk, rate, 0);
	spin_unlock_irqrestore(&clk_lock, flags);

	return actual_rate;
}
EXPORT_SYMBOL(clk_round_rate);

int clk_set_rate(struct clk *clk, unsigned long rate)
{
	unsigned long flags;
	long ret;

	if (!clk)
		return 0;

	if (!clk->set_rate)
		return -ENOSYS;

	spin_lock_irqsave(&clk_lock, flags);
	ret = clk->set_rate(clk, rate, 1);
	spin_unlock_irqrestore(&clk_lock, flags);

	return (ret < 0) ? ret : 0;
}
EXPORT_SYMBOL(clk_set_rate);

int clk_set_parent(struct clk *clk, struct clk *parent)
{
	unsigned long flags;
	int ret;

	if (!clk)
		return 0;

	if (!clk->set_parent)
		return -ENOSYS;

	spin_lock_irqsave(&clk_lock, flags);
	ret = clk->set_parent(clk, parent);
	spin_unlock_irqrestore(&clk_lock, flags);

	return ret;
}
EXPORT_SYMBOL(clk_set_parent);

struct clk *clk_get_parent(struct clk *clk)
{
	return !clk ? NULL : clk->parent;
}
EXPORT_SYMBOL(clk_get_parent);


#ifdef CONFIG_DEBUG_FS

/* /sys/kernel/debug/at32ap_clk */

#include <linux/io.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include "pm.h"


#define	NEST_DELTA	2
#define	NEST_MAX	6

struct clkinf {
	struct seq_file	*s;
	unsigned	nest;
};

static void
dump_clock(struct clk *parent, struct clkinf *r)
{
	unsigned	nest = r->nest;
	char		buf[16 + NEST_MAX];
	struct clk	*clk;
	unsigned	i;

	/* skip clocks coupled to devices that aren't registered */
	if (parent->dev && !dev_name(parent->dev) && !parent->users)
		return;

	/* <nest spaces> name <pad to end> */
	memset(buf, ' ', sizeof(buf) - 1);
	buf[sizeof(buf) - 1] = 0;
	i = strlen(parent->name);
	memcpy(buf + nest, parent->name,
			min(i, (unsigned)(sizeof(buf) - 1 - nest)));

	seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
		buf, parent->set_parent ? '*' : ' ',
		parent->users,
		parent->users ? "on" : "off",	/* NOTE: not-paranoid!! */
		clk_get_rate(parent));
	if (parent->dev)
		seq_printf(r->s, ", for %s", dev_name(parent->dev));
	seq_printf(r->s, "\n");

	/* cost of this scan is small, but not linear... */
	r->nest = nest + NEST_DELTA;

	list_for_each_entry(clk, &at32_clock_list, list) {
		if (clk->parent == parent)
			dump_clock(clk, r);
	}
	r->nest = nest;
}

static int clk_show(struct seq_file *s, void *unused)
{
	struct clkinf	r;
	int		i;
	struct clk 	*clk;

	/* show all the power manager registers */
	seq_printf(s, "MCCTRL  = %8x\n", pm_readl(MCCTRL));
	seq_printf(s, "CKSEL   = %8x\n", pm_readl(CKSEL));
	seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
	seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
	seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
	seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
	seq_printf(s, "PLL0    = %8x\n", pm_readl(PLL0));
	seq_printf(s, "PLL1    = %8x\n", pm_readl(PLL1));
	seq_printf(s, "IMR     = %8x\n", pm_readl(IMR));
	for (i = 0; i < 8; i++) {
		if (i == 5)
			continue;
		seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
	}

	seq_printf(s, "\n");

	r.s = s;
	r.nest = 0;
	/* protected from changes on the list while dumping */
	spin_lock(&clk_list_lock);

	/* show clock tree as derived from the three oscillators */
	clk = __clk_get(NULL, "osc32k");
	dump_clock(clk, &r);
	clk_put(clk);

	clk = __clk_get(NULL, "osc0");
	dump_clock(clk, &r);
	clk_put(clk);

	clk = __clk_get(NULL, "osc1");
	dump_clock(clk, &r);
	clk_put(clk);

	spin_unlock(&clk_list_lock);

	return 0;
}

static int clk_open(struct inode *inode, struct file *file)
{
	return single_open(file, clk_show, NULL);
}

static const struct file_operations clk_operations = {
	.open		= clk_open,
	.read		= seq_read,
	.llseek		= seq_lseek,
	.release	= single_release,
};

static int __init clk_debugfs_init(void)
{
	(void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
			NULL, NULL, &clk_operations);

	return 0;
}
postcore_initcall(clk_debugfs_init);

#endif
Commit	Line	Data
5f97f7f9 HS	1	/*
	2	* Clock management for AT32AP CPUs
	3	*
	4	* Copyright (C) 2006 Atmel Corporation
	5	*
9d041268	6	* Based on arch/arm/mach-at91/clock.c
5f97f7f9 HS	7	* Copyright (C) 2005 David Brownell
	8	* Copyright (C) 2005 Ivan Kokshaysky
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14	#include <linux/clk.h>
	15	#include <linux/err.h>
09cf6a29	16	#include <linux/export.h>
5f97f7f9 HS	17	#include <linux/device.h>
5f97f7f9 HS	18	#include <linux/string.h>
300bb762	19	#include <linux/list.h>
5f97f7f9	20
a8d902db HS	21	#include <mach/chip.h>
a8d902db HS	22
5f97f7f9 HS	23	#include "clock.h"
5f97f7f9 HS	24
300bb762 AR	25	/* at32 clock list */
	26	static LIST_HEAD(at32_clock_list);
	27
e89b064a	28	static DEFINE_SPINLOCK(clk_lock);
300bb762 AR	29	static DEFINE_SPINLOCK(clk_list_lock);
	30
	31	void at32_clk_register(struct clk *clk)
	32	{
	33	spin_lock(&clk_list_lock);
	34	/* add the new item to the end of the list */
	35	list_add_tail(&clk->list, &at32_clock_list);
	36	spin_unlock(&clk_list_lock);
	37	}
5f97f7f9	38
6e2ad511	39	static struct clk __clk_get(struct device dev, const char *id)
5f97f7f9	40	{
300bb762	41	struct clk *clk;
5f97f7f9	42
300bb762 AR	43	list_for_each_entry(clk, &at32_clock_list, list) {
300bb762 AR	44	if (clk->dev == dev && strcmp(id, clk->name) == 0) {
5f97f7f9	45	return clk;
300bb762	46	}
5f97f7f9 HS	47	}
	48
	49	return ERR_PTR(-ENOENT);
	50	}
6e2ad511 OHJ	51
	52	struct clk clk_get(struct device dev, const char *id)
	53	{
	54	struct clk *clk;
	55
	56	spin_lock(&clk_list_lock);
	57	clk = __clk_get(dev, id);
	58	spin_unlock(&clk_list_lock);
	59
	60	return clk;
	61	}
	62
5f97f7f9 HS	63	EXPORT_SYMBOL(clk_get);
	64
	65	void clk_put(struct clk *clk)
	66	{
	67	/* clocks are static for now, we can't free them */
	68	}
	69	EXPORT_SYMBOL(clk_put);
	70
	71	static void __clk_enable(struct clk *clk)
	72	{
	73	if (clk->parent)
	74	__clk_enable(clk->parent);
	75	if (clk->users++ == 0 && clk->mode)
	76	clk->mode(clk, 1);
	77	}
	78
	79	int clk_enable(struct clk *clk)
	80	{
	81	unsigned long flags;
	82
5c02a420 AS	83	if (!clk)
	84	return 0;
	85
5f97f7f9 HS	86	spin_lock_irqsave(&clk_lock, flags);
	87	__clk_enable(clk);
	88	spin_unlock_irqrestore(&clk_lock, flags);
	89
	90	return 0;
	91	}
	92	EXPORT_SYMBOL(clk_enable);
	93
	94	static void __clk_disable(struct clk *clk)
	95	{
23cebe22 HS	96	if (clk->users == 0) {
	97	printk(KERN_ERR "%s: mismatched disable\n", clk->name);
	98	WARN_ON(1);
	99	return;
	100	}
5f97f7f9 HS	101
	102	if (--clk->users == 0 && clk->mode)
	103	clk->mode(clk, 0);
	104	if (clk->parent)
	105	__clk_disable(clk->parent);
	106	}
	107
	108	void clk_disable(struct clk *clk)
	109	{
	110	unsigned long flags;
	111
5c02a420 AS	112	if (IS_ERR_OR_NULL(clk))
	113	return;
	114
5f97f7f9 HS	115	spin_lock_irqsave(&clk_lock, flags);
	116	__clk_disable(clk);
	117	spin_unlock_irqrestore(&clk_lock, flags);
	118	}
	119	EXPORT_SYMBOL(clk_disable);
	120
	121	unsigned long clk_get_rate(struct clk *clk)
	122	{
	123	unsigned long flags;
	124	unsigned long rate;
	125
5c02a420 AS	126	if (!clk)
	127	return 0;
	128
5f97f7f9 HS	129	spin_lock_irqsave(&clk_lock, flags);
	130	rate = clk->get_rate(clk);
	131	spin_unlock_irqrestore(&clk_lock, flags);
	132
	133	return rate;
	134	}
	135	EXPORT_SYMBOL(clk_get_rate);
	136
	137	long clk_round_rate(struct clk *clk, unsigned long rate)
	138	{
	139	unsigned long flags, actual_rate;
	140
5c02a420 AS	141	if (!clk)
	142	return 0;
	143
5f97f7f9 HS	144	if (!clk->set_rate)
	145	return -ENOSYS;
	146
	147	spin_lock_irqsave(&clk_lock, flags);
	148	actual_rate = clk->set_rate(clk, rate, 0);
	149	spin_unlock_irqrestore(&clk_lock, flags);
	150
	151	return actual_rate;
	152	}
	153	EXPORT_SYMBOL(clk_round_rate);
	154
	155	int clk_set_rate(struct clk *clk, unsigned long rate)
	156	{
	157	unsigned long flags;
	158	long ret;
	159
5c02a420 AS	160	if (!clk)
	161	return 0;
	162
5f97f7f9 HS	163	if (!clk->set_rate)
	164	return -ENOSYS;
	165
	166	spin_lock_irqsave(&clk_lock, flags);
	167	ret = clk->set_rate(clk, rate, 1);
	168	spin_unlock_irqrestore(&clk_lock, flags);
	169
	170	return (ret < 0) ? ret : 0;
	171	}
	172	EXPORT_SYMBOL(clk_set_rate);
	173
	174	int clk_set_parent(struct clk clk, struct clk parent)
	175	{
	176	unsigned long flags;
	177	int ret;
	178
5c02a420 AS	179	if (!clk)
	180	return 0;
	181
5f97f7f9 HS	182	if (!clk->set_parent)
	183	return -ENOSYS;
	184
	185	spin_lock_irqsave(&clk_lock, flags);
	186	ret = clk->set_parent(clk, parent);
	187	spin_unlock_irqrestore(&clk_lock, flags);
	188
	189	return ret;
	190	}
	191	EXPORT_SYMBOL(clk_set_parent);
	192
	193	struct clk clk_get_parent(struct clk clk)
	194	{
5c02a420	195	return !clk ? NULL : clk->parent;
5f97f7f9 HS	196	}
5f97f7f9 HS	197	EXPORT_SYMBOL(clk_get_parent);
d938b893 DB	198
	199
	200
	201	#ifdef CONFIG_DEBUG_FS
	202
	203	/* /sys/kernel/debug/at32ap_clk */
	204
	205	#include <linux/io.h>
	206	#include <linux/debugfs.h>
	207	#include <linux/seq_file.h>
	208	#include "pm.h"
	209
	210
	211	#define NEST_DELTA 2
	212	#define NEST_MAX 6
	213
	214	struct clkinf {
	215	struct seq_file *s;
	216	unsigned nest;
	217	};
	218
	219	static void
	220	dump_clock(struct clk parent, struct clkinf r)
	221	{
	222	unsigned nest = r->nest;
	223	char buf[16 + NEST_MAX];
	224	struct clk *clk;
	225	unsigned i;
	226
	227	/* skip clocks coupled to devices that aren't registered */
169539c8	228	if (parent->dev && !dev_name(parent->dev) && !parent->users)
d938b893 DB	229	return;
	230
	231	/* <nest spaces> name <pad to end> */
	232	memset(buf, ' ', sizeof(buf) - 1);
	233	buf[sizeof(buf) - 1] = 0;
	234	i = strlen(parent->name);
	235	memcpy(buf + nest, parent->name,
	236	min(i, (unsigned)(sizeof(buf) - 1 - nest)));
	237
	238	seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
	239	buf, parent->set_parent ? '*' : ' ',
	240	parent->users,
	241	parent->users ? "on" : "off", /* NOTE: not-paranoid!! */
	242	clk_get_rate(parent));
	243	if (parent->dev)
169539c8	244	seq_printf(r->s, ", for %s", dev_name(parent->dev));
d938b893 DB	245	seq_printf(r->s, "\n");
	246
	247	/* cost of this scan is small, but not linear... */
	248	r->nest = nest + NEST_DELTA;
300bb762 AR	249
300bb762 AR	250	list_for_each_entry(clk, &at32_clock_list, list) {
d938b893 DB	251	if (clk->parent == parent)
	252	dump_clock(clk, r);
	253	}
	254	r->nest = nest;
	255	}
	256
	257	static int clk_show(struct seq_file s, void unused)
	258	{
	259	struct clkinf r;
	260	int i;
300bb762	261	struct clk *clk;
d938b893 DB	262
	263	/* show all the power manager registers */
	264	seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL));
	265	seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL));
	266	seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
	267	seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
	268	seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
	269	seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
	270	seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0));
	271	seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1));
	272	seq_printf(s, "IMR = %8x\n", pm_readl(IMR));
	273	for (i = 0; i < 8; i++) {
	274	if (i == 5)
	275	continue;
	276	seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
	277	}
	278
	279	seq_printf(s, "\n");
	280
d938b893 DB	281	r.s = s;
d938b893 DB	282	r.nest = 0;
300bb762 AR	283	/* protected from changes on the list while dumping */
	284	spin_lock(&clk_list_lock);
	285
	286	/* show clock tree as derived from the three oscillators */
6e2ad511	287	clk = __clk_get(NULL, "osc32k");
300bb762 AR	288	dump_clock(clk, &r);
	289	clk_put(clk);
	290
6e2ad511	291	clk = __clk_get(NULL, "osc0");
300bb762 AR	292	dump_clock(clk, &r);
	293	clk_put(clk);
	294
6e2ad511	295	clk = __clk_get(NULL, "osc1");
300bb762 AR	296	dump_clock(clk, &r);
	297	clk_put(clk);
	298
	299	spin_unlock(&clk_list_lock);
d938b893 DB	300
	301	return 0;
	302	}
	303
	304	static int clk_open(struct inode inode, struct file file)
	305	{
	306	return single_open(file, clk_show, NULL);
	307	}
	308
	309	static const struct file_operations clk_operations = {
	310	.open = clk_open,
	311	.read = seq_read,
	312	.llseek = seq_lseek,
	313	.release = single_release,
	314	};
	315
	316	static int __init clk_debugfs_init(void)
	317	{
	318	(void) debugfs_create_file("at32ap_clk", S_IFREG \| S_IRUGO,
	319	NULL, NULL, &clk_operations);
	320
	321	return 0;
	322	}
	323	postcore_initcall(clk_debugfs_init);
	324
	325	#endif