Commit | Line | Data |
---|---|---|
1394f032 BW |
1 | # |
2 | # For a description of the syntax of this configuration file, | |
3 | # see Documentation/kbuild/kconfig-language.txt. | |
4 | # | |
5 | ||
6 | mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration" | |
7 | ||
8 | config MMU | |
9 | bool | |
10 | default n | |
11 | ||
12 | config FPU | |
13 | bool | |
14 | default n | |
15 | ||
16 | config RWSEM_GENERIC_SPINLOCK | |
17 | bool | |
18 | default y | |
19 | ||
20 | config RWSEM_XCHGADD_ALGORITHM | |
21 | bool | |
22 | default n | |
23 | ||
24 | config BLACKFIN | |
25 | bool | |
26 | default y | |
27 | ||
e3defffe AL |
28 | config ZONE_DMA |
29 | bool | |
30 | default y | |
31 | ||
1394f032 BW |
32 | config BFIN |
33 | bool | |
34 | default y | |
35 | ||
36 | config SEMAPHORE_SLEEPERS | |
37 | bool | |
38 | default y | |
39 | ||
40 | config GENERIC_FIND_NEXT_BIT | |
41 | bool | |
42 | default y | |
43 | ||
44 | config GENERIC_HWEIGHT | |
45 | bool | |
46 | default y | |
47 | ||
48 | config GENERIC_HARDIRQS | |
49 | bool | |
50 | default y | |
51 | ||
52 | config GENERIC_IRQ_PROBE | |
53 | bool | |
54 | default y | |
55 | ||
56 | config GENERIC_TIME | |
57 | bool | |
58 | default n | |
59 | ||
b2d1583f | 60 | config GENERIC_GPIO |
1394f032 BW |
61 | bool |
62 | default y | |
63 | ||
64 | config FORCE_MAX_ZONEORDER | |
65 | int | |
66 | default "14" | |
67 | ||
68 | config GENERIC_CALIBRATE_DELAY | |
69 | bool | |
70 | default y | |
71 | ||
72 | config IRQCHIP_DEMUX_GPIO | |
73 | bool | |
59003145 | 74 | depends on (BF52x || BF53x || BF561 || BF54x) |
1394f032 BW |
75 | default y |
76 | ||
77 | source "init/Kconfig" | |
78 | source "kernel/Kconfig.preempt" | |
79 | ||
80 | menu "Blackfin Processor Options" | |
81 | ||
82 | comment "Processor and Board Settings" | |
83 | ||
84 | choice | |
85 | prompt "CPU" | |
86 | default BF533 | |
87 | ||
59003145 MH |
88 | config BF522 |
89 | bool "BF522" | |
90 | help | |
91 | BF522 Processor Support. | |
92 | ||
93 | config BF525 | |
94 | bool "BF525" | |
95 | help | |
96 | BF525 Processor Support. | |
97 | ||
98 | config BF527 | |
99 | bool "BF527" | |
100 | help | |
101 | BF527 Processor Support. | |
102 | ||
1394f032 BW |
103 | config BF531 |
104 | bool "BF531" | |
105 | help | |
106 | BF531 Processor Support. | |
107 | ||
108 | config BF532 | |
109 | bool "BF532" | |
110 | help | |
111 | BF532 Processor Support. | |
112 | ||
113 | config BF533 | |
114 | bool "BF533" | |
115 | help | |
116 | BF533 Processor Support. | |
117 | ||
118 | config BF534 | |
119 | bool "BF534" | |
120 | help | |
121 | BF534 Processor Support. | |
122 | ||
123 | config BF536 | |
124 | bool "BF536" | |
125 | help | |
126 | BF536 Processor Support. | |
127 | ||
128 | config BF537 | |
129 | bool "BF537" | |
130 | help | |
131 | BF537 Processor Support. | |
132 | ||
24a07a12 RH |
133 | config BF542 |
134 | bool "BF542" | |
135 | help | |
136 | BF542 Processor Support. | |
137 | ||
138 | config BF544 | |
139 | bool "BF544" | |
140 | help | |
141 | BF544 Processor Support. | |
142 | ||
143 | config BF548 | |
144 | bool "BF548" | |
145 | help | |
146 | BF548 Processor Support. | |
147 | ||
148 | config BF549 | |
149 | bool "BF549" | |
150 | help | |
151 | BF549 Processor Support. | |
152 | ||
1394f032 BW |
153 | config BF561 |
154 | bool "BF561" | |
155 | help | |
156 | Not Supported Yet - Work in progress - BF561 Processor Support. | |
157 | ||
158 | endchoice | |
159 | ||
160 | choice | |
161 | prompt "Silicon Rev" | |
59003145 | 162 | default BF_REV_0_1 if BF527 |
1394f032 BW |
163 | default BF_REV_0_2 if BF537 |
164 | default BF_REV_0_3 if BF533 | |
24a07a12 RH |
165 | default BF_REV_0_0 if BF549 |
166 | ||
167 | config BF_REV_0_0 | |
168 | bool "0.0" | |
59003145 MH |
169 | depends on (BF549 || BF527) |
170 | ||
171 | config BF_REV_0_1 | |
172 | bool "0.2" | |
173 | depends on (BF549 || BF527) | |
1394f032 BW |
174 | |
175 | config BF_REV_0_2 | |
176 | bool "0.2" | |
177 | depends on (BF537 || BF536 || BF534) | |
178 | ||
179 | config BF_REV_0_3 | |
180 | bool "0.3" | |
181 | depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531) | |
182 | ||
183 | config BF_REV_0_4 | |
184 | bool "0.4" | |
185 | depends on (BF561 || BF533 || BF532 || BF531) | |
186 | ||
187 | config BF_REV_0_5 | |
188 | bool "0.5" | |
189 | depends on (BF561 || BF533 || BF532 || BF531) | |
190 | ||
de3025f4 JZ |
191 | config BF_REV_ANY |
192 | bool "any" | |
193 | ||
194 | config BF_REV_NONE | |
195 | bool "none" | |
196 | ||
1394f032 BW |
197 | endchoice |
198 | ||
59003145 MH |
199 | config BF52x |
200 | bool | |
201 | depends on (BF522 || BF525 || BF527) | |
202 | default y | |
203 | ||
24a07a12 RH |
204 | config BF53x |
205 | bool | |
206 | depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537) | |
207 | default y | |
208 | ||
209 | config BF54x | |
210 | bool | |
211 | depends on (BF542 || BF544 || BF548 || BF549) | |
212 | default y | |
213 | ||
1394f032 BW |
214 | config BFIN_DUAL_CORE |
215 | bool | |
216 | depends on (BF561) | |
217 | default y | |
218 | ||
219 | config BFIN_SINGLE_CORE | |
220 | bool | |
221 | depends on !BFIN_DUAL_CORE | |
222 | default y | |
223 | ||
224 | choice | |
225 | prompt "System type" | |
226 | default BFIN533_STAMP | |
227 | help | |
228 | Do NOT change the board here. Please use the top level | |
229 | configuration to ensure that all the other settings are | |
230 | correct. | |
231 | ||
59003145 MH |
232 | config BFIN527_EZKIT |
233 | bool "BF527-EZKIT" | |
234 | depends on (BF522 || BF525 || BF527) | |
235 | help | |
236 | BF533-EZKIT-LITE board Support. | |
237 | ||
1394f032 BW |
238 | config BFIN533_EZKIT |
239 | bool "BF533-EZKIT" | |
240 | depends on (BF533 || BF532 || BF531) | |
241 | help | |
242 | BF533-EZKIT-LITE board Support. | |
243 | ||
244 | config BFIN533_STAMP | |
245 | bool "BF533-STAMP" | |
246 | depends on (BF533 || BF532 || BF531) | |
247 | help | |
248 | BF533-STAMP board Support. | |
249 | ||
250 | config BFIN537_STAMP | |
251 | bool "BF537-STAMP" | |
252 | depends on (BF537 || BF536 || BF534) | |
253 | help | |
254 | BF537-STAMP board Support. | |
255 | ||
256 | config BFIN533_BLUETECHNIX_CM | |
257 | bool "Bluetechnix CM-BF533" | |
258 | depends on (BF533) | |
259 | help | |
260 | CM-BF533 support for EVAL- and DEV-Board. | |
261 | ||
262 | config BFIN537_BLUETECHNIX_CM | |
263 | bool "Bluetechnix CM-BF537" | |
264 | depends on (BF537) | |
265 | help | |
266 | CM-BF537 support for EVAL- and DEV-Board. | |
267 | ||
24a07a12 RH |
268 | config BFIN548_EZKIT |
269 | bool "BF548-EZKIT" | |
270 | depends on (BF548 || BF549) | |
271 | help | |
272 | BFIN548-EZKIT board Support. | |
273 | ||
1394f032 | 274 | config BFIN561_BLUETECHNIX_CM |
0a290593 | 275 | bool "Bluetechnix CM-BF561" |
1394f032 BW |
276 | depends on (BF561) |
277 | help | |
278 | CM-BF561 support for EVAL- and DEV-Board. | |
279 | ||
280 | config BFIN561_EZKIT | |
281 | bool "BF561-EZKIT" | |
282 | depends on (BF561) | |
283 | help | |
284 | BF561-EZKIT-LITE board Support. | |
285 | ||
0a290593 MF |
286 | config BFIN561_TEPLA |
287 | bool "BF561-TEPLA" | |
288 | depends on (BF561) | |
289 | help | |
290 | BF561-TEPLA board Support. | |
291 | ||
1394f032 BW |
292 | config PNAV10 |
293 | bool "PNAV 1.0 board" | |
294 | depends on (BF537) | |
295 | help | |
296 | PNAV 1.0 board Support. | |
297 | ||
298 | config GENERIC_BOARD | |
299 | bool "Custom" | |
300 | depends on (BF537 || BF536 \ | |
301 | || BF534 || BF561 || BF535 || BF533 || BF532 || BF531) | |
302 | help | |
303 | GENERIC or Custom board Support. | |
304 | ||
305 | endchoice | |
306 | ||
307 | config MEM_GENERIC_BOARD | |
308 | bool | |
309 | depends on GENERIC_BOARD | |
310 | default y | |
311 | ||
312 | config MEM_MT48LC64M4A2FB_7E | |
313 | bool | |
314 | depends on (BFIN533_STAMP) | |
315 | default y | |
316 | ||
317 | config MEM_MT48LC16M16A2TG_75 | |
318 | bool | |
319 | depends on (BFIN533_EZKIT || BFIN561_EZKIT \ | |
320 | || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM) | |
321 | default y | |
322 | ||
323 | config MEM_MT48LC32M8A2_75 | |
324 | bool | |
325 | depends on (BFIN537_STAMP || PNAV10) | |
326 | default y | |
327 | ||
328 | config MEM_MT48LC8M32B2B5_7 | |
329 | bool | |
330 | depends on (BFIN561_BLUETECHNIX_CM) | |
331 | default y | |
332 | ||
59003145 MH |
333 | config MEM_MT48LC32M16A2TG_75 |
334 | bool | |
335 | depends on (BFIN527_EZKIT) | |
336 | default y | |
337 | ||
1394f032 BW |
338 | config BFIN_SHARED_FLASH_ENET |
339 | bool | |
340 | depends on (BFIN533_STAMP) | |
341 | default y | |
342 | ||
59003145 | 343 | source "arch/blackfin/mach-bf527/Kconfig" |
1394f032 BW |
344 | source "arch/blackfin/mach-bf533/Kconfig" |
345 | source "arch/blackfin/mach-bf561/Kconfig" | |
346 | source "arch/blackfin/mach-bf537/Kconfig" | |
24a07a12 | 347 | source "arch/blackfin/mach-bf548/Kconfig" |
1394f032 BW |
348 | |
349 | menu "Board customizations" | |
350 | ||
351 | config CMDLINE_BOOL | |
352 | bool "Default bootloader kernel arguments" | |
353 | ||
354 | config CMDLINE | |
355 | string "Initial kernel command string" | |
356 | depends on CMDLINE_BOOL | |
357 | default "console=ttyBF0,57600" | |
358 | help | |
359 | If you don't have a boot loader capable of passing a command line string | |
360 | to the kernel, you may specify one here. As a minimum, you should specify | |
361 | the memory size and the root device (e.g., mem=8M, root=/dev/nfs). | |
362 | ||
f16295e7 | 363 | comment "Clock/PLL Setup" |
1394f032 BW |
364 | |
365 | config CLKIN_HZ | |
366 | int "Crystal Frequency in Hz" | |
367 | default "11059200" if BFIN533_STAMP | |
368 | default "27000000" if BFIN533_EZKIT | |
59003145 | 369 | default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT) |
1394f032 BW |
370 | default "30000000" if BFIN561_EZKIT |
371 | default "24576000" if PNAV10 | |
372 | help | |
373 | The frequency of CLKIN crystal oscillator on the board in Hz. | |
374 | ||
f16295e7 RG |
375 | config BFIN_KERNEL_CLOCK |
376 | bool "Re-program Clocks while Kernel boots?" | |
377 | default n | |
378 | help | |
379 | This option decides if kernel clocks are re-programed from the | |
380 | bootloader settings. If the clocks are not set, the SDRAM settings | |
381 | are also not changed, and the Bootloader does 100% of the hardware | |
382 | configuration. | |
383 | ||
384 | config PLL_BYPASS | |
385 | bool "Bypass PLL" | |
386 | depends on BFIN_KERNEL_CLOCK | |
387 | default n | |
388 | ||
389 | config CLKIN_HALF | |
390 | bool "Half Clock In" | |
391 | depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS) | |
392 | default n | |
393 | help | |
394 | If this is set the clock will be divided by 2, before it goes to the PLL. | |
395 | ||
396 | config VCO_MULT | |
397 | int "VCO Multiplier" | |
398 | depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS) | |
399 | range 1 64 | |
400 | default "22" if BFIN533_EZKIT | |
401 | default "45" if BFIN533_STAMP | |
59003145 | 402 | default "20" if (BFIN537_STAMP || BFIN527_EZKIT) |
f16295e7 RG |
403 | default "22" if BFIN533_BLUETECHNIX_CM |
404 | default "20" if BFIN537_BLUETECHNIX_CM | |
405 | default "20" if BFIN561_BLUETECHNIX_CM | |
406 | default "20" if BFIN561_EZKIT | |
407 | help | |
408 | This controls the frequency of the on-chip PLL. This can be between 1 and 64. | |
409 | PLL Frequency = (Crystal Frequency) * (this setting) | |
410 | ||
411 | choice | |
412 | prompt "Core Clock Divider" | |
413 | depends on BFIN_KERNEL_CLOCK | |
414 | default CCLK_DIV_1 | |
415 | help | |
416 | This sets the frequency of the core. It can be 1, 2, 4 or 8 | |
417 | Core Frequency = (PLL frequency) / (this setting) | |
418 | ||
419 | config CCLK_DIV_1 | |
420 | bool "1" | |
421 | ||
422 | config CCLK_DIV_2 | |
423 | bool "2" | |
424 | ||
425 | config CCLK_DIV_4 | |
426 | bool "4" | |
427 | ||
428 | config CCLK_DIV_8 | |
429 | bool "8" | |
430 | endchoice | |
431 | ||
432 | config SCLK_DIV | |
433 | int "System Clock Divider" | |
434 | depends on BFIN_KERNEL_CLOCK | |
435 | range 1 15 | |
436 | default 5 if BFIN533_EZKIT | |
437 | default 5 if BFIN533_STAMP | |
59003145 | 438 | default 4 if (BFIN537_STAMP || BFIN527_EZKIT) |
f16295e7 RG |
439 | default 5 if BFIN533_BLUETECHNIX_CM |
440 | default 4 if BFIN537_BLUETECHNIX_CM | |
441 | default 4 if BFIN561_BLUETECHNIX_CM | |
442 | default 5 if BFIN561_EZKIT | |
443 | help | |
444 | This sets the frequency of the system clock (including SDRAM or DDR). | |
445 | This can be between 1 and 15 | |
446 | System Clock = (PLL frequency) / (this setting) | |
447 | ||
448 | # | |
449 | # Max & Min Speeds for various Chips | |
450 | # | |
451 | config MAX_VCO_HZ | |
452 | int | |
453 | default 600000000 if BF522 | |
454 | default 600000000 if BF525 | |
455 | default 600000000 if BF527 | |
456 | default 400000000 if BF531 | |
457 | default 400000000 if BF532 | |
458 | default 750000000 if BF533 | |
459 | default 500000000 if BF534 | |
460 | default 400000000 if BF536 | |
461 | default 600000000 if BF537 | |
462 | default 533000000 if BF538 | |
463 | default 533000000 if BF539 | |
464 | default 600000000 if BF542 | |
465 | default 533000000 if BF544 | |
466 | default 533000000 if BF549 | |
467 | default 600000000 if BF561 | |
468 | ||
469 | config MIN_VCO_HZ | |
470 | int | |
471 | default 50000000 | |
472 | ||
473 | config MAX_SCLK_HZ | |
474 | int | |
475 | default 133000000 | |
476 | ||
477 | config MIN_SCLK_HZ | |
478 | int | |
479 | default 27000000 | |
480 | ||
481 | comment "Kernel Timer/Scheduler" | |
482 | ||
483 | source kernel/Kconfig.hz | |
484 | ||
485 | comment "Memory Setup" | |
486 | ||
1394f032 BW |
487 | config MEM_SIZE |
488 | int "SDRAM Memory Size in MBytes" | |
489 | default 32 if BFIN533_EZKIT | |
59003145 | 490 | default 64 if BFIN527_EZKIT |
1394f032 BW |
491 | default 64 if BFIN537_STAMP |
492 | default 64 if BFIN561_EZKIT | |
493 | default 128 if BFIN533_STAMP | |
494 | default 64 if PNAV10 | |
495 | ||
496 | config MEM_ADD_WIDTH | |
497 | int "SDRAM Memory Address Width" | |
498 | default 9 if BFIN533_EZKIT | |
499 | default 9 if BFIN561_EZKIT | |
59003145 | 500 | default 10 if BFIN527_EZKIT |
1394f032 BW |
501 | default 10 if BFIN537_STAMP |
502 | default 11 if BFIN533_STAMP | |
503 | default 10 if PNAV10 | |
504 | ||
505 | config ENET_FLASH_PIN | |
506 | int "PF port/pin used for flash and ethernet sharing" | |
507 | depends on (BFIN533_STAMP) | |
508 | default 0 | |
509 | help | |
510 | PF port/pin used for flash and ethernet sharing to allow other PF | |
511 | pins to be used on other platforms without having to touch common | |
512 | code. | |
513 | For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc. | |
514 | ||
515 | config BOOT_LOAD | |
516 | hex "Kernel load address for booting" | |
517 | default "0x1000" | |
2d8f161f | 518 | range 0x1000 0x20000000 |
1394f032 BW |
519 | help |
520 | This option allows you to set the load address of the kernel. | |
521 | This can be useful if you are on a board which has a small amount | |
522 | of memory or you wish to reserve some memory at the beginning of | |
523 | the address space. | |
524 | ||
2d8f161f MF |
525 | Note that you need to keep this value above 4k (0x1000) as this |
526 | memory region is used to capture NULL pointer references as well | |
527 | as some core kernel functions. | |
1394f032 BW |
528 | |
529 | comment "LED Status Indicators" | |
530 | depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM) | |
531 | ||
532 | config BFIN_ALIVE_LED | |
533 | bool "Enable Board Alive" | |
534 | depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM) | |
535 | default n | |
536 | help | |
537 | Blink the LEDs you select when the kernel is running. Helps detect | |
538 | a hung kernel. | |
539 | ||
540 | config BFIN_ALIVE_LED_NUM | |
541 | int "LED" | |
542 | depends on BFIN_ALIVE_LED | |
543 | range 1 3 if BFIN533_STAMP | |
544 | default "3" if BFIN533_STAMP | |
545 | help | |
546 | Select the LED (marked on the board) for you to blink. | |
547 | ||
548 | config BFIN_IDLE_LED | |
549 | bool "Enable System Load/Idle LED" | |
550 | depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM) | |
551 | default n | |
552 | help | |
553 | Blinks the LED you select when to determine kernel load. | |
554 | ||
555 | config BFIN_IDLE_LED_NUM | |
556 | int "LED" | |
557 | depends on BFIN_IDLE_LED | |
558 | range 1 3 if BFIN533_STAMP | |
559 | default "2" if BFIN533_STAMP | |
560 | help | |
561 | Select the LED (marked on the board) for you to blink. | |
562 | ||
f0b5d12f MF |
563 | choice |
564 | prompt "Blackfin Exception Scratch Register" | |
565 | default BFIN_SCRATCH_REG_RETN | |
566 | help | |
567 | Select the resource to reserve for the Exception handler: | |
568 | - RETN: Non-Maskable Interrupt (NMI) | |
569 | - RETE: Exception Return (JTAG/ICE) | |
570 | - CYCLES: Performance counter | |
571 | ||
572 | If you are unsure, please select "RETN". | |
573 | ||
574 | config BFIN_SCRATCH_REG_RETN | |
575 | bool "RETN" | |
576 | help | |
577 | Use the RETN register in the Blackfin exception handler | |
578 | as a stack scratch register. This means you cannot | |
579 | safely use NMI on the Blackfin while running Linux, but | |
580 | you can debug the system with a JTAG ICE and use the | |
581 | CYCLES performance registers. | |
582 | ||
583 | If you are unsure, please select "RETN". | |
584 | ||
585 | config BFIN_SCRATCH_REG_RETE | |
586 | bool "RETE" | |
587 | help | |
588 | Use the RETE register in the Blackfin exception handler | |
589 | as a stack scratch register. This means you cannot | |
590 | safely use a JTAG ICE while debugging a Blackfin board, | |
591 | but you can safely use the CYCLES performance registers | |
592 | and the NMI. | |
593 | ||
594 | If you are unsure, please select "RETN". | |
595 | ||
596 | config BFIN_SCRATCH_REG_CYCLES | |
597 | bool "CYCLES" | |
598 | help | |
599 | Use the CYCLES register in the Blackfin exception handler | |
600 | as a stack scratch register. This means you cannot | |
601 | safely use the CYCLES performance registers on a Blackfin | |
602 | board at anytime, but you can debug the system with a JTAG | |
603 | ICE and use the NMI. | |
604 | ||
605 | If you are unsure, please select "RETN". | |
606 | ||
607 | endchoice | |
608 | ||
1394f032 BW |
609 | # |
610 | # Sorry - but you need to put the hex address here - | |
611 | # | |
612 | ||
613 | # Flag Data register | |
614 | config BFIN_ALIVE_LED_PORT | |
615 | hex | |
616 | default 0xFFC00700 if (BFIN533_STAMP) | |
617 | ||
618 | # Peripheral Flag Direction Register | |
619 | config BFIN_ALIVE_LED_DPORT | |
620 | hex | |
621 | default 0xFFC00730 if (BFIN533_STAMP) | |
622 | ||
623 | config BFIN_ALIVE_LED_PIN | |
624 | hex | |
625 | default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1) | |
626 | default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2) | |
627 | default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3) | |
628 | ||
629 | config BFIN_IDLE_LED_PORT | |
630 | hex | |
631 | default 0xFFC00700 if (BFIN533_STAMP) | |
632 | ||
633 | # Peripheral Flag Direction Register | |
634 | config BFIN_IDLE_LED_DPORT | |
635 | hex | |
636 | default 0xFFC00730 if (BFIN533_STAMP) | |
637 | ||
638 | config BFIN_IDLE_LED_PIN | |
639 | hex | |
640 | default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1) | |
641 | default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2) | |
642 | default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3) | |
643 | ||
1394f032 BW |
644 | endmenu |
645 | ||
646 | ||
647 | menu "Blackfin Kernel Optimizations" | |
648 | ||
1394f032 BW |
649 | comment "Memory Optimizations" |
650 | ||
651 | config I_ENTRY_L1 | |
652 | bool "Locate interrupt entry code in L1 Memory" | |
653 | default y | |
654 | help | |
01dd2fbf ML |
655 | If enabled, interrupt entry code (STORE/RESTORE CONTEXT) is linked |
656 | into L1 instruction memory. (less latency) | |
1394f032 BW |
657 | |
658 | config EXCPT_IRQ_SYSC_L1 | |
01dd2fbf | 659 | bool "Locate entire ASM lowlevel exception / interrupt - Syscall and CPLB handler code in L1 Memory" |
1394f032 BW |
660 | default y |
661 | help | |
01dd2fbf ML |
662 | If enabled, the entire ASM lowlevel exception and interrupt entry code |
663 | (STORE/RESTORE CONTEXT) is linked into L1 instruction memory. | |
664 | (less latency) | |
1394f032 BW |
665 | |
666 | config DO_IRQ_L1 | |
667 | bool "Locate frequently called do_irq dispatcher function in L1 Memory" | |
668 | default y | |
669 | help | |
01dd2fbf ML |
670 | If enabled, the frequently called do_irq dispatcher function is linked |
671 | into L1 instruction memory. (less latency) | |
1394f032 BW |
672 | |
673 | config CORE_TIMER_IRQ_L1 | |
674 | bool "Locate frequently called timer_interrupt() function in L1 Memory" | |
675 | default y | |
676 | help | |
01dd2fbf ML |
677 | If enabled, the frequently called timer_interrupt() function is linked |
678 | into L1 instruction memory. (less latency) | |
1394f032 BW |
679 | |
680 | config IDLE_L1 | |
681 | bool "Locate frequently idle function in L1 Memory" | |
682 | default y | |
683 | help | |
01dd2fbf ML |
684 | If enabled, the frequently called idle function is linked |
685 | into L1 instruction memory. (less latency) | |
1394f032 BW |
686 | |
687 | config SCHEDULE_L1 | |
688 | bool "Locate kernel schedule function in L1 Memory" | |
689 | default y | |
690 | help | |
01dd2fbf ML |
691 | If enabled, the frequently called kernel schedule is linked |
692 | into L1 instruction memory. (less latency) | |
1394f032 BW |
693 | |
694 | config ARITHMETIC_OPS_L1 | |
695 | bool "Locate kernel owned arithmetic functions in L1 Memory" | |
696 | default y | |
697 | help | |
01dd2fbf ML |
698 | If enabled, arithmetic functions are linked |
699 | into L1 instruction memory. (less latency) | |
1394f032 BW |
700 | |
701 | config ACCESS_OK_L1 | |
702 | bool "Locate access_ok function in L1 Memory" | |
703 | default y | |
704 | help | |
01dd2fbf ML |
705 | If enabled, the access_ok function is linked |
706 | into L1 instruction memory. (less latency) | |
1394f032 BW |
707 | |
708 | config MEMSET_L1 | |
709 | bool "Locate memset function in L1 Memory" | |
710 | default y | |
711 | help | |
01dd2fbf ML |
712 | If enabled, the memset function is linked |
713 | into L1 instruction memory. (less latency) | |
1394f032 BW |
714 | |
715 | config MEMCPY_L1 | |
716 | bool "Locate memcpy function in L1 Memory" | |
717 | default y | |
718 | help | |
01dd2fbf ML |
719 | If enabled, the memcpy function is linked |
720 | into L1 instruction memory. (less latency) | |
1394f032 BW |
721 | |
722 | config SYS_BFIN_SPINLOCK_L1 | |
723 | bool "Locate sys_bfin_spinlock function in L1 Memory" | |
724 | default y | |
725 | help | |
01dd2fbf ML |
726 | If enabled, sys_bfin_spinlock function is linked |
727 | into L1 instruction memory. (less latency) | |
1394f032 BW |
728 | |
729 | config IP_CHECKSUM_L1 | |
730 | bool "Locate IP Checksum function in L1 Memory" | |
731 | default n | |
732 | help | |
01dd2fbf ML |
733 | If enabled, the IP Checksum function is linked |
734 | into L1 instruction memory. (less latency) | |
1394f032 BW |
735 | |
736 | config CACHELINE_ALIGNED_L1 | |
737 | bool "Locate cacheline_aligned data to L1 Data Memory" | |
157cc5aa MH |
738 | default y if !BF54x |
739 | default n if BF54x | |
1394f032 BW |
740 | depends on !BF531 |
741 | help | |
01dd2fbf ML |
742 | If enabled, cacheline_anligned data is linked |
743 | into L1 data memory. (less latency) | |
1394f032 BW |
744 | |
745 | config SYSCALL_TAB_L1 | |
746 | bool "Locate Syscall Table L1 Data Memory" | |
747 | default n | |
748 | depends on !BF531 | |
749 | help | |
01dd2fbf ML |
750 | If enabled, the Syscall LUT is linked |
751 | into L1 data memory. (less latency) | |
1394f032 BW |
752 | |
753 | config CPLB_SWITCH_TAB_L1 | |
754 | bool "Locate CPLB Switch Tables L1 Data Memory" | |
755 | default n | |
756 | depends on !BF531 | |
757 | help | |
01dd2fbf ML |
758 | If enabled, the CPLB Switch Tables are linked |
759 | into L1 data memory. (less latency) | |
1394f032 BW |
760 | |
761 | endmenu | |
762 | ||
763 | ||
764 | choice | |
765 | prompt "Kernel executes from" | |
766 | help | |
767 | Choose the memory type that the kernel will be running in. | |
768 | ||
769 | config RAMKERNEL | |
770 | bool "RAM" | |
771 | help | |
772 | The kernel will be resident in RAM when running. | |
773 | ||
774 | config ROMKERNEL | |
775 | bool "ROM" | |
776 | help | |
777 | The kernel will be resident in FLASH/ROM when running. | |
778 | ||
779 | endchoice | |
780 | ||
781 | source "mm/Kconfig" | |
782 | ||
db0fa206 BW |
783 | config LARGE_ALLOCS |
784 | bool "Allow allocating large blocks (> 1MB) of memory" | |
785 | help | |
786 | Allow the slab memory allocator to keep chains for very large | |
787 | memory sizes - upto 32MB. You may need this if your system has | |
788 | a lot of RAM, and you need to able to allocate very large | |
789 | contiguous chunks. If unsure, say N. | |
790 | ||
1394f032 BW |
791 | config BFIN_DMA_5XX |
792 | bool "Enable DMA Support" | |
59003145 | 793 | depends on (BF52x || BF53x || BF561 || BF54x) |
1394f032 BW |
794 | default y |
795 | help | |
796 | DMA driver for BF5xx. | |
797 | ||
798 | choice | |
799 | prompt "Uncached SDRAM region" | |
800 | default DMA_UNCACHED_1M | |
247537b9 | 801 | depends on BFIN_DMA_5XX |
1394f032 BW |
802 | config DMA_UNCACHED_2M |
803 | bool "Enable 2M DMA region" | |
804 | config DMA_UNCACHED_1M | |
805 | bool "Enable 1M DMA region" | |
806 | config DMA_UNCACHED_NONE | |
807 | bool "Disable DMA region" | |
808 | endchoice | |
809 | ||
810 | ||
811 | comment "Cache Support" | |
3bebca2d | 812 | config BFIN_ICACHE |
1394f032 | 813 | bool "Enable ICACHE" |
3bebca2d | 814 | config BFIN_DCACHE |
1394f032 | 815 | bool "Enable DCACHE" |
3bebca2d | 816 | config BFIN_DCACHE_BANKA |
1394f032 | 817 | bool "Enable only 16k BankA DCACHE - BankB is SRAM" |
3bebca2d | 818 | depends on BFIN_DCACHE && !BF531 |
1394f032 | 819 | default n |
3bebca2d RG |
820 | config BFIN_ICACHE_LOCK |
821 | bool "Enable Instruction Cache Locking" | |
1394f032 BW |
822 | |
823 | choice | |
824 | prompt "Policy" | |
3bebca2d RG |
825 | depends on BFIN_DCACHE |
826 | default BFIN_WB | |
827 | config BFIN_WB | |
1394f032 BW |
828 | bool "Write back" |
829 | help | |
830 | Write Back Policy: | |
831 | Cached data will be written back to SDRAM only when needed. | |
832 | This can give a nice increase in performance, but beware of | |
833 | broken drivers that do not properly invalidate/flush their | |
834 | cache. | |
835 | ||
836 | Write Through Policy: | |
837 | Cached data will always be written back to SDRAM when the | |
838 | cache is updated. This is a completely safe setting, but | |
839 | performance is worse than Write Back. | |
840 | ||
841 | If you are unsure of the options and you want to be safe, | |
842 | then go with Write Through. | |
843 | ||
3bebca2d | 844 | config BFIN_WT |
1394f032 BW |
845 | bool "Write through" |
846 | help | |
847 | Write Back Policy: | |
848 | Cached data will be written back to SDRAM only when needed. | |
849 | This can give a nice increase in performance, but beware of | |
850 | broken drivers that do not properly invalidate/flush their | |
851 | cache. | |
852 | ||
853 | Write Through Policy: | |
854 | Cached data will always be written back to SDRAM when the | |
855 | cache is updated. This is a completely safe setting, but | |
856 | performance is worse than Write Back. | |
857 | ||
858 | If you are unsure of the options and you want to be safe, | |
859 | then go with Write Through. | |
860 | ||
861 | endchoice | |
862 | ||
863 | config L1_MAX_PIECE | |
864 | int "Set the max L1 SRAM pieces" | |
865 | default 16 | |
866 | help | |
867 | Set the max memory pieces for the L1 SRAM allocation algorithm. | |
868 | Min value is 16. Max value is 1024. | |
869 | ||
1394f032 BW |
870 | comment "Asynchonous Memory Configuration" |
871 | ||
ddf416b2 | 872 | menu "EBIU_AMGCTL Global Control" |
1394f032 BW |
873 | config C_AMCKEN |
874 | bool "Enable CLKOUT" | |
875 | default y | |
876 | ||
877 | config C_CDPRIO | |
878 | bool "DMA has priority over core for ext. accesses" | |
9be343c5 | 879 | depends on !BF54x |
1394f032 BW |
880 | default n |
881 | ||
882 | config C_B0PEN | |
883 | depends on BF561 | |
884 | bool "Bank 0 16 bit packing enable" | |
885 | default y | |
886 | ||
887 | config C_B1PEN | |
888 | depends on BF561 | |
889 | bool "Bank 1 16 bit packing enable" | |
890 | default y | |
891 | ||
892 | config C_B2PEN | |
893 | depends on BF561 | |
894 | bool "Bank 2 16 bit packing enable" | |
895 | default y | |
896 | ||
897 | config C_B3PEN | |
898 | depends on BF561 | |
899 | bool "Bank 3 16 bit packing enable" | |
900 | default n | |
901 | ||
902 | choice | |
903 | prompt"Enable Asynchonous Memory Banks" | |
904 | default C_AMBEN_ALL | |
905 | ||
906 | config C_AMBEN | |
907 | bool "Disable All Banks" | |
908 | ||
909 | config C_AMBEN_B0 | |
910 | bool "Enable Bank 0" | |
911 | ||
912 | config C_AMBEN_B0_B1 | |
913 | bool "Enable Bank 0 & 1" | |
914 | ||
915 | config C_AMBEN_B0_B1_B2 | |
916 | bool "Enable Bank 0 & 1 & 2" | |
917 | ||
918 | config C_AMBEN_ALL | |
919 | bool "Enable All Banks" | |
920 | endchoice | |
921 | endmenu | |
922 | ||
923 | menu "EBIU_AMBCTL Control" | |
924 | config BANK_0 | |
925 | hex "Bank 0" | |
926 | default 0x7BB0 | |
927 | ||
928 | config BANK_1 | |
929 | hex "Bank 1" | |
930 | default 0x7BB0 | |
931 | ||
932 | config BANK_2 | |
933 | hex "Bank 2" | |
934 | default 0x7BB0 | |
935 | ||
936 | config BANK_3 | |
937 | hex "Bank 3" | |
938 | default 0x99B3 | |
939 | endmenu | |
940 | ||
941 | endmenu | |
942 | ||
943 | ############################################################################# | |
944 | menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)" | |
945 | ||
946 | config PCI | |
947 | bool "PCI support" | |
948 | help | |
949 | Support for PCI bus. | |
950 | ||
951 | source "drivers/pci/Kconfig" | |
952 | ||
953 | config HOTPLUG | |
954 | bool "Support for hot-pluggable device" | |
955 | help | |
956 | Say Y here if you want to plug devices into your computer while | |
957 | the system is running, and be able to use them quickly. In many | |
958 | cases, the devices can likewise be unplugged at any time too. | |
959 | ||
960 | One well known example of this is PCMCIA- or PC-cards, credit-card | |
961 | size devices such as network cards, modems or hard drives which are | |
962 | plugged into slots found on all modern laptop computers. Another | |
963 | example, used on modern desktops as well as laptops, is USB. | |
964 | ||
965 | Enable HOTPLUG and KMOD, and build a modular kernel. Get agent | |
966 | software (at <http://linux-hotplug.sourceforge.net/>) and install it. | |
967 | Then your kernel will automatically call out to a user mode "policy | |
968 | agent" (/sbin/hotplug) to load modules and set up software needed | |
969 | to use devices as you hotplug them. | |
970 | ||
971 | source "drivers/pcmcia/Kconfig" | |
972 | ||
973 | source "drivers/pci/hotplug/Kconfig" | |
974 | ||
975 | endmenu | |
976 | ||
977 | menu "Executable file formats" | |
978 | ||
979 | source "fs/Kconfig.binfmt" | |
980 | ||
981 | endmenu | |
982 | ||
983 | menu "Power management options" | |
984 | source "kernel/power/Kconfig" | |
985 | ||
986 | choice | |
987 | prompt "Select PM Wakeup Event Source" | |
988 | default PM_WAKEUP_GPIO_BY_SIC_IWR | |
989 | depends on PM | |
990 | help | |
991 | If you have a GPIO already configured as input with the corresponding PORTx_MASK | |
992 | bit set - "Specify Wakeup Event by SIC_IWR value" | |
993 | ||
994 | config PM_WAKEUP_GPIO_BY_SIC_IWR | |
995 | bool "Specify Wakeup Event by SIC_IWR value" | |
996 | config PM_WAKEUP_BY_GPIO | |
997 | bool "Cause Wakeup Event by GPIO" | |
998 | config PM_WAKEUP_GPIO_API | |
999 | bool "Configure Wakeup Event by PM GPIO API" | |
1000 | ||
1001 | endchoice | |
1002 | ||
1003 | config PM_WAKEUP_SIC_IWR | |
1004 | hex "Wakeup Events (SIC_IWR)" | |
1005 | depends on PM_WAKEUP_GPIO_BY_SIC_IWR | |
1006 | default 0x80000000 if (BF537 || BF536 || BF534) | |
1007 | default 0x100000 if (BF533 || BF532 || BF531) | |
1008 | ||
1009 | config PM_WAKEUP_GPIO_NUMBER | |
1010 | int "Wakeup GPIO number" | |
1011 | range 0 47 | |
1012 | depends on PM_WAKEUP_BY_GPIO | |
1013 | default 2 if BFIN537_STAMP | |
1014 | ||
1015 | choice | |
1016 | prompt "GPIO Polarity" | |
1017 | depends on PM_WAKEUP_BY_GPIO | |
1018 | default PM_WAKEUP_GPIO_POLAR_H | |
1019 | config PM_WAKEUP_GPIO_POLAR_H | |
1020 | bool "Active High" | |
1021 | config PM_WAKEUP_GPIO_POLAR_L | |
1022 | bool "Active Low" | |
1023 | config PM_WAKEUP_GPIO_POLAR_EDGE_F | |
1024 | bool "Falling EDGE" | |
1025 | config PM_WAKEUP_GPIO_POLAR_EDGE_R | |
1026 | bool "Rising EDGE" | |
1027 | config PM_WAKEUP_GPIO_POLAR_EDGE_B | |
1028 | bool "Both EDGE" | |
1029 | endchoice | |
1030 | ||
1031 | endmenu | |
1032 | ||
24a07a12 | 1033 | if (BF537 || BF533 || BF54x) |
1394f032 BW |
1034 | |
1035 | menu "CPU Frequency scaling" | |
1036 | ||
1037 | source "drivers/cpufreq/Kconfig" | |
1038 | ||
1039 | config CPU_FREQ | |
1040 | bool | |
1041 | default n | |
1042 | help | |
1043 | If you want to enable this option, you should select the | |
1044 | DPMC driver from Character Devices. | |
1045 | endmenu | |
1046 | ||
1047 | endif | |
1048 | ||
1049 | source "net/Kconfig" | |
1050 | ||
1051 | source "drivers/Kconfig" | |
1052 | ||
1053 | source "fs/Kconfig" | |
1054 | ||
09cadedb | 1055 | source "kernel/Kconfig.instrumentation" |
1394f032 BW |
1056 | |
1057 | menu "Kernel hacking" | |
1058 | ||
1059 | source "lib/Kconfig.debug" | |
1060 | ||
1061 | config DEBUG_HWERR | |
1062 | bool "Hardware error interrupt debugging" | |
1063 | depends on DEBUG_KERNEL | |
1064 | help | |
1065 | When enabled, the hardware error interrupt is never disabled, and | |
1066 | will happen immediately when an error condition occurs. This comes | |
1067 | at a slight cost in code size, but is necessary if you are getting | |
1068 | hardware error interrupts and need to know where they are coming | |
1069 | from. | |
1070 | ||
1071 | config DEBUG_ICACHE_CHECK | |
01dd2fbf | 1072 | bool "Check Instruction cache coherency" |
1394f032 BW |
1073 | depends on DEBUG_KERNEL |
1074 | depends on DEBUG_HWERR | |
1075 | help | |
01dd2fbf ML |
1076 | Say Y here if you are getting weird unexplained errors. This will |
1077 | ensure that icache is what SDRAM says it should be by doing a | |
1078 | byte wise comparison between SDRAM and instruction cache. This | |
1394f032 BW |
1079 | also relocates the irq_panic() function to L1 memory, (which is |
1080 | un-cached). | |
1081 | ||
1394f032 BW |
1082 | config DEBUG_HUNT_FOR_ZERO |
1083 | bool "Catch NULL pointer reads/writes" | |
1084 | default y | |
1085 | help | |
1086 | Say Y here to catch reads/writes to anywhere in the memory range | |
1087 | from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in | |
1088 | catching common programming errors such as NULL pointer dereferences. | |
1089 | ||
1090 | Misbehaving applications will be killed (generate a SEGV) while the | |
1091 | kernel will trigger a panic. | |
1092 | ||
1093 | Enabling this option will take up an extra entry in CPLB table. | |
1094 | Otherwise, there is no extra overhead. | |
1095 | ||
518039bc RG |
1096 | config DEBUG_BFIN_HWTRACE_ON |
1097 | bool "Turn on Blackfin's Hardware Trace" | |
1098 | default y | |
1099 | help | |
1100 | All Blackfins include a Trace Unit which stores a history of the last | |
1101 | 16 changes in program flow taken by the program sequencer. The history | |
1102 | allows the user to recreate the program sequencer’s recent path. This | |
1103 | can be handy when an application dies - we print out the execution | |
1104 | path of how it got to the offending instruction. | |
1105 | ||
1106 | By turning this off, you may save a tiny amount of power. | |
1107 | ||
1108 | choice | |
1109 | prompt "Omit loop Tracing" | |
1110 | default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF | |
1111 | depends on DEBUG_BFIN_HWTRACE_ON | |
1112 | help | |
1113 | The trace buffer can be configured to omit recording of changes in | |
1114 | program flow that match either the last entry or one of the last | |
1115 | two entries. Omitting one of these entries from the record prevents | |
1116 | the trace buffer from overflowing because of any sort of loop (for, do | |
1117 | while, etc) in the program. | |
1118 | ||
1119 | Because zero-overhead Hardware loops are not recorded in the trace buffer, | |
1120 | this feature can be used to prevent trace overflow from loops that | |
1121 | are nested four deep. | |
1122 | ||
1123 | config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF | |
1124 | bool "Trace all Loops" | |
1125 | help | |
1126 | The trace buffer records all changes of flow | |
1127 | ||
1128 | config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE | |
1129 | bool "Compress single-level loops" | |
1130 | help | |
1131 | The trace buffer does not record single loops - helpful if trace | |
1132 | is spinning on a while or do loop. | |
1133 | ||
1134 | config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO | |
1135 | bool "Compress two-level loops" | |
1136 | help | |
1137 | The trace buffer does not record loops two levels deep. Helpful if | |
1138 | the trace is spinning in a nested loop | |
1139 | ||
1140 | endchoice | |
1141 | ||
1142 | config DEBUG_BFIN_HWTRACE_COMPRESSION | |
1143 | int | |
1144 | depends on DEBUG_BFIN_HWTRACE_ON | |
1145 | default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF | |
1146 | default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE | |
1147 | default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO | |
1148 | ||
1149 | ||
1150 | config DEBUG_BFIN_HWTRACE_EXPAND | |
1151 | bool "Expand Trace Buffer greater than 16 entries" | |
1152 | depends on DEBUG_BFIN_HWTRACE_ON | |
1153 | default n | |
1154 | help | |
1155 | By selecting this option, every time the 16 hardware entries in | |
1156 | the Blackfin's HW Trace buffer are full, the kernel will move them | |
1157 | into a software buffer, for dumping when there is an issue. This | |
1158 | has a great impact on performance, (an interrupt every 16 change of | |
1159 | flows) and should normally be turned off, except in those nasty | |
1160 | debugging sessions | |
1161 | ||
1162 | config DEBUG_BFIN_HWTRACE_EXPAND_LEN | |
1163 | int "Size of Trace buffer (in power of 2k)" | |
1164 | range 0 4 | |
1165 | depends on DEBUG_BFIN_HWTRACE_EXPAND | |
1166 | default 1 | |
1167 | help | |
1168 | This sets the size of the software buffer that the trace information | |
1169 | is kept in. | |
1170 | 0 for (2^0) 1k, or 256 entries, | |
1171 | 1 for (2^1) 2k, or 512 entries, | |
1172 | 2 for (2^2) 4k, or 1024 entries, | |
1173 | 3 for (2^3) 8k, or 2048 entries, | |
1174 | 4 for (2^4) 16k, or 4096 entries | |
1175 | ||
1394f032 BW |
1176 | config DEBUG_BFIN_NO_KERN_HWTRACE |
1177 | bool "Trace user apps (turn off hwtrace in kernel)" | |
518039bc | 1178 | depends on DEBUG_BFIN_HWTRACE_ON |
1394f032 BW |
1179 | default n |
1180 | help | |
1181 | Some pieces of the kernel contain a lot of flow changes which can | |
1182 | quickly fill up the hardware trace buffer. When debugging crashes, | |
1183 | the hardware trace may indicate that the problem lies in kernel | |
1184 | space when in reality an application is buggy. | |
1185 | ||
1186 | Say Y here to disable hardware tracing in some known "jumpy" pieces | |
1187 | of code so that the trace buffer will extend further back. | |
1188 | ||
0ae53640 RG |
1189 | config EARLY_PRINTK |
1190 | bool "Early printk" | |
1191 | default n | |
1192 | help | |
1193 | This option enables special console drivers which allow the kernel | |
1194 | to print messages very early in the bootup process. | |
1195 | ||
1196 | This is useful for kernel debugging when your machine crashes very | |
1197 | early before the console code is initialized. After enabling this | |
1198 | feature, you must add "earlyprintk=serial,uart0,57600" to the | |
1199 | command line (bootargs). It is safe to say Y here in all cases, as | |
1200 | all of this lives in the init section and is thrown away after the | |
1201 | kernel boots completely. | |
1202 | ||
1394f032 BW |
1203 | config DUAL_CORE_TEST_MODULE |
1204 | tristate "Dual Core Test Module" | |
1205 | depends on (BF561) | |
1206 | default n | |
1207 | help | |
1208 | Say Y here to build-in dual core test module for dual core test. | |
1209 | ||
1210 | config CPLB_INFO | |
1211 | bool "Display the CPLB information" | |
1212 | help | |
1213 | Display the CPLB information. | |
1214 | ||
1215 | config ACCESS_CHECK | |
1216 | bool "Check the user pointer address" | |
1217 | default y | |
1218 | help | |
1219 | Usually the pointer transfer from user space is checked to see if its | |
1220 | address is in the kernel space. | |
1221 | ||
1222 | Say N here to disable that check to improve the performance. | |
1223 | ||
1224 | endmenu | |
1225 | ||
1226 | source "security/Kconfig" | |
1227 | ||
1228 | source "crypto/Kconfig" | |
1229 | ||
1230 | source "lib/Kconfig" |