Blackfin arch: cleanup - use scm for changelog, not file headers
[deliverable/linux.git] / arch / blackfin / include / asm / dma.h
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1394f032 1/*
b03f2039 2 * dma.h - Blackfin DMA defines/structures/etc...
1394f032 3 *
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4 * Copyright 2004-2008 Analog Devices Inc.
5 * Licensed under the GPL-2 or later.
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6 */
7
8#ifndef _BLACKFIN_DMA_H_
9#define _BLACKFIN_DMA_H_
10
11#include <asm/io.h>
12#include <linux/slab.h>
13#include <asm/irq.h>
14#include <asm/signal.h>
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15
16#include <linux/kernel.h>
639f6571 17#include <mach/dma.h>
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18#include <linux/mm.h>
19#include <linux/interrupt.h>
20#include <asm/blackfin.h>
21
22#define MAX_DMA_ADDRESS PAGE_OFFSET
23
24/*****************************************************************************
25* Generic DMA Declarations
26*
27****************************************************************************/
28enum dma_chan_status {
29 DMA_CHANNEL_FREE,
30 DMA_CHANNEL_REQUESTED,
31 DMA_CHANNEL_ENABLED,
32};
33
34/*-------------------------
35 * config reg bits value
36 *-------------------------*/
37#define DATA_SIZE_8 0
38#define DATA_SIZE_16 1
39#define DATA_SIZE_32 2
40
41#define DMA_FLOW_STOP 0
42#define DMA_FLOW_AUTO 1
43#define DMA_FLOW_ARRAY 4
44#define DMA_FLOW_SMALL 6
45#define DMA_FLOW_LARGE 7
46
47#define DIMENSION_LINEAR 0
48#define DIMENSION_2D 1
49
50#define DIR_READ 0
51#define DIR_WRITE 1
52
53#define INTR_DISABLE 0
54#define INTR_ON_BUF 2
55#define INTR_ON_ROW 3
56
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57#define DMA_NOSYNC_KEEP_DMA_BUF 0
58#define DMA_SYNC_RESTART 1
59
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60struct dmasg {
61 unsigned long next_desc_addr;
62 unsigned long start_addr;
63 unsigned short cfg;
64 unsigned short x_count;
65 short x_modify;
66 unsigned short y_count;
67 short y_modify;
68} __attribute__((packed));
69
70struct dma_register {
71 unsigned long next_desc_ptr; /* DMA Next Descriptor Pointer register */
72 unsigned long start_addr; /* DMA Start address register */
73
74 unsigned short cfg; /* DMA Configuration register */
75 unsigned short dummy1; /* DMA Configuration register */
76
77 unsigned long reserved;
78
79 unsigned short x_count; /* DMA x_count register */
80 unsigned short dummy2;
81
82 short x_modify; /* DMA x_modify register */
83 unsigned short dummy3;
84
85 unsigned short y_count; /* DMA y_count register */
86 unsigned short dummy4;
87
88 short y_modify; /* DMA y_modify register */
89 unsigned short dummy5;
90
91 unsigned long curr_desc_ptr; /* DMA Current Descriptor Pointer
92 register */
452af71f 93 unsigned long curr_addr_ptr; /* DMA Current Address Pointer
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94 register */
95 unsigned short irq_status; /* DMA irq status register */
96 unsigned short dummy6;
97
98 unsigned short peripheral_map; /* DMA peripheral map register */
99 unsigned short dummy7;
100
101 unsigned short curr_x_count; /* DMA Current x-count register */
102 unsigned short dummy8;
103
104 unsigned long reserved2;
105
106 unsigned short curr_y_count; /* DMA Current y-count register */
107 unsigned short dummy9;
108
109 unsigned long reserved3;
110
111};
112
113typedef irqreturn_t(*dma_interrupt_t) (int irq, void *dev_id);
114
115struct dma_channel {
116 struct mutex dmalock;
99532fd2 117 const char *device_id;
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118 enum dma_chan_status chan_status;
119 struct dma_register *regs;
120 struct dmasg *sg; /* large mode descriptor */
121 unsigned int ctrl_num; /* controller number */
a2ba8b19 122 unsigned int irq;
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123 dma_interrupt_t irq_callback;
124 void *data;
125 unsigned int dma_enable_flag;
126 unsigned int loopback_flag;
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127#ifdef CONFIG_PM
128 unsigned short saved_peripheral_map;
129#endif
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130};
131
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132#ifdef CONFIG_PM
133int blackfin_dma_suspend(void);
134void blackfin_dma_resume(void);
135#endif
136
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137/*******************************************************************************
138* DMA API's
139*******************************************************************************/
140/* functions to set register mode */
141void set_dma_start_addr(unsigned int channel, unsigned long addr);
142void set_dma_next_desc_addr(unsigned int channel, unsigned long addr);
8a26ac70 143void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr);
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144void set_dma_x_count(unsigned int channel, unsigned short x_count);
145void set_dma_x_modify(unsigned int channel, short x_modify);
146void set_dma_y_count(unsigned int channel, unsigned short y_count);
147void set_dma_y_modify(unsigned int channel, short y_modify);
148void set_dma_config(unsigned int channel, unsigned short config);
149unsigned short set_bfin_dma_config(char direction, char flow_mode,
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150 char intr_mode, char dma_mode, char width,
151 char syncmode);
1d945e2b 152void set_dma_curr_addr(unsigned int channel, unsigned long addr);
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153
154/* get curr status for polling */
155unsigned short get_dma_curr_irqstat(unsigned int channel);
156unsigned short get_dma_curr_xcount(unsigned int channel);
157unsigned short get_dma_curr_ycount(unsigned int channel);
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158unsigned long get_dma_next_desc_ptr(unsigned int channel);
159unsigned long get_dma_curr_desc_ptr(unsigned int channel);
160unsigned long get_dma_curr_addr(unsigned int channel);
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161
162/* set large DMA mode descriptor */
163void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg);
164
165/* check if current channel is in use */
166int dma_channel_active(unsigned int channel);
167
168/* common functions must be called in any mode */
169void free_dma(unsigned int channel);
170int dma_channel_active(unsigned int channel); /* check if a channel is in use */
171void disable_dma(unsigned int channel);
172void enable_dma(unsigned int channel);
99532fd2 173int request_dma(unsigned int channel, const char *device_id);
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174int set_dma_callback(unsigned int channel, dma_interrupt_t callback,
175 void *data);
176void dma_disable_irq(unsigned int channel);
177void dma_enable_irq(unsigned int channel);
178void clear_dma_irqstat(unsigned int channel);
179void *dma_memcpy(void *dest, const void *src, size_t count);
180void *safe_dma_memcpy(void *dest, const void *src, size_t count);
181
77955664 182extern int channel2irq(unsigned int channel);
211daf9d 183extern struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS];
77955664 184
1394f032 185#endif
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