[deliverable/linux.git] / arch / blackfin / kernel / setup.c

/*
 * File:         arch/blackfin/kernel/setup.c
 * Based on:
 * Author:
 *
 * Created:
 * Description:
 *
 * Modified:
 *               Copyright 2004-2006 Analog Devices Inc.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/delay.h>
#include <linux/console.h>
#include <linux/bootmem.h>
#include <linux/seq_file.h>
#include <linux/cpu.h>
#include <linux/module.h>
#include <linux/tty.h>

#include <linux/ext2_fs.h>
#include <linux/cramfs_fs.h>
#include <linux/romfs_fs.h>

#include <asm/cplb.h>
#include <asm/cacheflush.h>
#include <asm/blackfin.h>
#include <asm/cplbinit.h>
#include <asm/fixed_code.h>
#include <asm/early_printk.h>

u16 _bfin_swrst;

unsigned long memory_start, memory_end, physical_mem_end;
unsigned long reserved_mem_dcache_on;
unsigned long reserved_mem_icache_on;
EXPORT_SYMBOL(memory_start);
EXPORT_SYMBOL(memory_end);
EXPORT_SYMBOL(physical_mem_end);
EXPORT_SYMBOL(_ramend);

#ifdef CONFIG_MTD_UCLINUX
unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
unsigned long _ebss;
EXPORT_SYMBOL(memory_mtd_end);
EXPORT_SYMBOL(memory_mtd_start);
EXPORT_SYMBOL(mtd_size);
#endif

char __initdata command_line[COMMAND_LINE_SIZE];

void __init bf53x_cache_init(void)
{
#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
	generate_cpl_tables();
#endif

#ifdef CONFIG_BFIN_ICACHE
	bfin_icache_init();
	printk(KERN_INFO "Instruction Cache Enabled\n");
#endif

#ifdef CONFIG_BFIN_DCACHE
	bfin_dcache_init();
	printk(KERN_INFO "Data Cache Enabled"
# if defined CONFIG_BFIN_WB
		" (write-back)"
# elif defined CONFIG_BFIN_WT
		" (write-through)"
# endif
		"\n");
#endif
}

void __init bf53x_relocate_l1_mem(void)
{
	unsigned long l1_code_length;
	unsigned long l1_data_a_length;
	unsigned long l1_data_b_length;

	l1_code_length = _etext_l1 - _stext_l1;
	if (l1_code_length > L1_CODE_LENGTH)
		l1_code_length = L1_CODE_LENGTH;
	/* cannot complain as printk is not available as yet.
	 * But we can continue booting and complain later!
	 */

	/* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
	dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);

	l1_data_a_length = _ebss_l1 - _sdata_l1;
	if (l1_data_a_length > L1_DATA_A_LENGTH)
		l1_data_a_length = L1_DATA_A_LENGTH;

	/* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
	dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);

	l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
	if (l1_data_b_length > L1_DATA_B_LENGTH)
		l1_data_b_length = L1_DATA_B_LENGTH;

	/* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
	dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
			l1_data_a_length, l1_data_b_length);

}

/*
 * Initial parsing of the command line.  Currently, we support:
 *  - Controlling the linux memory size: mem=xxx[KMG]
 *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
 *       $ -> reserved memory is dcacheable
 *       # -> reserved memory is icacheable
 */
static __init void parse_cmdline_early(char *cmdline_p)
{
	char c = ' ', *to = cmdline_p;
	unsigned int memsize;
	for (;;) {
		if (c == ' ') {

			if (!memcmp(to, "mem=", 4)) {
				to += 4;
				memsize = memparse(to, &to);
				if (memsize)
					_ramend = memsize;

			} else if (!memcmp(to, "max_mem=", 8)) {
				to += 8;
				memsize = memparse(to, &to);
				if (memsize) {
					physical_mem_end = memsize;
					if (*to != ' ') {
						if (*to == '$'
						    || *(to + 1) == '$')
							reserved_mem_dcache_on =
							    1;
						if (*to == '#'
						    || *(to + 1) == '#')
							reserved_mem_icache_on =
							    1;
					}
				}
			} else if (!memcmp(to, "earlyprintk=", 12)) {
				to += 12;
				setup_early_printk(to);
			}
		}
		c = *(to++);
		if (!c)
			break;
	}
}

void __init setup_arch(char **cmdline_p)
{
	int bootmap_size;
	unsigned long l1_length, sclk, cclk;
#ifdef CONFIG_MTD_UCLINUX
	unsigned long mtd_phys = 0;
#endif

#ifdef CONFIG_DUMMY_CONSOLE
	conswitchp = &dummy_con;
#endif

#if defined(CONFIG_CMDLINE_BOOL)
	strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
	command_line[sizeof(command_line) - 1] = 0;
#endif

	/* Keep a copy of command line */
	*cmdline_p = &command_line[0];
	memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
	boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';

	/* setup memory defaults from the user config */
	physical_mem_end = 0;
	_ramend = CONFIG_MEM_SIZE * 1024 * 1024;

	parse_cmdline_early(&command_line[0]);

	cclk = get_cclk();
	sclk = get_sclk();

#if !defined(CONFIG_BFIN_KERNEL_CLOCK)
	if (ANOMALY_05000273 && cclk == sclk)
		panic("ANOMALY 05000273, SCLK can not be same as CCLK");
#endif

#ifdef BF561_FAMILY
	if (ANOMALY_05000266) {
		bfin_read_IMDMA_D0_IRQ_STATUS();
		bfin_read_IMDMA_D1_IRQ_STATUS();
	}
#endif

	printk(KERN_INFO "Hardware Trace ");
	if (bfin_read_TBUFCTL() & 0x1 )
		printk("Active ");
	else
		printk("Off ");
	if (bfin_read_TBUFCTL() & 0x2)
		printk("and Enabled\n");
	else
	printk("and Disabled\n");


#if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
	/* we need to initialize the Flashrom device here since we might
	 * do things with flash early on in the boot
	 */
	flash_probe();
#endif

	if (physical_mem_end == 0)
		physical_mem_end = _ramend;

	/* by now the stack is part of the init task */
	memory_end = _ramend - DMA_UNCACHED_REGION;

	_ramstart = (unsigned long)__bss_stop;
	memory_start = PAGE_ALIGN(_ramstart);

#if defined(CONFIG_MTD_UCLINUX)
	/* generic memory mapped MTD driver */
	memory_mtd_end = memory_end;

	mtd_phys = _ramstart;
	mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));

# if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
	if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
		mtd_size =
		    PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
# endif

# if defined(CONFIG_CRAMFS)
	if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
		mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
# endif

# if defined(CONFIG_ROMFS_FS)
	if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
	    && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
		mtd_size =
		    PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
#  if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
	/* Due to a Hardware Anomaly we need to limit the size of usable
	 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
	 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
	 */
#   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
	if (memory_end >= 56 * 1024 * 1024)
		memory_end = 56 * 1024 * 1024;
#   else
	if (memory_end >= 60 * 1024 * 1024)
		memory_end = 60 * 1024 * 1024;
#   endif				/* CONFIG_DEBUG_HUNT_FOR_ZERO */
#  endif				/* ANOMALY_05000263 */
# endif				/* CONFIG_ROMFS_FS */

	memory_end -= mtd_size;

	if (mtd_size == 0) {
		console_init();
		panic("Don't boot kernel without rootfs attached.\n");
	}

	/* Relocate MTD image to the top of memory after the uncached memory area */
	dma_memcpy((char *)memory_end, __bss_stop, mtd_size);

	memory_mtd_start = memory_end;
	_ebss = memory_mtd_start;	/* define _ebss for compatible */
#endif				/* CONFIG_MTD_UCLINUX */

#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
	/* Due to a Hardware Anomaly we need to limit the size of usable
	 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
	 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
	 */
#if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
	if (memory_end >= 56 * 1024 * 1024)
		memory_end = 56 * 1024 * 1024;
#else
	if (memory_end >= 60 * 1024 * 1024)
		memory_end = 60 * 1024 * 1024;
#endif				/* CONFIG_DEBUG_HUNT_FOR_ZERO */
	printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
#endif				/* ANOMALY_05000263 */

#if !defined(CONFIG_MTD_UCLINUX)
	memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
#endif
	init_mm.start_code = (unsigned long)_stext;
	init_mm.end_code = (unsigned long)_etext;
	init_mm.end_data = (unsigned long)_edata;
	init_mm.brk = (unsigned long)0;

	init_leds();

	printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n");
	if (bfin_compiled_revid() == 0xffff)
		printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
	else if (bfin_compiled_revid() == -1)
		printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
	else
		printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
	if (bfin_revid() != bfin_compiled_revid()) {
		if (bfin_compiled_revid() == -1)
			printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
			       bfin_revid());
		else if (bfin_compiled_revid() != 0xffff)
			printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
			       bfin_compiled_revid(), bfin_revid());
	}
	if (bfin_revid() < SUPPORTED_REVID)
		printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
		       CPU, bfin_revid());
	printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");

	printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
	       cclk / 1000000,  sclk / 1000000);

	if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
		printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");

	printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
	printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);

	printk(KERN_INFO "Memory map:\n"
	       KERN_INFO "  text      = 0x%p-0x%p\n"
	       KERN_INFO "  rodata    = 0x%p-0x%p\n"
	       KERN_INFO "  data      = 0x%p-0x%p\n"
	       KERN_INFO "    stack   = 0x%p-0x%p\n"
	       KERN_INFO "  init      = 0x%p-0x%p\n"
	       KERN_INFO "  bss       = 0x%p-0x%p\n"
	       KERN_INFO "  available = 0x%p-0x%p\n"
#ifdef CONFIG_MTD_UCLINUX
	       KERN_INFO "  rootfs    = 0x%p-0x%p\n"
#endif
#if DMA_UNCACHED_REGION > 0
	       KERN_INFO "  DMA Zone  = 0x%p-0x%p\n"
#endif
	       , _stext, _etext,
	       __start_rodata, __end_rodata,
	       _sdata, _edata,
	       (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000),
	       __init_begin, __init_end,
	       __bss_start, __bss_stop,
	       (void *)_ramstart, (void *)memory_end
#ifdef CONFIG_MTD_UCLINUX
	       , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
#endif
#if DMA_UNCACHED_REGION > 0
	       , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
#endif
	       );

	/*
	 * give all the memory to the bootmap allocator,  tell it to put the
	 * boot mem_map at the start of memory
	 */
	bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT,	/* map goes here */
					 PAGE_OFFSET >> PAGE_SHIFT,
					 memory_end >> PAGE_SHIFT);
	/*
	 * free the usable memory,  we have to make sure we do not free
	 * the bootmem bitmap so we then reserve it after freeing it :-)
	 */
	free_bootmem(memory_start, memory_end - memory_start);

	reserve_bootmem(memory_start, bootmap_size);
	/*
	 * get kmalloc into gear
	 */
	paging_init();

	/* check the size of the l1 area */
	l1_length = _etext_l1 - _stext_l1;
	if (l1_length > L1_CODE_LENGTH)
		panic("L1 code memory overflow\n");

	l1_length = _ebss_l1 - _sdata_l1;
	if (l1_length > L1_DATA_A_LENGTH)
		panic("L1 data memory overflow\n");

	_bfin_swrst = bfin_read_SWRST();

	/* Copy atomic sequences to their fixed location, and sanity check that
	   these locations are the ones that we advertise to userspace.  */
	memcpy((void *)FIXED_CODE_START, &fixed_code_start,
	       FIXED_CODE_END - FIXED_CODE_START);
	BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
	       != SIGRETURN_STUB - FIXED_CODE_START);
	BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
	       != ATOMIC_XCHG32 - FIXED_CODE_START);
	BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
	       != ATOMIC_CAS32 - FIXED_CODE_START);
	BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
	       != ATOMIC_ADD32 - FIXED_CODE_START);
	BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
	       != ATOMIC_SUB32 - FIXED_CODE_START);
	BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
	       != ATOMIC_IOR32 - FIXED_CODE_START);
	BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
	       != ATOMIC_AND32 - FIXED_CODE_START);
	BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
	       != ATOMIC_XOR32 - FIXED_CODE_START);

	init_exception_vectors();
	bf53x_cache_init();
}

static int __init topology_init(void)
{
#if defined (CONFIG_BF561)
	static struct cpu cpu[2];
	register_cpu(&cpu[0], 0);
	register_cpu(&cpu[1], 1);
	return 0;
#else
	static struct cpu cpu[1];
	return register_cpu(cpu, 0);
#endif
}

subsys_initcall(topology_init);

static u_long get_vco(void)
{
	u_long msel;
	u_long vco;

	msel = (bfin_read_PLL_CTL() >> 9) & 0x3F;
	if (0 == msel)
		msel = 64;

	vco = CONFIG_CLKIN_HZ;
	vco >>= (1 & bfin_read_PLL_CTL());	/* DF bit */
	vco = msel * vco;
	return vco;
}

/*Get the Core clock*/
u_long get_cclk(void)
{
	u_long csel, ssel;
	if (bfin_read_PLL_STAT() & 0x1)
		return CONFIG_CLKIN_HZ;

	ssel = bfin_read_PLL_DIV();
	csel = ((ssel >> 4) & 0x03);
	ssel &= 0xf;
	if (ssel && ssel < (1 << csel))	/* SCLK > CCLK */
		return get_vco() / ssel;
	return get_vco() >> csel;
}
EXPORT_SYMBOL(get_cclk);

/* Get the System clock */
u_long get_sclk(void)
{
	u_long ssel;

	if (bfin_read_PLL_STAT() & 0x1)
		return CONFIG_CLKIN_HZ;

	ssel = (bfin_read_PLL_DIV() & 0xf);
	if (0 == ssel) {
		printk(KERN_WARNING "Invalid System Clock\n");
		ssel = 1;
	}

	return get_vco() / ssel;
}
EXPORT_SYMBOL(get_sclk);

/*
 *	Get CPU information for use by the procfs.
 */
static int show_cpuinfo(struct seq_file *m, void *v)
{
	char *cpu, *mmu, *fpu, *vendor, *cache;
	uint32_t revid;

	u_long cclk = 0, sclk = 0;
	u_int dcache_size = 0, dsup_banks = 0;

	cpu = CPU;
	mmu = "none";
	fpu = "none";
	revid = bfin_revid();

	cclk = get_cclk();
	sclk = get_sclk();

	switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
	case 0xca:
		vendor = "Analog Devices";
		break;
	default:
		vendor = "unknown";
		break;
	}

	seq_printf(m, "processor\t: %d\n"
		"vendor_id\t: %s\n"
		"cpu family\t: 0x%x\n"
		"model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK)\n"
		"stepping\t: %d\n",
		0,
		vendor,
		(bfin_read_CHIPID() & CHIPID_FAMILY),
		cpu, cclk/1000000, sclk/1000000,
		revid);

	seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
		cclk/1000000, cclk%1000000,
		sclk/1000000, sclk%1000000);
	seq_printf(m, "bogomips\t: %lu.%02lu\n"
		"Calibration\t: %lu loops\n",
		(loops_per_jiffy * HZ) / 500000,
		((loops_per_jiffy * HZ) / 5000) % 100,
		(loops_per_jiffy * HZ));

	/* Check Cache configutation */
	switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
	case ACACHE_BSRAM:
		cache = "dbank-A/B\t: cache/sram";
		dcache_size = 16;
		dsup_banks = 1;
		break;
	case ACACHE_BCACHE:
		cache = "dbank-A/B\t: cache/cache";
		dcache_size = 32;
		dsup_banks = 2;
		break;
	case ASRAM_BSRAM:
		cache = "dbank-A/B\t: sram/sram";
		dcache_size = 0;
		dsup_banks = 0;
		break;
	default:
		cache = "unknown";
		dcache_size = 0;
		dsup_banks = 0;
		break;
	}

	/* Is it turned on? */
	if (!((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE)))
		dcache_size = 0;

	seq_printf(m, "cache size\t: %d KB(L1 icache) "
		"%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
		BFIN_ICACHESIZE / 1024, dcache_size,
#if defined CONFIG_BFIN_WB
		"wb"
#elif defined CONFIG_BFIN_WT
		"wt"
#endif
		, 0);

	seq_printf(m, "%s\n", cache);

	seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
		   BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
	seq_printf(m,
		   "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
		   dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
		   BFIN_DLINES);
#ifdef CONFIG_BFIN_ICACHE_LOCK
	switch (read_iloc()) {
	case WAY0_L:
		seq_printf(m, "Way0 Locked-Down\n");
		break;
	case WAY1_L:
		seq_printf(m, "Way1 Locked-Down\n");
		break;
	case WAY01_L:
		seq_printf(m, "Way0,Way1 Locked-Down\n");
		break;
	case WAY2_L:
		seq_printf(m, "Way2 Locked-Down\n");
		break;
	case WAY02_L:
		seq_printf(m, "Way0,Way2 Locked-Down\n");
		break;
	case WAY12_L:
		seq_printf(m, "Way1,Way2 Locked-Down\n");
		break;
	case WAY012_L:
		seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
		break;
	case WAY3_L:
		seq_printf(m, "Way3 Locked-Down\n");
		break;
	case WAY03_L:
		seq_printf(m, "Way0,Way3 Locked-Down\n");
		break;
	case WAY13_L:
		seq_printf(m, "Way1,Way3 Locked-Down\n");
		break;
	case WAY013_L:
		seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
		break;
	case WAY32_L:
		seq_printf(m, "Way3,Way2 Locked-Down\n");
		break;
	case WAY320_L:
		seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
		break;
	case WAY321_L:
		seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
		break;
	case WAYALL_L:
		seq_printf(m, "All Ways are locked\n");
		break;
	default:
		seq_printf(m, "No Ways are locked\n");
	}
#endif

	seq_printf(m, "board name\t: %s\n", bfin_board_name);
	seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
		 physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
	seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
		((int)memory_end - (int)_stext) >> 10,
		_stext,
		(void *)memory_end);

	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	return *pos < NR_CPUS ? ((void *)0x12345678) : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_start(m, pos);
}

static void c_stop(struct seq_file *m, void *v)
{
}

struct seq_operations cpuinfo_op = {
	.start = c_start,
	.next = c_next,
	.stop = c_stop,
	.show = show_cpuinfo,
};

void __init cmdline_init(const char *r0)
{
	if (r0)
		strncpy(command_line, r0, COMMAND_LINE_SIZE);
}
Commit	Line	Data
1394f032 BW	1	/*
	2	* File: arch/blackfin/kernel/setup.c
	3	* Based on:
	4	* Author:
	5	*
	6	* Created:
	7	* Description:
	8	*
	9	* Modified:
	10	* Copyright 2004-2006 Analog Devices Inc.
	11	*
	12	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	13	*
	14	* This program is free software; you can redistribute it and/or modify
	15	* it under the terms of the GNU General Public License as published by
	16	* the Free Software Foundation; either version 2 of the License, or
	17	* (at your option) any later version.
	18	*
	19	* This program is distributed in the hope that it will be useful,
	20	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	21	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	22	* GNU General Public License for more details.
	23	*
	24	* You should have received a copy of the GNU General Public License
	25	* along with this program; if not, see the file COPYING, or write
	26	* to the Free Software Foundation, Inc.,
	27	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	28	*/
	29
	30	#include <linux/delay.h>
	31	#include <linux/console.h>
	32	#include <linux/bootmem.h>
	33	#include <linux/seq_file.h>
	34	#include <linux/cpu.h>
	35	#include <linux/module.h>
1394f032 BW	36	#include <linux/tty.h>
	37
	38	#include <linux/ext2_fs.h>
	39	#include <linux/cramfs_fs.h>
	40	#include <linux/romfs_fs.h>
	41
3bebca2d	42	#include <asm/cplb.h>
1394f032 BW	43	#include <asm/cacheflush.h>
	44	#include <asm/blackfin.h>
	45	#include <asm/cplbinit.h>
7adfb58f	46	#include <asm/fixed_code.h>
ce3afa1c	47	#include <asm/early_printk.h>
1394f032	48
a9c59c27 MF	49	u16 _bfin_swrst;
a9c59c27 MF	50
1394f032 BW	51	unsigned long memory_start, memory_end, physical_mem_end;
	52	unsigned long reserved_mem_dcache_on;
	53	unsigned long reserved_mem_icache_on;
	54	EXPORT_SYMBOL(memory_start);
	55	EXPORT_SYMBOL(memory_end);
	56	EXPORT_SYMBOL(physical_mem_end);
	57	EXPORT_SYMBOL(_ramend);
	58
	59	#ifdef CONFIG_MTD_UCLINUX
	60	unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
	61	unsigned long _ebss;
	62	EXPORT_SYMBOL(memory_mtd_end);
	63	EXPORT_SYMBOL(memory_mtd_start);
	64	EXPORT_SYMBOL(mtd_size);
	65	#endif
	66
5e10b4a6	67	char __initdata command_line[COMMAND_LINE_SIZE];
1394f032	68
1394f032 BW	69	void __init bf53x_cache_init(void)
1394f032 BW	70	{
3bebca2d	71	#if defined(CONFIG_BFIN_DCACHE) \|\| defined(CONFIG_BFIN_ICACHE)
1394f032 BW	72	generate_cpl_tables();
	73	#endif
	74
3bebca2d	75	#ifdef CONFIG_BFIN_ICACHE
1394f032 BW	76	bfin_icache_init();
	77	printk(KERN_INFO "Instruction Cache Enabled\n");
	78	#endif
	79
3bebca2d	80	#ifdef CONFIG_BFIN_DCACHE
1394f032 BW	81	bfin_dcache_init();
1394f032 BW	82	printk(KERN_INFO "Data Cache Enabled"
3bebca2d	83	# if defined CONFIG_BFIN_WB
1394f032	84	" (write-back)"
3bebca2d	85	# elif defined CONFIG_BFIN_WT
1394f032 BW	86	" (write-through)"
	87	# endif
	88	"\n");
	89	#endif
	90	}
	91
52a07812	92	void __init bf53x_relocate_l1_mem(void)
1394f032 BW	93	{
	94	unsigned long l1_code_length;
	95	unsigned long l1_data_a_length;
	96	unsigned long l1_data_b_length;
	97
	98	l1_code_length = _etext_l1 - _stext_l1;
	99	if (l1_code_length > L1_CODE_LENGTH)
	100	l1_code_length = L1_CODE_LENGTH;
	101	/* cannot complain as printk is not available as yet.
	102	* But we can continue booting and complain later!
	103	*/
	104
	105	/* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
	106	dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
	107
	108	l1_data_a_length = _ebss_l1 - _sdata_l1;
	109	if (l1_data_a_length > L1_DATA_A_LENGTH)
	110	l1_data_a_length = L1_DATA_A_LENGTH;
	111
	112	/* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
	113	dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
	114
	115	l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
	116	if (l1_data_b_length > L1_DATA_B_LENGTH)
	117	l1_data_b_length = L1_DATA_B_LENGTH;
	118
	119	/* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
	120	dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
	121	l1_data_a_length, l1_data_b_length);
	122
	123	}
	124
	125	/*
	126	* Initial parsing of the command line. Currently, we support:
	127	* - Controlling the linux memory size: mem=xxx[KMG]
	128	* - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
	129	* $ -> reserved memory is dcacheable
	130	* # -> reserved memory is icacheable
	131	*/
	132	static __init void parse_cmdline_early(char *cmdline_p)
	133	{
	134	char c = ' ', *to = cmdline_p;
	135	unsigned int memsize;
	136	for (;;) {
	137	if (c == ' ') {
	138
	139	if (!memcmp(to, "mem=", 4)) {
	140	to += 4;
	141	memsize = memparse(to, &to);
	142	if (memsize)
	143	_ramend = memsize;
	144
	145	} else if (!memcmp(to, "max_mem=", 8)) {
	146	to += 8;
	147	memsize = memparse(to, &to);
	148	if (memsize) {
	149	physical_mem_end = memsize;
	150	if (*to != ' ') {
	151	if (*to == '$'
	152	\|\| *(to + 1) == '$')
	153	reserved_mem_dcache_on =
	154	1;
	155	if (*to == '#'
	156	\|\| *(to + 1) == '#')
157	reserved_mem_icache_on =
158	1;
159	}
160	}
ce3afa1c RG	161	} else if (!memcmp(to, "earlyprintk=", 12)) {
	162	to += 12;
	163	setup_early_printk(to);
1394f032	164	}
1394f032 BW	165	}
	166	c = *(to++);
	167	if (!c)
	168	break;
	169	}
	170	}
	171
	172	void __init setup_arch(char **cmdline_p)
	173	{
	174	int bootmap_size;
	175	unsigned long l1_length, sclk, cclk;
	176	#ifdef CONFIG_MTD_UCLINUX
	177	unsigned long mtd_phys = 0;
	178	#endif
	179
6e537e93 MH	180	#ifdef CONFIG_DUMMY_CONSOLE
	181	conswitchp = &dummy_con;
	182	#endif
ce3afa1c RG	183
	184	#if defined(CONFIG_CMDLINE_BOOL)
	185	strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
	186	command_line[sizeof(command_line) - 1] = 0;
	187	#endif
	188
	189	/* Keep a copy of command line */
	190	*cmdline_p = &command_line[0];
	191	memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
	192	boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
	193
	194	/* setup memory defaults from the user config */
	195	physical_mem_end = 0;
	196	_ramend = CONFIG_MEM_SIZE * 1024 * 1024;
	197
	198	parse_cmdline_early(&command_line[0]);
	199
1394f032 BW	200	cclk = get_cclk();
	201	sclk = get_sclk();
	202
1aafd909 MF	203	#if !defined(CONFIG_BFIN_KERNEL_CLOCK)
1aafd909 MF	204	if (ANOMALY_05000273 && cclk == sclk)
1394f032 BW	205	panic("ANOMALY 05000273, SCLK can not be same as CCLK");
	206	#endif
	207
1aafd909 MF	208	#ifdef BF561_FAMILY
	209	if (ANOMALY_05000266) {
	210	bfin_read_IMDMA_D0_IRQ_STATUS();
	211	bfin_read_IMDMA_D1_IRQ_STATUS();
	212	}
1394f032 BW	213	#endif
1394f032 BW	214
669b792c RG	215	printk(KERN_INFO "Hardware Trace ");
	216	if (bfin_read_TBUFCTL() & 0x1 )
	217	printk("Active ");
	218	else
	219	printk("Off ");
	220	if (bfin_read_TBUFCTL() & 0x2)
	221	printk("and Enabled\n");
	222	else
	223	printk("and Disabled\n");
	224
	225
1394f032 BW	226	#if defined(CONFIG_CHR_DEV_FLASH) \|\| defined(CONFIG_BLK_DEV_FLASH)
	227	/* we need to initialize the Flashrom device here since we might
	228	* do things with flash early on in the boot
	229	*/
	230	flash_probe();
	231	#endif
	232
1394f032 BW	233	if (physical_mem_end == 0)
	234	physical_mem_end = _ramend;
	235
	236	/* by now the stack is part of the init task */
	237	memory_end = _ramend - DMA_UNCACHED_REGION;
	238
	239	_ramstart = (unsigned long)__bss_stop;
	240	memory_start = PAGE_ALIGN(_ramstart);
	241
	242	#if defined(CONFIG_MTD_UCLINUX)
	243	/* generic memory mapped MTD driver */
	244	memory_mtd_end = memory_end;
	245
	246	mtd_phys = _ramstart;
	247	mtd_size = PAGE_ALIGN(((unsigned long )(mtd_phys + 8)));
	248
	249	# if defined(CONFIG_EXT2_FS) \|\| defined(CONFIG_EXT3_FS)
	250	if (((unsigned short )(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
	251	mtd_size =
	252	PAGE_ALIGN(((unsigned long )(mtd_phys + 0x404)) << 10);
	253	# endif
	254
	255	# if defined(CONFIG_CRAMFS)
	256	if (((unsigned long )(mtd_phys)) == CRAMFS_MAGIC)
	257	mtd_size = PAGE_ALIGN(((unsigned long )(mtd_phys + 0x4)));
	258	# endif
	259
	260	# if defined(CONFIG_ROMFS_FS)
	261	if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
	262	&& ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
	263	mtd_size =
	264	PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
3bebca2d	265	# if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
1394f032 BW	266	/* Due to a Hardware Anomaly we need to limit the size of usable
	267	* instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
	268	* 05000263 - Hardware loop corrupted when taking an ICPLB exception
	269	*/
	270	# if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
	271	if (memory_end >= 56 * 1024 * 1024)
	272	memory_end = 56 * 1024 * 1024;
	273	# else
	274	if (memory_end >= 60 * 1024 * 1024)
	275	memory_end = 60 * 1024 * 1024;
	276	# endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
	277	# endif /* ANOMALY_05000263 */
	278	# endif /* CONFIG_ROMFS_FS */
	279
	280	memory_end -= mtd_size;
	281
	282	if (mtd_size == 0) {
	283	console_init();
	284	panic("Don't boot kernel without rootfs attached.\n");
	285	}
	286
	287	/* Relocate MTD image to the top of memory after the uncached memory area */
	288	dma_memcpy((char *)memory_end, __bss_stop, mtd_size);
	289
	290	memory_mtd_start = memory_end;
	291	_ebss = memory_mtd_start; /* define _ebss for compatible */
	292	#endif /* CONFIG_MTD_UCLINUX */
	293
3bebca2d	294	#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
1394f032 BW	295	/* Due to a Hardware Anomaly we need to limit the size of usable
	296	* instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
	297	* 05000263 - Hardware loop corrupted when taking an ICPLB exception
	298	*/
	299	#if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
	300	if (memory_end >= 56 * 1024 * 1024)
	301	memory_end = 56 * 1024 * 1024;
	302	#else
	303	if (memory_end >= 60 * 1024 * 1024)
	304	memory_end = 60 * 1024 * 1024;
	305	#endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
	306	printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
	307	#endif /* ANOMALY_05000263 */
	308
	309	#if !defined(CONFIG_MTD_UCLINUX)
	310	memory_end -= SIZE_4K; /In case there is no valid CPLB behind memory_end make sure we don't get to close/
	311	#endif
	312	init_mm.start_code = (unsigned long)_stext;
	313	init_mm.end_code = (unsigned long)_etext;
	314	init_mm.end_data = (unsigned long)_edata;
	315	init_mm.brk = (unsigned long)0;
	316
	317	init_leds();
	318
	319	printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n");
de3025f4 JZ	320	if (bfin_compiled_revid() == 0xffff)
	321	printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
	322	else if (bfin_compiled_revid() == -1)
	323	printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
	324	else
	325	printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
	326	if (bfin_revid() != bfin_compiled_revid()) {
	327	if (bfin_compiled_revid() == -1)
	328	printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
	329	bfin_revid());
	330	else if (bfin_compiled_revid() != 0xffff)
	331	printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
	332	bfin_compiled_revid(), bfin_revid());
	333	}
1394f032 BW	334	if (bfin_revid() < SUPPORTED_REVID)
	335	printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
	336	CPU, bfin_revid());
	337	printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
	338
b5c0e2e8	339	printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
1394f032 BW	340	cclk / 1000000, sclk / 1000000);
1394f032 BW	341
1aafd909	342	if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
1394f032	343	printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
1394f032 BW	344
	345	printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
	346	printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
	347
	348	printk(KERN_INFO "Memory map:\n"
	349	KERN_INFO " text = 0x%p-0x%p\n"
86b73c8c	350	KERN_INFO " rodata = 0x%p-0x%p\n"
1394f032	351	KERN_INFO " data = 0x%p-0x%p\n"
86b73c8c RG	352	KERN_INFO " stack = 0x%p-0x%p\n"
86b73c8c RG	353	KERN_INFO " init = 0x%p-0x%p\n"
1394f032 BW	354	KERN_INFO " bss = 0x%p-0x%p\n"
	355	KERN_INFO " available = 0x%p-0x%p\n"
	356	#ifdef CONFIG_MTD_UCLINUX
	357	KERN_INFO " rootfs = 0x%p-0x%p\n"
	358	#endif
	359	#if DMA_UNCACHED_REGION > 0
	360	KERN_INFO " DMA Zone = 0x%p-0x%p\n"
	361	#endif
	362	, _stext, _etext,
86b73c8c	363	__start_rodata, __end_rodata,
1394f032	364	_sdata, _edata,
1f83b8f1	365	(void )&init_thread_union, (void )((int)(&init_thread_union) + 0x2000),
86b73c8c	366	__init_begin, __init_end,
1394f032	367	__bss_start, __bss_stop,
1f83b8f1	368	(void )_ramstart, (void )memory_end
1394f032	369	#ifdef CONFIG_MTD_UCLINUX
1f83b8f1	370	, (void )memory_mtd_start, (void )(memory_mtd_start + mtd_size)
1394f032 BW	371	#endif
1394f032 BW	372	#if DMA_UNCACHED_REGION > 0
1f83b8f1	373	, (void )(_ramend - DMA_UNCACHED_REGION), (void )(_ramend)
1394f032 BW	374	#endif
	375	);
	376
	377	/*
	378	* give all the memory to the bootmap allocator, tell it to put the
	379	* boot mem_map at the start of memory
	380	*/
	381	bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT, /* map goes here */
	382	PAGE_OFFSET >> PAGE_SHIFT,
	383	memory_end >> PAGE_SHIFT);
	384	/*
	385	* free the usable memory, we have to make sure we do not free
	386	* the bootmem bitmap so we then reserve it after freeing it :-)
	387	*/
	388	free_bootmem(memory_start, memory_end - memory_start);
	389
	390	reserve_bootmem(memory_start, bootmap_size);
	391	/*
	392	* get kmalloc into gear
	393	*/
	394	paging_init();
	395
	396	/* check the size of the l1 area */
	397	l1_length = _etext_l1 - _stext_l1;
	398	if (l1_length > L1_CODE_LENGTH)
34e0fc89	399	panic("L1 code memory overflow\n");
1394f032 BW	400
	401	l1_length = _ebss_l1 - _sdata_l1;
	402	if (l1_length > L1_DATA_A_LENGTH)
34e0fc89	403	panic("L1 data memory overflow\n");
1394f032	404
a9c59c27	405	_bfin_swrst = bfin_read_SWRST();
a9c59c27	406
7adfb58f BS	407	/* Copy atomic sequences to their fixed location, and sanity check that
	408	these locations are the ones that we advertise to userspace. */
	409	memcpy((void *)FIXED_CODE_START, &fixed_code_start,
	410	FIXED_CODE_END - FIXED_CODE_START);
	411	BUG_ON((char )&sigreturn_stub - (char )&fixed_code_start
	412	!= SIGRETURN_STUB - FIXED_CODE_START);
	413	BUG_ON((char )&atomic_xchg32 - (char )&fixed_code_start
	414	!= ATOMIC_XCHG32 - FIXED_CODE_START);
	415	BUG_ON((char )&atomic_cas32 - (char )&fixed_code_start
	416	!= ATOMIC_CAS32 - FIXED_CODE_START);
	417	BUG_ON((char )&atomic_add32 - (char )&fixed_code_start
	418	!= ATOMIC_ADD32 - FIXED_CODE_START);
	419	BUG_ON((char )&atomic_sub32 - (char )&fixed_code_start
	420	!= ATOMIC_SUB32 - FIXED_CODE_START);
	421	BUG_ON((char )&atomic_ior32 - (char )&fixed_code_start
	422	!= ATOMIC_IOR32 - FIXED_CODE_START);
	423	BUG_ON((char )&atomic_and32 - (char )&fixed_code_start
	424	!= ATOMIC_AND32 - FIXED_CODE_START);
	425	BUG_ON((char )&atomic_xor32 - (char )&fixed_code_start
	426	!= ATOMIC_XOR32 - FIXED_CODE_START);
29440a2b	427
8be80ed3	428	init_exception_vectors();
29440a2b	429	bf53x_cache_init();
1394f032 BW	430	}
1394f032 BW	431
1394f032 BW	432	static int __init topology_init(void)
	433	{
	434	#if defined (CONFIG_BF561)
c0fc525d	435	static struct cpu cpu[2];
1394f032 BW	436	register_cpu(&cpu[0], 0);
	437	register_cpu(&cpu[1], 1);
	438	return 0;
	439	#else
c0fc525d	440	static struct cpu cpu[1];
1394f032 BW	441	return register_cpu(cpu, 0);
	442	#endif
	443	}
	444
	445	subsys_initcall(topology_init);
	446
52a07812	447	static u_long get_vco(void)
1394f032 BW	448	{
	449	u_long msel;
	450	u_long vco;
	451
	452	msel = (bfin_read_PLL_CTL() >> 9) & 0x3F;
	453	if (0 == msel)
	454	msel = 64;
	455
	456	vco = CONFIG_CLKIN_HZ;
	457	vco >>= (1 & bfin_read_PLL_CTL()); /* DF bit */
	458	vco = msel * vco;
	459	return vco;
	460	}
	461
	462	/Get the Core clock/
	463	u_long get_cclk(void)
	464	{
	465	u_long csel, ssel;
	466	if (bfin_read_PLL_STAT() & 0x1)
	467	return CONFIG_CLKIN_HZ;
	468
	469	ssel = bfin_read_PLL_DIV();
	470	csel = ((ssel >> 4) & 0x03);
	471	ssel &= 0xf;
	472	if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
	473	return get_vco() / ssel;
	474	return get_vco() >> csel;
	475	}
1394f032 BW	476	EXPORT_SYMBOL(get_cclk);
	477
	478	/* Get the System clock */
	479	u_long get_sclk(void)
	480	{
	481	u_long ssel;
	482
	483	if (bfin_read_PLL_STAT() & 0x1)
	484	return CONFIG_CLKIN_HZ;
	485
	486	ssel = (bfin_read_PLL_DIV() & 0xf);
	487	if (0 == ssel) {
	488	printk(KERN_WARNING "Invalid System Clock\n");
	489	ssel = 1;
	490	}
	491
	492	return get_vco() / ssel;
	493	}
1394f032 BW	494	EXPORT_SYMBOL(get_sclk);
	495
	496	/*
	497	* Get CPU information for use by the procfs.
	498	*/
	499	static int show_cpuinfo(struct seq_file m, void v)
	500	{
066954a3	501	char cpu, mmu, fpu, vendor, *cache;
1394f032 BW	502	uint32_t revid;
	503
	504	u_long cclk = 0, sclk = 0;
	505	u_int dcache_size = 0, dsup_banks = 0;
	506
	507	cpu = CPU;
	508	mmu = "none";
	509	fpu = "none";
	510	revid = bfin_revid();
1394f032 BW	511
	512	cclk = get_cclk();
	513	sclk = get_sclk();
	514
73b0c0b0	515	switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
066954a3 MF	516	case 0xca:
066954a3 MF	517	vendor = "Analog Devices";
73b0c0b0 RG	518	break;
73b0c0b0 RG	519	default:
066954a3 MF	520	vendor = "unknown";
066954a3 MF	521	break;
73b0c0b0	522	}
1394f032	523
73b0c0b0 RG	524	seq_printf(m, "processor\t: %d\n"
	525	"vendor_id\t: %s\n"
	526	"cpu family\t: 0x%x\n"
	527	"model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK)\n"
	528	"stepping\t: %d\n",
	529	0,
	530	vendor,
	531	(bfin_read_CHIPID() & CHIPID_FAMILY),
	532	cpu, cclk/1000000, sclk/1000000,
	533	revid);
	534
	535	seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
	536	cclk/1000000, cclk%1000000,
	537	sclk/1000000, sclk%1000000);
	538	seq_printf(m, "bogomips\t: %lu.%02lu\n"
	539	"Calibration\t: %lu loops\n",
	540	(loops_per_jiffy * HZ) / 500000,
	541	((loops_per_jiffy * HZ) / 5000) % 100,
	542	(loops_per_jiffy * HZ));
	543
	544	/* Check Cache configutation */
1f83b8f1 MF	545	switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P \| 1 << DMC1_P)) {
1f83b8f1 MF	546	case ACACHE_BSRAM:
066954a3	547	cache = "dbank-A/B\t: cache/sram";
1f83b8f1 MF	548	dcache_size = 16;
	549	dsup_banks = 1;
	550	break;
	551	case ACACHE_BCACHE:
066954a3	552	cache = "dbank-A/B\t: cache/cache";
1f83b8f1 MF	553	dcache_size = 32;
	554	dsup_banks = 2;
	555	break;
	556	case ASRAM_BSRAM:
066954a3	557	cache = "dbank-A/B\t: sram/sram";
1f83b8f1 MF	558	dcache_size = 0;
	559	dsup_banks = 0;
	560	break;
	561	default:
066954a3	562	cache = "unknown";
73b0c0b0 RG	563	dcache_size = 0;
73b0c0b0 RG	564	dsup_banks = 0;
1394f032 BW	565	break;
	566	}
	567
73b0c0b0 RG	568	/* Is it turned on? */
	569	if (!((bfin_read_DMEM_CONTROL()) & (ENDCPLB \| DMC_ENABLE)))
	570	dcache_size = 0;
1394f032	571
73b0c0b0 RG	572	seq_printf(m, "cache size\t: %d KB(L1 icache) "
	573	"%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
	574	BFIN_ICACHESIZE / 1024, dcache_size,
	575	#if defined CONFIG_BFIN_WB
	576	"wb"
	577	#elif defined CONFIG_BFIN_WT
	578	"wt"
	579	#endif
	580	, 0);
	581
	582	seq_printf(m, "%s\n", cache);
	583
	584	seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
3bebca2d	585	BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1394f032	586	seq_printf(m,
73b0c0b0	587	"dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
3bebca2d RG	588	dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
	589	BFIN_DLINES);
	590	#ifdef CONFIG_BFIN_ICACHE_LOCK
1394f032 BW	591	switch (read_iloc()) {
	592	case WAY0_L:
	593	seq_printf(m, "Way0 Locked-Down\n");
	594	break;
	595	case WAY1_L:
	596	seq_printf(m, "Way1 Locked-Down\n");
	597	break;
	598	case WAY01_L:
	599	seq_printf(m, "Way0,Way1 Locked-Down\n");
	600	break;
	601	case WAY2_L:
	602	seq_printf(m, "Way2 Locked-Down\n");
	603	break;
	604	case WAY02_L:
	605	seq_printf(m, "Way0,Way2 Locked-Down\n");
	606	break;
	607	case WAY12_L:
	608	seq_printf(m, "Way1,Way2 Locked-Down\n");
	609	break;
	610	case WAY012_L:
	611	seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
	612	break;
	613	case WAY3_L:
	614	seq_printf(m, "Way3 Locked-Down\n");
	615	break;
	616	case WAY03_L:
	617	seq_printf(m, "Way0,Way3 Locked-Down\n");
	618	break;
	619	case WAY13_L:
	620	seq_printf(m, "Way1,Way3 Locked-Down\n");
	621	break;
	622	case WAY013_L:
	623	seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
	624	break;
	625	case WAY32_L:
	626	seq_printf(m, "Way3,Way2 Locked-Down\n");
	627	break;
	628	case WAY320_L:
	629	seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
	630	break;
	631	case WAY321_L:
	632	seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
	633	break;
	634	case WAYALL_L:
	635	seq_printf(m, "All Ways are locked\n");
	636	break;
	637	default:
	638	seq_printf(m, "No Ways are locked\n");
	639	}
	640	#endif
73b0c0b0	641
066954a3	642	seq_printf(m, "board name\t: %s\n", bfin_board_name);
73b0c0b0 RG	643	seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
	644	physical_mem_end >> 10, (void )0, (void )physical_mem_end);
	645	seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
	646	((int)memory_end - (int)_stext) >> 10,
	647	_stext,
	648	(void *)memory_end);
	649
1394f032 BW	650	return 0;
	651	}
	652
	653	static void c_start(struct seq_file m, loff_t *pos)
	654	{
	655	return pos < NR_CPUS ? ((void )0x12345678) : NULL;
	656	}
	657
	658	static void c_next(struct seq_file m, void v, loff_t pos)
	659	{
	660	++*pos;
	661	return c_start(m, pos);
	662	}
	663
	664	static void c_stop(struct seq_file m, void v)
	665	{
	666	}
	667
	668	struct seq_operations cpuinfo_op = {
	669	.start = c_start,
	670	.next = c_next,
	671	.stop = c_stop,
	672	.show = show_cpuinfo,
	673	};
	674
5e10b4a6	675	void __init cmdline_init(const char *r0)
1394f032 BW	676	{
1394f032 BW	677	if (r0)
52a07812	678	strncpy(command_line, r0, COMMAND_LINE_SIZE);
1394f032	679	}