Commit | Line | Data |
---|---|---|
5df326ac MF |
1 | config BF51x |
2 | def_bool y | |
3 | depends on (BF512 || BF514 || BF516 || BF518) | |
4 | ||
2f6f4bcd BW |
5 | if (BF51x) |
6 | ||
7 | source "arch/blackfin/mach-bf518/boards/Kconfig" | |
8 | ||
9 | menu "BF518 Specific Configuration" | |
10 | ||
11 | comment "Alternative Multiplexing Scheme" | |
12 | ||
13 | choice | |
14 | prompt "SPORT0" | |
15 | default BF518_SPORT0_PORTG | |
16 | help | |
17 | Select PORT used for SPORT0. See Hardware Reference Manual | |
18 | ||
19 | config BF518_SPORT0_PORTF | |
20 | bool "PORT F" | |
21 | help | |
22 | PORT F | |
23 | ||
24 | config BF518_SPORT0_PORTG | |
25 | bool "PORT G" | |
26 | help | |
27 | PORT G | |
28 | endchoice | |
29 | ||
30 | choice | |
31 | prompt "SPORT0 TSCLK Location" | |
32 | depends on BF518_SPORT0_PORTG | |
33 | default BF518_SPORT0_TSCLK_PG10 | |
34 | help | |
35 | Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual | |
36 | ||
37 | config BF518_SPORT0_TSCLK_PG10 | |
38 | bool "PORT PG10" | |
39 | help | |
40 | PORT PG10 | |
41 | ||
42 | config BF518_SPORT0_TSCLK_PG14 | |
43 | bool "PORT PG14" | |
44 | help | |
45 | PORT PG14 | |
46 | endchoice | |
47 | ||
48 | choice | |
49 | prompt "UART1" | |
50 | default BF518_UART1_PORTF | |
51 | help | |
52 | Select PORT used for UART1. See Hardware Reference Manual | |
53 | ||
54 | config BF518_UART1_PORTF | |
55 | bool "PORT F" | |
56 | help | |
57 | PORT F | |
58 | ||
59 | config BF518_UART1_PORTG | |
60 | bool "PORT G" | |
61 | help | |
62 | PORT G | |
63 | endchoice | |
64 | ||
7a4a207e MH |
65 | comment "Hysteresis/Schmitt Trigger Control" |
66 | config BFIN_HYSTERESIS_CONTROL | |
67 | bool "Enable Hysteresis Control" | |
68 | help | |
69 | The ADSP-BF51x allows to control input hysteresis for Port F, | |
70 | Port G and Port H and other processor signal inputs. | |
71 | The Schmitt trigger enables can be set only for pin groups. | |
72 | Saying Y will overwrite the default reset or boot loader | |
73 | initialization. | |
74 | ||
75 | menu "PORT F" | |
76 | depends on BFIN_HYSTERESIS_CONTROL | |
77 | config GPIO_HYST_PORTF_0_7 | |
78 | bool "Enable Hysteresis on PORTF {0...7}" | |
79 | config GPIO_HYST_PORTF_8_9 | |
80 | bool "Enable Hysteresis on PORTF {8, 9}" | |
81 | config GPIO_HYST_PORTF_10 | |
82 | bool "Enable Hysteresis on PORTF 10" | |
83 | config GPIO_HYST_PORTF_11 | |
84 | bool "Enable Hysteresis on PORTF 11" | |
85 | config GPIO_HYST_PORTF_12_13 | |
86 | bool "Enable Hysteresis on PORTF {12, 13}" | |
87 | config GPIO_HYST_PORTF_14_15 | |
88 | bool "Enable Hysteresis on PORTF {14, 15}" | |
89 | endmenu | |
90 | ||
91 | menu "PORT G" | |
92 | depends on BFIN_HYSTERESIS_CONTROL | |
93 | config GPIO_HYST_PORTG_0 | |
94 | bool "Enable Hysteresis on PORTG 0" | |
95 | config GPIO_HYST_PORTG_1_4 | |
96 | bool "Enable Hysteresis on PORTG {1...4}" | |
97 | config GPIO_HYST_PORTG_5_6 | |
98 | bool "Enable Hysteresis on PORTG {5, 6}" | |
99 | config GPIO_HYST_PORTG_7_8 | |
100 | bool "Enable Hysteresis on PORTG {7, 8}" | |
101 | config GPIO_HYST_PORTG_9 | |
102 | bool "Enable Hysteresis on PORTG 9" | |
103 | config GPIO_HYST_PORTG_10 | |
104 | bool "Enable Hysteresis on PORTG 10" | |
105 | config GPIO_HYST_PORTG_11_13 | |
106 | bool "Enable Hysteresis on PORTG {11...13}" | |
107 | config GPIO_HYST_PORTG_14_15 | |
108 | bool "Enable Hysteresis on PORTG {14, 15}" | |
109 | endmenu | |
110 | ||
111 | menu "PORT H" | |
112 | depends on BFIN_HYSTERESIS_CONTROL | |
113 | config GPIO_HYST_PORTH_0_7 | |
114 | bool "Enable Hysteresis on PORTH {0...7}" | |
115 | ||
116 | endmenu | |
117 | ||
118 | menu "None-GPIO" | |
119 | depends on BFIN_HYSTERESIS_CONTROL | |
120 | config NONEGPIO_HYST_NMI_RST_BMODE | |
121 | bool "Enable Hysteresis on {NMI, RESET, BMODE}" | |
122 | config NONEGPIO_HYST_JTAG | |
123 | bool "Enable Hysteresis on JTAG" | |
124 | endmenu | |
125 | ||
2f6f4bcd BW |
126 | comment "Interrupt Priority Assignment" |
127 | menu "Priority" | |
128 | ||
129 | config IRQ_PLL_WAKEUP | |
130 | int "IRQ_PLL_WAKEUP" | |
131 | default 7 | |
132 | config IRQ_DMA0_ERROR | |
133 | int "IRQ_DMA0_ERROR" | |
134 | default 7 | |
135 | config IRQ_DMAR0_BLK | |
136 | int "IRQ_DMAR0_BLK" | |
137 | default 7 | |
138 | config IRQ_DMAR1_BLK | |
139 | int "IRQ_DMAR1_BLK" | |
140 | default 7 | |
141 | config IRQ_DMAR0_OVR | |
142 | int "IRQ_DMAR0_OVR" | |
143 | default 7 | |
144 | config IRQ_DMAR1_OVR | |
145 | int "IRQ_DMAR1_OVR" | |
146 | default 7 | |
147 | config IRQ_PPI_ERROR | |
148 | int "IRQ_PPI_ERROR" | |
149 | default 7 | |
150 | config IRQ_MAC_ERROR | |
151 | int "IRQ_MAC_ERROR" | |
152 | default 7 | |
153 | config IRQ_SPORT0_ERROR | |
154 | int "IRQ_SPORT0_ERROR" | |
155 | default 7 | |
156 | config IRQ_SPORT1_ERROR | |
157 | int "IRQ_SPORT1_ERROR" | |
158 | default 7 | |
159 | config IRQ_PTP_ERROR | |
160 | int "IRQ_PTP_ERROR" | |
161 | default 7 | |
162 | config IRQ_UART0_ERROR | |
163 | int "IRQ_UART0_ERROR" | |
164 | default 7 | |
165 | config IRQ_UART1_ERROR | |
166 | int "IRQ_UART1_ERROR" | |
167 | default 7 | |
168 | config IRQ_RTC | |
169 | int "IRQ_RTC" | |
170 | default 8 | |
171 | config IRQ_PPI | |
172 | int "IRQ_PPI" | |
173 | default 8 | |
174 | config IRQ_SPORT0_RX | |
175 | int "IRQ_SPORT0_RX" | |
176 | default 9 | |
177 | config IRQ_SPORT0_TX | |
178 | int "IRQ_SPORT0_TX" | |
179 | default 9 | |
180 | config IRQ_SPORT1_RX | |
181 | int "IRQ_SPORT1_RX" | |
182 | default 9 | |
183 | config IRQ_SPORT1_TX | |
184 | int "IRQ_SPORT1_TX" | |
185 | default 9 | |
186 | config IRQ_TWI | |
187 | int "IRQ_TWI" | |
188 | default 10 | |
189 | config IRQ_SPI0 | |
190 | int "IRQ_SPI" | |
191 | default 10 | |
192 | config IRQ_UART0_RX | |
193 | int "IRQ_UART0_RX" | |
194 | default 10 | |
195 | config IRQ_UART0_TX | |
196 | int "IRQ_UART0_TX" | |
197 | default 10 | |
198 | config IRQ_UART1_RX | |
199 | int "IRQ_UART1_RX" | |
200 | default 10 | |
201 | config IRQ_UART1_TX | |
202 | int "IRQ_UART1_TX" | |
203 | default 10 | |
204 | config IRQ_OPTSEC | |
205 | int "IRQ_OPTSEC" | |
206 | default 11 | |
207 | config IRQ_CNT | |
208 | int "IRQ_CNT" | |
209 | default 11 | |
210 | config IRQ_MAC_RX | |
211 | int "IRQ_MAC_RX" | |
212 | default 11 | |
213 | config IRQ_PORTH_INTA | |
214 | int "IRQ_PORTH_INTA" | |
215 | default 11 | |
216 | config IRQ_MAC_TX | |
217 | int "IRQ_MAC_TX/NFC" | |
218 | default 11 | |
219 | config IRQ_PORTH_INTB | |
220 | int "IRQ_PORTH_INTB" | |
221 | default 11 | |
6a01f230 YL |
222 | config IRQ_TIMER0 |
223 | int "IRQ_TIMER0" | |
1fa9be72 | 224 | default 7 if TICKSOURCE_GPTMR0 |
6a01f230 YL |
225 | default 8 |
226 | config IRQ_TIMER1 | |
227 | int "IRQ_TIMER1" | |
2f6f4bcd | 228 | default 12 |
6a01f230 YL |
229 | config IRQ_TIMER2 |
230 | int "IRQ_TIMER2" | |
2f6f4bcd | 231 | default 12 |
6a01f230 YL |
232 | config IRQ_TIMER3 |
233 | int "IRQ_TIMER3" | |
2f6f4bcd | 234 | default 12 |
6a01f230 YL |
235 | config IRQ_TIMER4 |
236 | int "IRQ_TIMER4" | |
2f6f4bcd | 237 | default 12 |
6a01f230 YL |
238 | config IRQ_TIMER5 |
239 | int "IRQ_TIMER5" | |
2f6f4bcd | 240 | default 12 |
6a01f230 YL |
241 | config IRQ_TIMER6 |
242 | int "IRQ_TIMER6" | |
2f6f4bcd | 243 | default 12 |
6a01f230 YL |
244 | config IRQ_TIMER7 |
245 | int "IRQ_TIMER7" | |
2f6f4bcd BW |
246 | default 12 |
247 | config IRQ_PORTG_INTA | |
248 | int "IRQ_PORTG_INTA" | |
249 | default 12 | |
250 | config IRQ_PORTG_INTB | |
251 | int "IRQ_PORTG_INTB" | |
252 | default 12 | |
253 | config IRQ_MEM_DMA0 | |
254 | int "IRQ_MEM_DMA0" | |
255 | default 13 | |
256 | config IRQ_MEM_DMA1 | |
257 | int "IRQ_MEM_DMA1" | |
258 | default 13 | |
259 | config IRQ_WATCH | |
260 | int "IRQ_WATCH" | |
261 | default 13 | |
262 | config IRQ_PORTF_INTA | |
263 | int "IRQ_PORTF_INTA" | |
264 | default 13 | |
265 | config IRQ_PORTF_INTB | |
266 | int "IRQ_PORTF_INTB" | |
267 | default 13 | |
268 | config IRQ_SPI0_ERROR | |
269 | int "IRQ_SPI0_ERROR" | |
270 | default 7 | |
271 | config IRQ_SPI1_ERROR | |
272 | int "IRQ_SPI1_ERROR" | |
273 | default 7 | |
274 | config IRQ_RSI_INT0 | |
275 | int "IRQ_RSI_INT0" | |
276 | default 7 | |
277 | config IRQ_RSI_INT1 | |
278 | int "IRQ_RSI_INT1" | |
279 | default 7 | |
280 | config IRQ_PWM_TRIP | |
281 | int "IRQ_PWM_TRIP" | |
282 | default 10 | |
283 | config IRQ_PWM_SYNC | |
284 | int "IRQ_PWM_SYNC" | |
285 | default 10 | |
286 | config IRQ_PTP_STAT | |
287 | int "IRQ_PTP_STAT" | |
288 | default 10 | |
289 | ||
290 | help | |
291 | Enter the priority numbers between 7-13 ONLY. Others are Reserved. | |
292 | This applies to all the above. It is not recommended to assign the | |
293 | highest priority number 7 to UART or any other device. | |
294 | ||
295 | endmenu | |
296 | ||
297 | endmenu | |
298 | ||
299 | endif |