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Blackfin arch: Fix bug - hardware breakpoint doesn't always work in kgdb
[deliverable/linux.git] / arch / blackfin / mach-bf518 / boards / ezbrd.c
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2f6f4bcd
BW		 1/*
2 * File: arch/blackfin/mach-bf518/boards/ezbrd.c
3 * Based on: arch/blackfin/mach-bf527/boards/ezbrd.c
4 * Author: Bryan Wu <cooloney@kernel.org>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/mtd/physmap.h>
36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38
39#include <linux/i2c.h>
40#include <linux/irq.h>
41#include <linux/interrupt.h>
42#include <asm/dma.h>
43#include <asm/bfin5xx_spi.h>
44#include <asm/reboot.h>
45#include <asm/portmux.h>
46#include <asm/dpmc.h>
47#include <linux/spi/ad7877.h>
48
49/*
50 * Name the Board for the /proc/cpuinfo
51 */
52const char bfin_board_name[] = "BF518F-EZBRD";
53
54/*
55 * Driver needs to know address, irq and flag pin.
56 */
57
58#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
59static struct mtd_partition ezbrd_partitions[] = {
60 {
61 .name = "bootloader(nor)",
62 .size = 0x40000,
63 .offset = 0,
64 }, {
65 .name = "linux kernel(nor)",
66 .size = 0x1C0000,
67 .offset = MTDPART_OFS_APPEND,
68 }, {
69 .name = "file system(nor)",
70 .size = MTDPART_SIZ_FULL,
71 .offset = MTDPART_OFS_APPEND,
72 }
73};
74
75static struct physmap_flash_data ezbrd_flash_data = {
76 .width = 2,
77 .parts = ezbrd_partitions,
78 .nr_parts = ARRAY_SIZE(ezbrd_partitions),
79};
80
81static struct resource ezbrd_flash_resource = {
82 .start = 0x20000000,
83 .end = 0x203fffff,
84 .flags = IORESOURCE_MEM,
85};
86
87static struct platform_device ezbrd_flash_device = {
88 .name = "physmap-flash",
89 .id = 0,
90 .dev = {
91 .platform_data = &ezbrd_flash_data,
92 },
93 .num_resources = 1,
94 .resource = &ezbrd_flash_resource,
95};
96#endif
97
98#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
99static struct platform_device rtc_device = {
100 .name = "rtc-bfin",
101 .id = -1,
102};
103#endif
104
105#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
106static struct platform_device bfin_mac_device = {
107 .name = "bfin_mac",
108};
109#endif
110
111#if defined(CONFIG_MTD_M25P80) \
112 || defined(CONFIG_MTD_M25P80_MODULE)
113static struct mtd_partition bfin_spi_flash_partitions[] = {
114 {
115 .name = "bootloader(spi)",
116 .size = 0x00040000,
117 .offset = 0,
118 .mask_flags = MTD_CAP_ROM
119 }, {
120 .name = "linux kernel(spi)",
121 .size = MTDPART_SIZ_FULL,
122 .offset = MTDPART_OFS_APPEND,
123 }
124};
125
126static struct flash_platform_data bfin_spi_flash_data = {
127 .name = "m25p80",
128 .parts = bfin_spi_flash_partitions,
129 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
130 .type = "m25p16",
131};
132
133/* SPI flash chip (m25p64) */
134static struct bfin5xx_spi_chip spi_flash_chip_info = {
135 .enable_dma = 0, /* use dma transfer with this chip*/
136 .bits_per_word = 8,
137};
138#endif
139
140#if defined(CONFIG_SPI_ADC_BF533) \
141 || defined(CONFIG_SPI_ADC_BF533_MODULE)
142/* SPI ADC chip */
143static struct bfin5xx_spi_chip spi_adc_chip_info = {
144 .enable_dma = 1, /* use dma transfer with this chip*/
145 .bits_per_word = 16,
146};
147#endif
148
149#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
150static struct bfin5xx_spi_chip spi_mmc_chip_info = {
151 .enable_dma = 1,
152 .bits_per_word = 8,
153};
154#endif
155
156#if defined(CONFIG_PBX)
157static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
158 .ctl_reg = 0x4, /* send zero */
159 .enable_dma = 0,
160 .bits_per_word = 8,
161 .cs_change_per_word = 1,
162};
163#endif
164
165#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
166static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
167 .enable_dma = 0,
168 .bits_per_word = 16,
169};
170
171static const struct ad7877_platform_data bfin_ad7877_ts_info = {
172 .model = 7877,
173 .vref_delay_usecs = 50, /* internal, no capacitor */
174 .x_plate_ohms = 419,
175 .y_plate_ohms = 486,
176 .pressure_max = 1000,
177 .pressure_min = 0,
178 .stopacq_polarity = 1,
179 .first_conversion_delay = 3,
180 .acquisition_time = 1,
181 .averaging = 1,
182 .pen_down_acc_interval = 1,
183};
184#endif
185
186#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
187 && defined(CONFIG_SND_SOC_WM8731_SPI)
188static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
189 .enable_dma = 0,
190 .bits_per_word = 16,
191};
192#endif
193
194#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
195static struct bfin5xx_spi_chip spidev_chip_info = {
196 .enable_dma = 0,
197 .bits_per_word = 8,
198};
199#endif
200
201static struct spi_board_info bfin_spi_board_info[] __initdata = {
202#if defined(CONFIG_MTD_M25P80) \
203 || defined(CONFIG_MTD_M25P80_MODULE)
204 {
205 /* the modalias must be the same as spi device driver name */
206 .modalias = "m25p80", /* Name of spi_driver for this device */
207 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
208 .bus_num = 0, /* Framework bus number */
209 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
210 .platform_data = &bfin_spi_flash_data,
211 .controller_data = &spi_flash_chip_info,
212 .mode = SPI_MODE_3,
213 },
214#endif
215
216#if defined(CONFIG_SPI_ADC_BF533) \
217 || defined(CONFIG_SPI_ADC_BF533_MODULE)
218 {
219 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
220 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
221 .bus_num = 0, /* Framework bus number */
222 .chip_select = 1, /* Framework chip select. */
223 .platform_data = NULL, /* No spi_driver specific config */
224 .controller_data = &spi_adc_chip_info,
225 },
226#endif
227
228#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
229 {
230 .modalias = "spi_mmc_dummy",
231 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
232 .bus_num = 0,
233 .chip_select = 0,
234 .platform_data = NULL,
235 .controller_data = &spi_mmc_chip_info,
236 .mode = SPI_MODE_3,
237 },
238 {
239 .modalias = "spi_mmc",
240 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
241 .bus_num = 0,
242 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
243 .platform_data = NULL,
244 .controller_data = &spi_mmc_chip_info,
245 .mode = SPI_MODE_3,
246 },
247#endif
248#if defined(CONFIG_PBX)
249 {
250 .modalias = "fxs-spi",
251 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
252 .bus_num = 0,
253 .chip_select = 8 - CONFIG_J11_JUMPER,
254 .controller_data = &spi_si3xxx_chip_info,
255 .mode = SPI_MODE_3,
256 },
257 {
258 .modalias = "fxo-spi",
259 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
260 .bus_num = 0,
261 .chip_select = 8 - CONFIG_J19_JUMPER,
262 .controller_data = &spi_si3xxx_chip_info,
263 .mode = SPI_MODE_3,
264 },
265#endif
266#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
267 {
268 .modalias = "ad7877",
269 .platform_data = &bfin_ad7877_ts_info,
270 .irq = IRQ_PF8,
271 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
272 .bus_num = 0,
273 .chip_select = 2,
274 .controller_data = &spi_ad7877_chip_info,
275 },
276#endif
277#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
278 && defined(CONFIG_SND_SOC_WM8731_SPI)
279 {
280 .modalias = "wm8731",
281 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
282 .bus_num = 0,
283 .chip_select = 5,
284 .controller_data = &spi_wm8731_chip_info,
285 .mode = SPI_MODE_0,
286 },
287#endif
288#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
289 {
290 .modalias = "spidev",
291 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
292 .bus_num = 0,
293 .chip_select = 1,
294 .controller_data = &spidev_chip_info,
295 },
296#endif
297#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
298 {
299 .modalias = "bfin-lq035q1-spi",
300 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
301 .bus_num = 0,
302 .chip_select = 1,
303 .controller_data = &lq035q1_spi_chip_info,
304 .mode = SPI_CPHA | SPI_CPOL,
305 },
306#endif
307};
308
309/* SPI controller data */
310#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
311/* SPI (0) */
312static struct bfin5xx_spi_master bfin_spi0_info = {
313 .num_chipselect = 5,
314 .enable_dma = 1, /* master has the ability to do dma transfer */
315 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
316};
317
318static struct resource bfin_spi0_resource[] = {
319 [0] = {
320 .start = SPI0_REGBASE,
321 .end = SPI0_REGBASE + 0xFF,
322 .flags = IORESOURCE_MEM,
323 },
324 [1] = {
325 .start = CH_SPI0,
326 .end = CH_SPI0,
327 .flags = IORESOURCE_IRQ,
328 },
329};
330
331static struct platform_device bfin_spi0_device = {
332 .name = "bfin-spi",
333 .id = 0, /* Bus number */
334 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
335 .resource = bfin_spi0_resource,
336 .dev = {
337 .platform_data = &bfin_spi0_info, /* Passed to driver */
338 },
339};
340
341/* SPI (1) */
342static struct bfin5xx_spi_master bfin_spi1_info = {
343 .num_chipselect = 5,
344 .enable_dma = 1, /* master has the ability to do dma transfer */
345 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
346};
347
348static struct resource bfin_spi1_resource[] = {
349 [0] = {
350 .start = SPI1_REGBASE,
351 .end = SPI1_REGBASE + 0xFF,
352 .flags = IORESOURCE_MEM,
353 },
354 [1] = {
355 .start = CH_SPI1,
356 .end = CH_SPI1,
357 .flags = IORESOURCE_IRQ,
358 },
359};
360
361static struct platform_device bfin_spi1_device = {
362 .name = "bfin-spi",
363 .id = 1, /* Bus number */
364 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
365 .resource = bfin_spi1_resource,
366 .dev = {
367 .platform_data = &bfin_spi1_info, /* Passed to driver */
368 },
369};
370#endif /* spi master and devices */
371
372#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
373static struct resource bfin_uart_resources[] = {
374#ifdef CONFIG_SERIAL_BFIN_UART0
375 {
376 .start = 0xFFC00400,
377 .end = 0xFFC004FF,
378 .flags = IORESOURCE_MEM,
379 },
380#endif
381#ifdef CONFIG_SERIAL_BFIN_UART1
382 {
383 .start = 0xFFC02000,
384 .end = 0xFFC020FF,
385 .flags = IORESOURCE_MEM,
386 },
387#endif
388};
389
390static struct platform_device bfin_uart_device = {
391 .name = "bfin-uart",
392 .id = 1,
393 .num_resources = ARRAY_SIZE(bfin_uart_resources),
394 .resource = bfin_uart_resources,
395};
396#endif
397
398#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
399static struct resource bfin_sir_resources[] = {
400#ifdef CONFIG_BFIN_SIR0
401 {
402 .start = 0xFFC00400,
403 .end = 0xFFC004FF,
404 .flags = IORESOURCE_MEM,
405 },
406#endif
407#ifdef CONFIG_BFIN_SIR1
408 {
409 .start = 0xFFC02000,
410 .end = 0xFFC020FF,
411 .flags = IORESOURCE_MEM,
412 },
413#endif
414};
415
416static struct platform_device bfin_sir_device = {
417 .name = "bfin_sir",
418 .id = 0,
419 .num_resources = ARRAY_SIZE(bfin_sir_resources),
420 .resource = bfin_sir_resources,
421};
422#endif
423
424#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
425static struct resource bfin_twi0_resource[] = {
426 [0] = {
427 .start = TWI0_REGBASE,
428 .end = TWI0_REGBASE,
429 .flags = IORESOURCE_MEM,
430 },
431 [1] = {
432 .start = IRQ_TWI,
433 .end = IRQ_TWI,
434 .flags = IORESOURCE_IRQ,
435 },
436};
437
438static struct platform_device i2c_bfin_twi_device = {
439 .name = "i2c-bfin-twi",
440 .id = 0,
441 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
442 .resource = bfin_twi0_resource,
443};
444#endif
445
446#ifdef CONFIG_I2C_BOARDINFO
447static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
448#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
449 {
450 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
451 },
452#endif
453#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
454 {
455 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
456 .irq = IRQ_PF8,
457 },
458#endif
459};
460#endif
461
462#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
463static struct platform_device bfin_sport0_uart_device = {
464 .name = "bfin-sport-uart",
465 .id = 0,
466};
467
468static struct platform_device bfin_sport1_uart_device = {
469 .name = "bfin-sport-uart",
470 .id = 1,
471};
472#endif
473
474#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
475#include <linux/input.h>
476#include <linux/gpio_keys.h>
477
478static struct gpio_keys_button bfin_gpio_keys_table[] = {
479 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
480 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
481};
482
483static struct gpio_keys_platform_data bfin_gpio_keys_data = {
484 .buttons = bfin_gpio_keys_table,
485 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
486};
487
488static struct platform_device bfin_device_gpiokeys = {
489 .name = "gpio-keys",
490 .dev = {
491 .platform_data = &bfin_gpio_keys_data,
492 },
493};
494#endif
495
496static struct resource bfin_gpios_resources = {
497 .start = 0,
498 .end = MAX_BLACKFIN_GPIOS - 1,
499 .flags = IORESOURCE_IRQ,
500};
501
502static struct platform_device bfin_gpios_device = {
503 .name = "simple-gpio",
504 .id = -1,
505 .num_resources = 1,
506 .resource = &bfin_gpios_resources,
507};
508
509static const unsigned int cclk_vlev_datasheet[] =
510{
511 VRPAIR(VLEV_100, 400000000),
512 VRPAIR(VLEV_105, 426000000),
513 VRPAIR(VLEV_110, 500000000),
514 VRPAIR(VLEV_115, 533000000),
515 VRPAIR(VLEV_120, 600000000),
516};
517
518static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
519 .tuple_tab = cclk_vlev_datasheet,
520 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
521 .vr_settling_time = 25 /* us */,
522};
523
524static struct platform_device bfin_dpmc = {
525 .name = "bfin dpmc",
526 .dev = {
527 .platform_data = &bfin_dmpc_vreg_data,
528 },
529};
530
531static struct platform_device *stamp_devices[] __initdata = {
532
533 &bfin_dpmc,
534
535#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
536 &rtc_device,
537#endif
538
539#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
540 &bfin_mac_device,
541#endif
542
543#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
544 &bfin_spi0_device,
545 &bfin_spi1_device,
546#endif
547
548#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
549 &bfin_uart_device,
550#endif
551
552#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
553 &bfin_sir_device,
554#endif
555
556#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
557 &i2c_bfin_twi_device,
558#endif
559
560#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
561 &bfin_sport0_uart_device,
562 &bfin_sport1_uart_device,
563#endif
564
565#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
566 &bfin_device_gpiokeys,
567#endif
568
569#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
570 &ezbrd_flash_device,
571#endif
572
573 &bfin_gpios_device,
574};
575
576static int __init ezbrd_init(void)
577{
578 printk(KERN_INFO "%s(): registering device resources\n", __func__);
579
580#ifdef CONFIG_I2C_BOARDINFO
581 i2c_register_board_info(0, bfin_i2c_board_info,
582 ARRAY_SIZE(bfin_i2c_board_info));
583#endif
584
585 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
586 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
587 return 0;
588}
589
590arch_initcall(ezbrd_init);
591
592void native_machine_restart(char *cmd)
593{
594 /* workaround reboot hang when booting from SPI */
595 if ((bfin_read_SYSCR() & 0x7) == 0x3)
596 bfin_gpio_reset_spi0_ssel1();
597}
598
599void bfin_get_ether_addr(char *addr)
600{
601 /* the MAC is stored in OTP memory page 0xDF */
602 u32 ret;
603 u64 otp_mac;
604 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
605
606 ret = otp_read(0xDF, 0x00, &otp_mac);
607 if (!(ret & 0x1)) {
608 char *otp_mac_p = (char *)&otp_mac;
609 for (ret = 0; ret < 6; ++ret)
610 addr[ret] = otp_mac_p[5 - ret];
611 }
612}
613EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
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