projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[Blackfin] arch: Enable UART2 and UART3 for bf548
[deliverable/linux.git] / arch / blackfin / mach-bf527 / boards / ezkit.c
CommitLineData
59003145
MH		 1/*
2 * File: arch/blackfin/mach-bf527/boards/ezkit.c
3 * Based on: arch/blackfin/mach-bf537/boards/stamp.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
a628a8bc 11 * Copyright 2004-2008 Analog Devices Inc.
59003145
MH		 12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 38#include <linux/usb/isp1362.h>
59003145 39#endif
0a87e3e9 40#include <linux/ata_platform.h>
59003145
MH		 41#include <linux/irq.h>
42#include <linux/interrupt.h>
632f658b 43#include <linux/usb/sl811.h>
1089e228 44#include <linux/usb/musb.h>
64307f7d 45#include <asm/cplb.h>
59003145
MH		 46#include <asm/dma.h>
47#include <asm/bfin5xx_spi.h>
48#include <asm/reboot.h>
64307f7d 49#include <asm/nand.h>
5d448dd5 50#include <asm/portmux.h>
59003145
MH		 51#include <linux/spi/ad7877.h>
52
53/*
54 * Name the Board for the /proc/cpuinfo
55 */
066954a3 56const char bfin_board_name[] = "ADDS-BF527-EZKIT";
59003145
MH		 57
58/*
59 * Driver needs to know address, irq and flag pin.
60 */
61
62#define ISP1761_BASE 0x203C0000
63#define ISP1761_IRQ IRQ_PF7
64
65#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
66static struct resource bfin_isp1761_resources[] = {
67 [0] = {
68 .name = "isp1761-regs",
69 .start = ISP1761_BASE + 0x00000000,
70 .end = ISP1761_BASE + 0x000fffff,
71 .flags = IORESOURCE_MEM,
72 },
73 [1] = {
74 .start = ISP1761_IRQ,
75 .end = ISP1761_IRQ,
76 .flags = IORESOURCE_IRQ,
77 },
78};
79
80static struct platform_device bfin_isp1761_device = {
81 .name = "isp1761",
82 .id = 0,
83 .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
84 .resource = bfin_isp1761_resources,
85};
86
87static struct platform_device *bfin_isp1761_devices[] = {
88 &bfin_isp1761_device,
89};
90
91int __init bfin_isp1761_init(void)
92{
93 unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
94
95 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
96 set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
97
98 return platform_add_devices(bfin_isp1761_devices, num_devices);
99}
100
101void __exit bfin_isp1761_exit(void)
102{
103 platform_device_unregister(&bfin_isp1761_device);
104}
105
106arch_initcall(bfin_isp1761_init);
107#endif
108
1089e228
MH		 109#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
110static struct resource musb_resources[] = {
111 [0] = {
112 .start = 0xffc03800,
113 .end = 0xffc03cff,
114 .flags = IORESOURCE_MEM,
115 },
116 [1] = { /* general IRQ */
117 .start = IRQ_USB_INT0,
118 .end = IRQ_USB_INT0,
119 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
120 },
121 [2] = { /* DMA IRQ */
122 .start = IRQ_USB_DMA,
123 .end = IRQ_USB_DMA,
124 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
125 },
126};
127
128static struct musb_hdrc_platform_data musb_plat = {
129#if defined(CONFIG_USB_MUSB_OTG)
130 .mode = MUSB_OTG,
131#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
132 .mode = MUSB_HOST,
133#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
134 .mode = MUSB_PERIPHERAL,
135#endif
136 .multipoint = 0,
137};
138
139static u64 musb_dmamask = ~(u32)0;
140
141static struct platform_device musb_device = {
142 .name = "musb_hdrc",
143 .id = 0,
144 .dev = {
145 .dma_mask = &musb_dmamask,
146 .coherent_dma_mask = 0xffffffff,
147 .platform_data = &musb_plat,
148 },
149 .num_resources = ARRAY_SIZE(musb_resources),
150 .resource = musb_resources,
151};
152#endif
153
154#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
155
156static struct resource bf52x_t350mcqb_resources[] = {
157 {
158 .start = IRQ_PPI_ERROR,
159 .end = IRQ_PPI_ERROR,
160 .flags = IORESOURCE_IRQ,
161 },
162};
163
164static struct platform_device bf52x_t350mcqb_device = {
165 .name = "bfin-t350mcqb",
166 .id = -1,
167 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
168 .resource = bf52x_t350mcqb_resources,
169};
170#endif
171
64307f7d
MH		 172#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
173static struct mtd_partition partition_info[] = {
174 {
175 .name = "Linux Kernel",
176 .offset = 0,
177 .size = 4 * SIZE_1M,
178 },
179 {
180 .name = "File System",
181 .offset = 4 * SIZE_1M,
182 .size = (256 - 4) * SIZE_1M,
183 },
184};
185
186static struct bf5xx_nand_platform bf5xx_nand_platform = {
187 .page_size = NFC_PG_SIZE_256,
188 .data_width = NFC_NWIDTH_8,
189 .partitions = partition_info,
190 .nr_partitions = ARRAY_SIZE(partition_info),
191 .rd_dly = 3,
192 .wr_dly = 3,
193};
194
195static struct resource bf5xx_nand_resources[] = {
196 {
197 .start = NFC_CTL,
198 .end = NFC_DATA_RD + 2,
199 .flags = IORESOURCE_MEM,
200 },
201 {
202 .start = CH_NFC,
203 .end = CH_NFC,
204 .flags = IORESOURCE_IRQ,
205 },
206};
207
208static struct platform_device bf5xx_nand_device = {
209 .name = "bf5xx-nand",
210 .id = 0,
211 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
212 .resource = bf5xx_nand_resources,
213 .dev = {
214 .platform_data = &bf5xx_nand_platform,
215 },
216};
217#endif
218
59003145
MH		 219#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
220static struct resource bfin_pcmcia_cf_resources[] = {
221 {
222 .start = 0x20310000, /* IO PORT */
223 .end = 0x20312000,
224 .flags = IORESOURCE_MEM,
225 }, {
226 .start = 0x20311000, /* Attribute Memory */
227 .end = 0x20311FFF,
228 .flags = IORESOURCE_MEM,
229 }, {
230 .start = IRQ_PF4,
231 .end = IRQ_PF4,
232 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
233 }, {
234 .start = 6, /* Card Detect PF6 */
235 .end = 6,
236 .flags = IORESOURCE_IRQ,
237 },
238};
239
240static struct platform_device bfin_pcmcia_cf_device = {
241 .name = "bfin_cf_pcmcia",
242 .id = -1,
243 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
244 .resource = bfin_pcmcia_cf_resources,
245};
246#endif
247
248#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
249static struct platform_device rtc_device = {
250 .name = "rtc-bfin",
251 .id = -1,
252};
253#endif
254
255#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
256static struct resource smc91x_resources[] = {
257 {
258 .name = "smc91x-regs",
259 .start = 0x20300300,
260 .end = 0x20300300 + 16,
261 .flags = IORESOURCE_MEM,
262 }, {
263
264 .start = IRQ_PF7,
265 .end = IRQ_PF7,
266 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
267 },
268};
269static struct platform_device smc91x_device = {
270 .name = "smc91x",
271 .id = 0,
272 .num_resources = ARRAY_SIZE(smc91x_resources),
273 .resource = smc91x_resources,
274};
275#endif
276
277#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
278static struct resource dm9000_resources[] = {
279 [0] = {
280 .start = 0x203FB800,
281 .end = 0x203FB800 + 8,
282 .flags = IORESOURCE_MEM,
283 },
284 [1] = {
285 .start = IRQ_PF9,
286 .end = IRQ_PF9,
287 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
288 },
289};
290
291static struct platform_device dm9000_device = {
292 .name = "dm9000",
293 .id = -1,
294 .num_resources = ARRAY_SIZE(dm9000_resources),
295 .resource = dm9000_resources,
296};
297#endif
298
299#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
300static struct resource sl811_hcd_resources[] = {
301 {
302 .start = 0x20340000,
303 .end = 0x20340000,
304 .flags = IORESOURCE_MEM,
305 }, {
306 .start = 0x20340004,
307 .end = 0x20340004,
308 .flags = IORESOURCE_MEM,
309 }, {
310 .start = CONFIG_USB_SL811_BFIN_IRQ,
311 .end = CONFIG_USB_SL811_BFIN_IRQ,
312 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
313 },
314};
315
316#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
317void sl811_port_power(struct device *dev, int is_on)
318{
319 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 320 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
59003145
MH		 321}
322#endif
323
324static struct sl811_platform_data sl811_priv = {
325 .potpg = 10,
326 .power = 250, /* == 500mA */
327#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
328 .port_power = &sl811_port_power,
329#endif
330};
331
332static struct platform_device sl811_hcd_device = {
333 .name = "sl811-hcd",
334 .id = 0,
335 .dev = {
336 .platform_data = &sl811_priv,
337 },
338 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
339 .resource = sl811_hcd_resources,
340};
341#endif
342
343#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
344static struct resource isp1362_hcd_resources[] = {
345 {
346 .start = 0x20360000,
347 .end = 0x20360000,
348 .flags = IORESOURCE_MEM,
349 }, {
350 .start = 0x20360004,
351 .end = 0x20360004,
352 .flags = IORESOURCE_MEM,
353 }, {
354 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
355 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
356 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
357 },
358};
359
360static struct isp1362_platform_data isp1362_priv = {
361 .sel15Kres = 1,
362 .clknotstop = 0,
363 .oc_enable = 0,
364 .int_act_high = 0,
365 .int_edge_triggered = 0,
366 .remote_wakeup_connected = 0,
367 .no_power_switching = 1,
368 .power_switching_mode = 0,
369};
370
371static struct platform_device isp1362_hcd_device = {
372 .name = "isp1362-hcd",
373 .id = 0,
374 .dev = {
375 .platform_data = &isp1362_priv,
376 },
377 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
378 .resource = isp1362_hcd_resources,
379};
380#endif
381
382#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
383static struct platform_device bfin_mac_device = {
384 .name = "bfin_mac",
385};
386#endif
387
388#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
389static struct resource net2272_bfin_resources[] = {
390 {
391 .start = 0x20300000,
392 .end = 0x20300000 + 0x100,
393 .flags = IORESOURCE_MEM,
394 }, {
395 .start = IRQ_PF7,
396 .end = IRQ_PF7,
397 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
398 },
399};
400
401static struct platform_device net2272_bfin_device = {
402 .name = "net2272",
403 .id = -1,
404 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
405 .resource = net2272_bfin_resources,
406};
407#endif
408
409#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
410/* all SPI peripherals info goes here */
411
412#if defined(CONFIG_MTD_M25P80) \
413 || defined(CONFIG_MTD_M25P80_MODULE)
414static struct mtd_partition bfin_spi_flash_partitions[] = {
415 {
416 .name = "bootloader",
417 .size = 0x00020000,
418 .offset = 0,
419 .mask_flags = MTD_CAP_ROM
420 }, {
421 .name = "kernel",
422 .size = 0xe0000,
423 .offset = 0x20000
424 }, {
425 .name = "file system",
426 .size = 0x700000,
427 .offset = 0x00100000,
428 }
429};
430
431static struct flash_platform_data bfin_spi_flash_data = {
432 .name = "m25p80",
433 .parts = bfin_spi_flash_partitions,
434 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
435 .type = "m25p64",
436};
437
438/* SPI flash chip (m25p64) */
439static struct bfin5xx_spi_chip spi_flash_chip_info = {
440 .enable_dma = 0, /* use dma transfer with this chip*/
441 .bits_per_word = 8,
442};
443#endif
444
445#if defined(CONFIG_SPI_ADC_BF533) \
446 || defined(CONFIG_SPI_ADC_BF533_MODULE)
447/* SPI ADC chip */
448static struct bfin5xx_spi_chip spi_adc_chip_info = {
449 .enable_dma = 1, /* use dma transfer with this chip*/
450 .bits_per_word = 16,
451};
452#endif
453
454#if defined(CONFIG_SND_BLACKFIN_AD1836) \
455 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
456static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
457 .enable_dma = 0,
458 .bits_per_word = 16,
459};
460#endif
461
462#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
463static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
464 .enable_dma = 0,
465 .bits_per_word = 16,
466};
467#endif
468
469#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
470static struct bfin5xx_spi_chip spi_mmc_chip_info = {
471 .enable_dma = 1,
472 .bits_per_word = 8,
473};
474#endif
475
476#if defined(CONFIG_PBX)
477static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
478 .ctl_reg = 0x4, /* send zero */
479 .enable_dma = 0,
480 .bits_per_word = 8,
481 .cs_change_per_word = 1,
482};
483#endif
484
485#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
486static struct bfin5xx_spi_chip ad5304_chip_info = {
487 .enable_dma = 0,
488 .bits_per_word = 16,
489};
490#endif
491
492#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
493static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
494 .enable_dma = 0,
495 .bits_per_word = 16,
496};
497
498static const struct ad7877_platform_data bfin_ad7877_ts_info = {
499 .model = 7877,
500 .vref_delay_usecs = 50, /* internal, no capacitor */
501 .x_plate_ohms = 419,
502 .y_plate_ohms = 486,
503 .pressure_max = 1000,
504 .pressure_min = 0,
505 .stopacq_polarity = 1,
506 .first_conversion_delay = 3,
507 .acquisition_time = 1,
508 .averaging = 1,
509 .pen_down_acc_interval = 1,
510};
511#endif
512
c7d48966 513#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
0954f70a
MH		 514 && defined(CONFIG_SND_SOC_WM8731_SPI)
515static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
516 .enable_dma = 0,
517 .bits_per_word = 16,
518};
519#endif
59003145
MH		 520static struct spi_board_info bfin_spi_board_info[] __initdata = {
521#if defined(CONFIG_MTD_M25P80) \
522 || defined(CONFIG_MTD_M25P80_MODULE)
523 {
524 /* the modalias must be the same as spi device driver name */
525 .modalias = "m25p80", /* Name of spi_driver for this device */
526 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
527 .bus_num = 0, /* Framework bus number */
528 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
529 .platform_data = &bfin_spi_flash_data,
530 .controller_data = &spi_flash_chip_info,
531 .mode = SPI_MODE_3,
532 },
533#endif
534
535#if defined(CONFIG_SPI_ADC_BF533) \
536 || defined(CONFIG_SPI_ADC_BF533_MODULE)
537 {
538 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
539 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
540 .bus_num = 0, /* Framework bus number */
541 .chip_select = 1, /* Framework chip select. */
542 .platform_data = NULL, /* No spi_driver specific config */
543 .controller_data = &spi_adc_chip_info,
544 },
545#endif
546
547#if defined(CONFIG_SND_BLACKFIN_AD1836) \
548 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
549 {
550 .modalias = "ad1836-spi",
551 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
552 .bus_num = 0,
553 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
554 .controller_data = &ad1836_spi_chip_info,
555 },
556#endif
557#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
558 {
559 .modalias = "ad9960-spi",
560 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
561 .bus_num = 0,
562 .chip_select = 1,
563 .controller_data = &ad9960_spi_chip_info,
564 },
565#endif
566#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
567 {
568 .modalias = "spi_mmc_dummy",
569 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
570 .bus_num = 0,
571 .chip_select = 0,
572 .platform_data = NULL,
573 .controller_data = &spi_mmc_chip_info,
574 .mode = SPI_MODE_3,
575 },
576 {
577 .modalias = "spi_mmc",
578 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
579 .bus_num = 0,
580 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
581 .platform_data = NULL,
582 .controller_data = &spi_mmc_chip_info,
583 .mode = SPI_MODE_3,
584 },
585#endif
586#if defined(CONFIG_PBX)
587 {
588 .modalias = "fxs-spi",
589 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
590 .bus_num = 0,
591 .chip_select = 8 - CONFIG_J11_JUMPER,
592 .controller_data = &spi_si3xxx_chip_info,
593 .mode = SPI_MODE_3,
594 },
595 {
596 .modalias = "fxo-spi",
597 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
598 .bus_num = 0,
599 .chip_select = 8 - CONFIG_J19_JUMPER,
600 .controller_data = &spi_si3xxx_chip_info,
601 .mode = SPI_MODE_3,
602 },
603#endif
604#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
605 {
606 .modalias = "ad5304_spi",
607 .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
608 .bus_num = 0,
609 .chip_select = 2,
610 .platform_data = NULL,
611 .controller_data = &ad5304_chip_info,
612 .mode = SPI_MODE_2,
613 },
614#endif
615#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
616 {
617 .modalias = "ad7877",
618 .platform_data = &bfin_ad7877_ts_info,
619 .irq = IRQ_PF6,
620 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
0954f70a 621 .bus_num = 0,
59003145
MH		 622 .chip_select = 1,
623 .controller_data = &spi_ad7877_chip_info,
624 },
625#endif
c7d48966 626#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
0954f70a
MH		 627 && defined(CONFIG_SND_SOC_WM8731_SPI)
628 {
629 .modalias = "wm8731",
630 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
631 .bus_num = 0,
632 .chip_select = 5,
633 .controller_data = &spi_wm8731_chip_info,
634 .mode = SPI_MODE_0,
635 },
636#endif
59003145
MH		 637};
638
639/* SPI controller data */
640static struct bfin5xx_spi_master bfin_spi0_info = {
641 .num_chipselect = 8,
642 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 643 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
59003145
MH		 644};
645
646/* SPI (0) */
647static struct resource bfin_spi0_resource[] = {
648 [0] = {
649 .start = SPI0_REGBASE,
650 .end = SPI0_REGBASE + 0xFF,
651 .flags = IORESOURCE_MEM,
652 },
653 [1] = {
654 .start = CH_SPI,
655 .end = CH_SPI,
656 .flags = IORESOURCE_IRQ,
657 },
658};
659
660static struct platform_device bfin_spi0_device = {
661 .name = "bfin-spi",
662 .id = 0, /* Bus number */
663 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
664 .resource = bfin_spi0_resource,
665 .dev = {
666 .platform_data = &bfin_spi0_info, /* Passed to driver */
667 },
668};
669#endif /* spi master and devices */
670
671#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
672static struct platform_device bfin_fb_device = {
673 .name = "bf537-lq035",
674};
675#endif
676
677#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
678static struct platform_device bfin_fb_adv7393_device = {
679 .name = "bfin-adv7393",
680};
681#endif
682
683#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
684static struct resource bfin_uart_resources[] = {
685#ifdef CONFIG_SERIAL_BFIN_UART0
686 {
687 .start = 0xFFC00400,
688 .end = 0xFFC004FF,
689 .flags = IORESOURCE_MEM,
690 },
691#endif
692#ifdef CONFIG_SERIAL_BFIN_UART1
693 {
694 .start = 0xFFC02000,
695 .end = 0xFFC020FF,
696 .flags = IORESOURCE_MEM,
697 },
698#endif
699};
700
701static struct platform_device bfin_uart_device = {
702 .name = "bfin-uart",
703 .id = 1,
704 .num_resources = ARRAY_SIZE(bfin_uart_resources),
705 .resource = bfin_uart_resources,
706};
707#endif
708
709#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
710static struct resource bfin_twi0_resource[] = {
711 [0] = {
712 .start = TWI0_REGBASE,
713 .end = TWI0_REGBASE,
714 .flags = IORESOURCE_MEM,
715 },
716 [1] = {
717 .start = IRQ_TWI,
718 .end = IRQ_TWI,
719 .flags = IORESOURCE_IRQ,
720 },
721};
722
723static struct platform_device i2c_bfin_twi_device = {
724 .name = "i2c-bfin-twi",
725 .id = 0,
726 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
727 .resource = bfin_twi0_resource,
728};
729#endif
730
731#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
732static struct platform_device bfin_sport0_uart_device = {
733 .name = "bfin-sport-uart",
734 .id = 0,
735};
736
737static struct platform_device bfin_sport1_uart_device = {
738 .name = "bfin-sport-uart",
739 .id = 1,
740};
741#endif
742
743#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
744#define PATA_INT 55
745
746static struct pata_platform_info bfin_pata_platform_data = {
747 .ioport_shift = 1,
748 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
749};
750
751static struct resource bfin_pata_resources[] = {
752 {
753 .start = 0x20314020,
754 .end = 0x2031403F,
755 .flags = IORESOURCE_MEM,
756 },
757 {
758 .start = 0x2031401C,
759 .end = 0x2031401F,
760 .flags = IORESOURCE_MEM,
761 },
762 {
763 .start = PATA_INT,
764 .end = PATA_INT,
765 .flags = IORESOURCE_IRQ,
766 },
767};
768
769static struct platform_device bfin_pata_device = {
770 .name = "pata_platform",
771 .id = -1,
772 .num_resources = ARRAY_SIZE(bfin_pata_resources),
773 .resource = bfin_pata_resources,
774 .dev = {
775 .platform_data = &bfin_pata_platform_data,
776 }
777};
778#endif
779
1089e228
MH		 780#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
781#include <linux/input.h>
782#include <linux/gpio_keys.h>
783
784static struct gpio_keys_button bfin_gpio_keys_table[] = {
785 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
786 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
787};
788
789static struct gpio_keys_platform_data bfin_gpio_keys_data = {
790 .buttons = bfin_gpio_keys_table,
791 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
792};
793
794static struct platform_device bfin_device_gpiokeys = {
795 .name = "gpio-keys",
796 .dev = {
797 .platform_data = &bfin_gpio_keys_data,
798 },
799};
800#endif
801
59003145 802static struct platform_device *stamp_devices[] __initdata = {
64307f7d
MH		 803#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
804 &bf5xx_nand_device,
805#endif
806
59003145
MH		 807#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
808 &bfin_pcmcia_cf_device,
809#endif
810
811#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
812 &rtc_device,
813#endif
814
815#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
816 &sl811_hcd_device,
817#endif
818
819#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
820 &isp1362_hcd_device,
821#endif
822
1089e228
MH		 823#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
824 &musb_device,
825#endif
826
59003145
MH		 827#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
828 &smc91x_device,
829#endif
830
831#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
832 &dm9000_device,
833#endif
834
835#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
836 &bfin_mac_device,
837#endif
838
839#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
840 &net2272_bfin_device,
841#endif
842
843#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
844 &bfin_spi0_device,
845#endif
846
847#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
848 &bfin_fb_device,
849#endif
850
1089e228
MH		 851#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
852 &bf52x_t350mcqb_device,
853#endif
854
59003145
MH		 855#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
856 &bfin_fb_adv7393_device,
857#endif
858
859#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
860 &bfin_uart_device,
861#endif
862
863#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
864 &i2c_bfin_twi_device,
865#endif
866
867#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
868 &bfin_sport0_uart_device,
869 &bfin_sport1_uart_device,
870#endif
871
872#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
873 &bfin_pata_device,
874#endif
1089e228
MH		 875
876#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
877 &bfin_device_gpiokeys,
878#endif
59003145
MH		 879};
880
881static int __init stamp_init(void)
882{
883 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
884 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
885#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
886 spi_register_board_info(bfin_spi_board_info,
887 ARRAY_SIZE(bfin_spi_board_info));
888#endif
889
890#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
891 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
892#endif
893 return 0;
894}
895
896arch_initcall(stamp_init);
897
898void native_machine_restart(char *cmd)
899{
900 /* workaround reboot hang when booting from SPI */
901 if ((bfin_read_SYSCR() & 0x7) == 0x3)
902 bfin_gpio_reset_spi0_ssel1();
903}
137b1529
MF		 904
905/*
906 * Currently the MAC address is saved in Flash by U-Boot
907 */
908#define FLASH_MAC 0x203f0000
9862cc52 909void bfin_get_ether_addr(char *addr)
137b1529
MF		 910{
911 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
912 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
913}
9862cc52 914EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
This page took 0.088135 seconds and 5 git commands to generate.