[deliverable/linux.git] / arch / blackfin / mach-bf533 / boards / H8606.c

/*
 * File:         arch/blackfin/mach-bf533/H8606.c
 * Based on:     arch/blackfin/mach-bf533/stamp.c
 * Author:       Javier Herrero <jherrero@hvsistemas.es>
 *
 * Created:      2007
 * Description:  Board Info File for the HV Sistemas H8606 board
 *
 * Modified:
 *               Copyright 2005 National ICT Australia (NICTA)
 *               Copyright 2004-2006 Analog Devices Inc
 *		 Copyright 2007 HV Sistemas S.L.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>

#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "HV Sistemas H8606";

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

/*
*  Driver needs to know address, irq and flag pin.
 */
 #if	defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource dm9000_resources[] = {
	[0] = {
		.start	= 0x20300000,
		.end	= 0x20300000 + 8,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_PF10,
		.end	= IRQ_PF10,
		.flags	= (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
	},
};

static struct platform_device dm9000_device = {
    .id			= 0,
    .name		= "dm9000",
    .resource		= dm9000_resources,
    .num_resources	= ARRAY_SIZE(dm9000_resources),
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x20300300,
		.end = 0x20300300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PROG_INTB,
		.end = IRQ_PROG_INTB,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	}, {
		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF10,
		.end = IRQ_PF10,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader",
		.size = 0x00060000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "kernel",
		.size = 0x100000,
		.offset = 0x60000
	}, {
		.name = "file system",
		.size = 0x6a0000,
		.offset = 0x00160000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.ctl_reg = 0x1000,
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.ctl_reg = 0x1000,
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_PBX)
static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
	.ctl_reg	= 0x1c04,
	.enable_dma	= 0,
	.bits_per_word	= 8,
	.cs_change_per_word = 1,
};
#endif

/* Notice: for blackfin, the speed_hz is the value of register
 * SPI_BAUD, not the real baudrate */
static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		/* this value is the baudrate divisor */
		.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 4,     /* actual baudrate is SCLK/(2xspeed_hz) */
		.bus_num = 1, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836-spi",
		.max_speed_hz = 16,
		.bus_num = 1,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif

#if defined(CONFIG_PBX)
	{
		.modalias	 = "fxs-spi",
		.max_speed_hz	 = 4,
		.bus_num	 = 1,
		.chip_select	 = 3,
		.controller_data = &spi_si3xxx_chip_info,
	},

	{
		.modalias	 = "fxo-spi",
		.max_speed_hz	 = 4,
		.bus_num	 = 1,
		.chip_select	 = 2,
		.controller_data = &spi_si3xxx_chip_info,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_IRQ,
	}
};


/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
static struct platform_device bfin_fb_device = {
	.name = "bf537-fb",
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
};

static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
};
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
static struct resource bfin_sir_resources[] = {
#ifdef CONFIG_BFIN_SIR0
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
#endif
};

static struct platform_device bfin_sir_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir_resources),
	.resource = bfin_sir_resources,
};
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)

#include <linux/serial_8250.h>
#include <linux/serial.h>

/*
 * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
 * running at half system clock, both with interrupt output or-ed to PF8. Change to
 * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
 */

static struct plat_serial8250_port serial8250_platform_data [] = {
	{
		.membase = 0x20200000,
		.mapbase = 0x20200000,
		.irq = IRQ_PF8,
		.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
		.iotype = UPIO_MEM,
		.regshift = 1,
		.uartclk = 66666667,
	}, {
		.membase = 0x20200010,
		.mapbase = 0x20200010,
		.irq = IRQ_PF8,
		.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
		.iotype = UPIO_MEM,
		.regshift = 1,
		.uartclk = 66666667,
	}, {
	}
};

static struct platform_device serial8250_device = {
	.id		= PLAT8250_DEV_PLATFORM,
	.name		= "serial8250",
	.dev		= {
		.platform_data = serial8250_platform_data,
	},
};

#endif

#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)

/*
 * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
 * interrupt output wired to PF9. Change to suit different FPGA configuration
 */

static struct resource opencores_kbd_resources[] = {
	[0] = {
		.start	= 0x20200030,
		.end	= 0x20300030 + 2,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_PF9,
		.end	= IRQ_PF9,
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct platform_device opencores_kbd_device = {
	.id		= -1,
	.name		= "opencores-kbd",
	.resource	= opencores_kbd_resources,
	.num_resources	= ARRAY_SIZE(opencores_kbd_resources),
};
#endif

static struct platform_device *h8606_devices[] __initdata = {
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if	defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
	&dm9000_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	&serial8250_device,
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
	&bfin_sir_device,
#endif

#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	&opencores_kbd_device,
#endif
};

static int __init H8606_init(void)
{
	printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif
	return 0;
}

arch_initcall(H8606_init);
Commit	Line	Data
ab472a04 JH	1	/*
	2	* File: arch/blackfin/mach-bf533/H8606.c
	3	* Based on: arch/blackfin/mach-bf533/stamp.c
	4	* Author: Javier Herrero <jherrero@hvsistemas.es>
	5	*
	6	* Created: 2007
	7	* Description: Board Info File for the HV Sistemas H8606 board
	8	*
	9	* Modified:
	10	* Copyright 2005 National ICT Australia (NICTA)
	11	* Copyright 2004-2006 Analog Devices Inc
	12	* Copyright 2007 HV Sistemas S.L.
	13	*
	14	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	15	*
	16	* This program is free software; you can redistribute it and/or modify
	17	* it under the terms of the GNU General Public License as published by
	18	* the Free Software Foundation; either version 2 of the License, or
	19	* (at your option) any later version.
	20	*
	21	* This program is distributed in the hope that it will be useful,
	22	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	23	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	24	* GNU General Public License for more details.
	25	*
	26	* You should have received a copy of the GNU General Public License
	27	* along with this program; if not, see the file COPYING, or write
	28	* to the Free Software Foundation, Inc.,
	29	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	30	*/
	31
	32	#include <linux/device.h>
	33	#include <linux/platform_device.h>
	34	#include <linux/mtd/mtd.h>
	35	#include <linux/mtd/partitions.h>
	36	#include <linux/spi/spi.h>
	37	#include <linux/spi/flash.h>
	38	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	39	#include <linux/usb/isp1362.h>
ab472a04	40	#endif
0a87e3e9	41	#include <linux/ata_platform.h>
ab472a04	42	#include <linux/irq.h>
fb96c56d	43
ab472a04 JH	44	#include <asm/dma.h>
	45	#include <asm/bfin5xx_spi.h>
	46	#include <asm/reboot.h>
5d448dd5	47	#include <asm/portmux.h>
ab472a04 JH	48
	49	/*
	50	* Name the Board for the /proc/cpuinfo
	51	*/
	52	const char bfin_board_name[] = "HV Sistemas H8606";
	53
09db9487	54	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
ab472a04 JH	55	static struct platform_device rtc_device = {
	56	.name = "rtc-bfin",
	57	.id = -1,
	58	};
	59	#endif
	60
	61	/*
	62	* Driver needs to know address, irq and flag pin.
	63	*/
	64	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
	65	static struct resource dm9000_resources[] = {
	66	[0] = {
	67	.start = 0x20300000,
	68	.end = 0x20300000 + 8,
	69	.flags = IORESOURCE_MEM,
	70	},
	71	[1] = {
	72	.start = IRQ_PF10,
	73	.end = IRQ_PF10,
	74	.flags = (IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE),
	75	},
	76	};
	77
	78	static struct platform_device dm9000_device = {
	79	.id = 0,
	80	.name = "dm9000",
	81	.resource = dm9000_resources,
	82	.num_resources = ARRAY_SIZE(dm9000_resources),
	83	};
	84	#endif
	85
	86	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	87	static struct resource smc91x_resources[] = {
	88	{
	89	.name = "smc91x-regs",
	90	.start = 0x20300300,
	91	.end = 0x20300300 + 16,
	92	.flags = IORESOURCE_MEM,
	93	}, {
	94	.start = IRQ_PROG_INTB,
	95	.end = IRQ_PROG_INTB,
	96	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	97	}, {
ab472a04 JH	98	.start = IRQ_PF7,
	99	.end = IRQ_PF7,
	100	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	101	},
	102	};
	103
	104	static struct platform_device smc91x_device = {
	105	.name = "smc91x",
	106	.id = 0,
	107	.num_resources = ARRAY_SIZE(smc91x_resources),
	108	.resource = smc91x_resources,
	109	};
	110	#endif
	111
	112	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	113	static struct resource net2272_bfin_resources[] = {
	114	{
	115	.start = 0x20300000,
	116	.end = 0x20300000 + 0x100,
	117	.flags = IORESOURCE_MEM,
	118	}, {
	119	.start = IRQ_PF10,
	120	.end = IRQ_PF10,
	121	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	122	},
	123	};
	124
	125	static struct platform_device net2272_bfin_device = {
	126	.name = "net2272",
	127	.id = -1,
	128	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	129	.resource = net2272_bfin_resources,
	130	};
	131	#endif
	132
	133	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	134	/* all SPI peripherals info goes here */
	135
	136	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	137	static struct mtd_partition bfin_spi_flash_partitions[] = {
	138	{
	139	.name = "bootloader",
	140	.size = 0x00060000,
	141	.offset = 0,
	142	.mask_flags = MTD_CAP_ROM
	143	}, {
	144	.name = "kernel",
	145	.size = 0x100000,
	146	.offset = 0x60000
	147	}, {
	148	.name = "file system",
	149	.size = 0x6a0000,
	150	.offset = 0x00160000,
	151	}
	152	};
	153
	154	static struct flash_platform_data bfin_spi_flash_data = {
	155	.name = "m25p80",
	156	.parts = bfin_spi_flash_partitions,
	157	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	158	.type = "m25p64",
	159	};
	160
	161	/* SPI flash chip (m25p64) */
162	static struct bfin5xx_spi_chip spi_flash_chip_info = {
163	.enable_dma = 0, /* use dma transfer with this chip*/
164	.bits_per_word = 8,
165	};
166	#endif
167
168	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
169	/* SPI ADC chip */
170	static struct bfin5xx_spi_chip spi_adc_chip_info = {
171	.ctl_reg = 0x1000,
172	.enable_dma = 1, /* use dma transfer with this chip*/
173	.bits_per_word = 16,
174	};
175	#endif
176
177	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
178	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
179	.ctl_reg = 0x1000,
180	.enable_dma = 0,
181	.bits_per_word = 16,
182	};
183	#endif
184
185	#if defined(CONFIG_PBX)
186	static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
187	.ctl_reg = 0x1c04,
188	.enable_dma = 0,
189	.bits_per_word = 8,
190	.cs_change_per_word = 1,
191	};
192	#endif
193
194	/* Notice: for blackfin, the speed_hz is the value of register
195	* SPI_BAUD, not the real baudrate */
196	static struct spi_board_info bfin_spi_board_info[] __initdata = {
197	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
198	{
199	/* the modalias must be the same as spi device driver name */
200	.modalias = "m25p80", /* Name of spi_driver for this device */
201	/* this value is the baudrate divisor */
202	.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
203	.bus_num = 0, /* Framework bus number */
204	.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
205	.platform_data = &bfin_spi_flash_data,
206	.controller_data = &spi_flash_chip_info,
207	.mode = SPI_MODE_3,
208	},
209	#endif
210
211	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
212	{
213	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
214	.max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */
215	.bus_num = 1, /* Framework bus number */
216	.chip_select = 1, /* Framework chip select. */
217	.platform_data = NULL, /* No spi_driver specific config */
218	.controller_data = &spi_adc_chip_info,
219	},
220	#endif
221
222	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
223	{
224	.modalias = "ad1836-spi",
225	.max_speed_hz = 16,
226	.bus_num = 1,
227	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
228	.controller_data = &ad1836_spi_chip_info,
229	},
230	#endif
231
232	#if defined(CONFIG_PBX)
233	{
234	.modalias = "fxs-spi",
235	.max_speed_hz = 4,
236	.bus_num = 1,
237	.chip_select = 3,
238	.controller_data = &spi_si3xxx_chip_info,
239	},
240
241	{
242	.modalias = "fxo-spi",
243	.max_speed_hz = 4,
244	.bus_num = 1,
245	.chip_select = 2,
246	.controller_data = &spi_si3xxx_chip_info,
247	},
248	#endif
249	};
250
251	/* SPI (0) */
252	static struct resource bfin_spi0_resource[] = {
253	[0] = {
254	.start = SPI0_REGBASE,
255	.end = SPI0_REGBASE + 0xFF,
256	.flags = IORESOURCE_MEM,
257	},
258	[1] = {
259	.start = CH_SPI,
260	.end = CH_SPI,
261	.flags = IORESOURCE_IRQ,
262	}
263	};
264
265
266	/* SPI controller data */
267	static struct bfin5xx_spi_master bfin_spi0_info = {
268	.num_chipselect = 8,
269	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	270	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
ab472a04 JH	271	};
	272
	273	static struct platform_device bfin_spi0_device = {
	274	.name = "bfin-spi",
	275	.id = 0, /* Bus number */
	276	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	277	.resource = bfin_spi0_resource,
	278	.dev = {
	279	.platform_data = &bfin_spi0_info, /* Passed to driver */
	280	},
	281	};
	282	#endif /* spi master and devices */
	283
	284	#if defined(CONFIG_FB_BF537_LQ035) \|\| defined(CONFIG_FB_BF537_LQ035_MODULE)
	285	static struct platform_device bfin_fb_device = {
	286	.name = "bf537-fb",
	287	};
	288	#endif
	289
	290	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	291	static struct resource bfin_uart_resources[] = {
	292	{
	293	.start = 0xFFC00400,
	294	.end = 0xFFC004FF,
	295	.flags = IORESOURCE_MEM,
	296	},
	297	};
	298
	299	static struct platform_device bfin_uart_device = {
	300	.name = "bfin-uart",
	301	.id = 1,
	302	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	303	.resource = bfin_uart_resources,
	304	};
	305	#endif
	306
5be36d22 GY	307	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
	308	static struct resource bfin_sir_resources[] = {
	309	#ifdef CONFIG_BFIN_SIR0
	310	{
	311	.start = 0xFFC00400,
	312	.end = 0xFFC004FF,
	313	.flags = IORESOURCE_MEM,
	314	},
	315	#endif
	316	};
	317
	318	static struct platform_device bfin_sir_device = {
	319	.name = "bfin_sir",
	320	.id = 0,
	321	.num_resources = ARRAY_SIZE(bfin_sir_resources),
	322	.resource = bfin_sir_resources,
	323	};
	324	#endif
	325
fb96c56d JH	326	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	327
	328	#include <linux/serial_8250.h>
	329	#include <linux/serial.h>
	330
	331	/*
	332	* Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
	333	* running at half system clock, both with interrupt output or-ed to PF8. Change to
	334	* suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
	335	*/
	336
	337	static struct plat_serial8250_port serial8250_platform_data [] = {
	338	{
	339	.membase = 0x20200000,
	340	.mapbase = 0x20200000,
	341	.irq = IRQ_PF8,
	342	.flags = UPF_BOOT_AUTOCONF \| UART_CONFIG_TYPE,
	343	.iotype = UPIO_MEM,
	344	.regshift = 1,
	345	.uartclk = 66666667,
	346	}, {
	347	.membase = 0x20200010,
	348	.mapbase = 0x20200010,
	349	.irq = IRQ_PF8,
	350	.flags = UPF_BOOT_AUTOCONF \| UART_CONFIG_TYPE,
	351	.iotype = UPIO_MEM,
	352	.regshift = 1,
	353	.uartclk = 66666667,
	354	}, {
	355	}
	356	};
	357
	358	static struct platform_device serial8250_device = {
	359	.id = PLAT8250_DEV_PLATFORM,
	360	.name = "serial8250",
	361	.dev = {
	362	.platform_data = serial8250_platform_data,
	363	},
	364	};
	365
	366	#endif
	367
7a5f8191 JH	368	#if defined(CONFIG_KEYBOARD_OPENCORES) \|\| defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	369
	370	/*
	371	* Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
	372	* interrupt output wired to PF9. Change to suit different FPGA configuration
	373	*/
	374
	375	static struct resource opencores_kbd_resources[] = {
	376	[0] = {
	377	.start = 0x20200030,
	378	.end = 0x20300030 + 2,
	379	.flags = IORESOURCE_MEM,
	380	},
	381	[1] = {
	382	.start = IRQ_PF9,
	383	.end = IRQ_PF9,
	384	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
	385	},
	386	};
	387
	388	static struct platform_device opencores_kbd_device = {
	389	.id = -1,
	390	.name = "opencores-kbd",
	391	.resource = opencores_kbd_resources,
	392	.num_resources = ARRAY_SIZE(opencores_kbd_resources),
	393	};
	394	#endif
	395
fb96c56d	396	static struct platform_device *h8606_devices[] __initdata = {
ab472a04 JH	397	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	398	&rtc_device,
	399	#endif
	400
	401	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
	402	&dm9000_device,
	403	#endif
	404
	405	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	406	&smc91x_device,
	407	#endif
	408
	409	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	410	&net2272_bfin_device,
	411	#endif
	412
	413	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	414	&bfin_spi0_device,
	415	#endif
	416
	417	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	418	&bfin_uart_device,
	419	#endif
fb96c56d JH	420
	421	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	422	&serial8250_device,
	423	#endif
7a5f8191	424
5be36d22 GY	425	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
	426	&bfin_sir_device,
	427	#endif
	428
7a5f8191 JH	429	#if defined(CONFIG_KEYBOARD_OPENCORES) \|\| defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	430	&opencores_kbd_device,
	431	#endif
ab472a04 JH	432	};
	433
	434	static int __init H8606_init(void)
	435	{
	436	printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
b85d858b	437	printk(KERN_INFO "%s(): registering device resources\n", __func__);
fb96c56d	438	platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
ab472a04 JH	439	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	440	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	441	#endif
	442	return 0;
	443	}
	444
0feea17f	445	arch_initcall(H8606_init);