[deliverable/linux.git] / arch / blackfin / mach-bf533 / boards / H8606.c

/*
 * File:         arch/blackfin/mach-bf533/H8606.c
 * Based on:     arch/blackfin/mach-bf533/stamp.c
 * Author:       Javier Herrero <jherrero@hvsistemas.es>
 *
 * Created:      2007
 * Description:  Board Info File for the HV Sistemas H8606 board
 *
 * Modified:
 *               Copyright 2005 National ICT Australia (NICTA)
 *               Copyright 2004-2006 Analog Devices Inc
 *		 Copyright 2007,2008 HV Sistemas S.L.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/irq.h>

#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "HV Sistemas H8606";

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

/*
*  Driver needs to know address, irq and flag pin.
 */
 #if	defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource dm9000_resources[] = {
	[0] = {
		.start	= 0x20300000,
		.end	= 0x20300002,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 0x20300004,
		.end	= 0x20300006,
		.flags	= IORESOURCE_MEM,
	},
	[2] = {
		.start	= IRQ_PF10,
		.end	= IRQ_PF10,
		.flags	= (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH),
	},
};

static struct platform_device dm9000_device = {
    .id			= 0,
    .name		= "dm9000",
    .resource		= dm9000_resources,
    .num_resources	= ARRAY_SIZE(dm9000_resources),
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
#include <linux/smc91x.h>

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda = RPC_LED_100_10,
	.ledb = RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x20300300,
		.end = 0x20300300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PROG_INTB,
		.end = IRQ_PROG_INTB,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	}, {
		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF10,
		.end = IRQ_PF10,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader (spi)",
		.size = 0x40000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "fpga (spi)",
		.size =   0x30000,
		.offset = 0x40000
	}, {
		.name = "linux kernel (spi)",
		.size =   0x150000,
		.offset =  0x70000
	}, {
		.name = "jffs2 root file system (spi)",
		.size =   0x640000,
		.offset = 0x1c0000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.ctl_reg = 0x1000,
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.ctl_reg = 0x1000,
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

/* Notice: for blackfin, the speed_hz is the value of register
 * SPI_BAUD, not the real baudrate */
static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		/* this value is the baudrate divisor */
		.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 4,     /* actual baudrate is SCLK/(2xspeed_hz) */
		.bus_num = 1, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836",
		.max_speed_hz = 16,
		.bus_num = 1,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif

};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	}
};


/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
static struct platform_device bfin_fb_device = {
	.name = "bf537-fb",
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
};

static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
};
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)

#include <linux/serial_8250.h>
#include <linux/serial.h>

/*
 * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
 * running at half system clock, both with interrupt output or-ed to PF8. Change to
 * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
 */

static struct plat_serial8250_port serial8250_platform_data [] = {
	{
		.membase = (void *)0x20200000,
		.mapbase = 0x20200000,
		.irq = IRQ_PF8,
		.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
		.iotype = UPIO_MEM,
		.regshift = 1,
		.uartclk = 66666667,
	}, {
		.membase = (void *)0x20200010,
		.mapbase = 0x20200010,
		.irq = IRQ_PF8,
		.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
		.iotype = UPIO_MEM,
		.regshift = 1,
		.uartclk = 66666667,
	}, {
	}
};

static struct platform_device serial8250_device = {
	.id		= PLAT8250_DEV_PLATFORM,
	.name		= "serial8250",
	.dev		= {
		.platform_data = serial8250_platform_data,
	},
};

#endif

#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)

/*
 * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
 * interrupt output wired to PF9. Change to suit different FPGA configuration
 */

static struct resource opencores_kbd_resources[] = {
	[0] = {
		.start	= 0x20200030,
		.end	= 0x20300030 + 2,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_PF9,
		.end	= IRQ_PF9,
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct platform_device opencores_kbd_device = {
	.id		= -1,
	.name		= "opencores-kbd",
	.resource	= opencores_kbd_resources,
	.num_resources	= ARRAY_SIZE(opencores_kbd_resources),
};
#endif

static struct platform_device *h8606_devices[] __initdata = {
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if	defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
	&dm9000_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	&serial8250_device,
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#endif

#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	&opencores_kbd_device,
#endif
};

static int __init H8606_init(void)
{
	printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif
	return 0;
}

arch_initcall(H8606_init);
Commit	Line	Data
ab472a04 JH	1	/*
	2	* File: arch/blackfin/mach-bf533/H8606.c
	3	* Based on: arch/blackfin/mach-bf533/stamp.c
	4	* Author: Javier Herrero <jherrero@hvsistemas.es>
	5	*
	6	* Created: 2007
	7	* Description: Board Info File for the HV Sistemas H8606 board
	8	*
	9	* Modified:
	10	* Copyright 2005 National ICT Australia (NICTA)
	11	* Copyright 2004-2006 Analog Devices Inc
45138439	12	* Copyright 2007,2008 HV Sistemas S.L.
ab472a04 JH	13	*
	14	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	15	*
	16	* This program is free software; you can redistribute it and/or modify
	17	* it under the terms of the GNU General Public License as published by
	18	* the Free Software Foundation; either version 2 of the License, or
	19	* (at your option) any later version.
	20	*
	21	* This program is distributed in the hope that it will be useful,
	22	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	23	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	24	* GNU General Public License for more details.
	25	*
	26	* You should have received a copy of the GNU General Public License
	27	* along with this program; if not, see the file COPYING, or write
	28	* to the Free Software Foundation, Inc.,
	29	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	30	*/
	31
	32	#include <linux/device.h>
	33	#include <linux/platform_device.h>
	34	#include <linux/mtd/mtd.h>
	35	#include <linux/mtd/partitions.h>
	36	#include <linux/spi/spi.h>
	37	#include <linux/spi/flash.h>
	38	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	39	#include <linux/usb/isp1362.h>
ab472a04	40	#endif
ab472a04	41	#include <linux/irq.h>
fb96c56d	42
ab472a04 JH	43	#include <asm/dma.h>
	44	#include <asm/bfin5xx_spi.h>
	45	#include <asm/reboot.h>
5d448dd5	46	#include <asm/portmux.h>
ab472a04 JH	47
	48	/*
	49	* Name the Board for the /proc/cpuinfo
	50	*/
	51	const char bfin_board_name[] = "HV Sistemas H8606";
	52
09db9487	53	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
ab472a04 JH	54	static struct platform_device rtc_device = {
	55	.name = "rtc-bfin",
	56	.id = -1,
	57	};
	58	#endif
	59
	60	/*
	61	* Driver needs to know address, irq and flag pin.
	62	*/
	63	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
	64	static struct resource dm9000_resources[] = {
	65	[0] = {
	66	.start = 0x20300000,
45138439	67	.end = 0x20300002,
ab472a04 JH	68	.flags = IORESOURCE_MEM,
	69	},
	70	[1] = {
45138439 JH	71	.start = 0x20300004,
45138439 JH	72	.end = 0x20300006,
da3854fc LP	73	.flags = IORESOURCE_MEM,
	74	},
	75	[2] = {
ab472a04 JH	76	.start = IRQ_PF10,
ab472a04 JH	77	.end = IRQ_PF10,
45138439	78	.flags = (IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE \| IRQF_SHARED \| IRQF_TRIGGER_HIGH),
ab472a04 JH	79	},
	80	};
	81
	82	static struct platform_device dm9000_device = {
	83	.id = 0,
	84	.name = "dm9000",
	85	.resource = dm9000_resources,
	86	.num_resources = ARRAY_SIZE(dm9000_resources),
	87	};
	88	#endif
	89
	90	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
61f09b5a MH	91	#include <linux/smc91x.h>
	92
	93	static struct smc91x_platdata smc91x_info = {
	94	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	95	.leda = RPC_LED_100_10,
	96	.ledb = RPC_LED_TX_RX,
	97	};
	98
ab472a04 JH	99	static struct resource smc91x_resources[] = {
	100	{
	101	.name = "smc91x-regs",
	102	.start = 0x20300300,
	103	.end = 0x20300300 + 16,
	104	.flags = IORESOURCE_MEM,
	105	}, {
	106	.start = IRQ_PROG_INTB,
	107	.end = IRQ_PROG_INTB,
	108	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	109	}, {
ab472a04 JH	110	.start = IRQ_PF7,
	111	.end = IRQ_PF7,
	112	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	113	},
	114	};
	115
	116	static struct platform_device smc91x_device = {
	117	.name = "smc91x",
	118	.id = 0,
	119	.num_resources = ARRAY_SIZE(smc91x_resources),
	120	.resource = smc91x_resources,
61f09b5a MH	121	.dev = {
	122	.platform_data = &smc91x_info,
	123	},
ab472a04 JH	124	};
	125	#endif
	126
	127	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	128	static struct resource net2272_bfin_resources[] = {
	129	{
	130	.start = 0x20300000,
	131	.end = 0x20300000 + 0x100,
	132	.flags = IORESOURCE_MEM,
	133	}, {
	134	.start = IRQ_PF10,
	135	.end = IRQ_PF10,
	136	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	137	},
	138	};
	139
	140	static struct platform_device net2272_bfin_device = {
	141	.name = "net2272",
	142	.id = -1,
	143	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	144	.resource = net2272_bfin_resources,
	145	};
	146	#endif
	147
	148	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	149	/* all SPI peripherals info goes here */
	150
	151	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	152	static struct mtd_partition bfin_spi_flash_partitions[] = {
	153	{
45138439 JH	154	.name = "bootloader (spi)",
45138439 JH	155	.size = 0x40000,
ab472a04 JH	156	.offset = 0,
	157	.mask_flags = MTD_CAP_ROM
	158	}, {
45138439 JH	159	.name = "fpga (spi)",
	160	.size = 0x30000,
	161	.offset = 0x40000
ab472a04	162	}, {
45138439 JH	163	.name = "linux kernel (spi)",
	164	.size = 0x150000,
	165	.offset = 0x70000
	166	}, {
	167	.name = "jffs2 root file system (spi)",
	168	.size = 0x640000,
	169	.offset = 0x1c0000,
ab472a04 JH	170	}
	171	};
	172
	173	static struct flash_platform_data bfin_spi_flash_data = {
	174	.name = "m25p80",
	175	.parts = bfin_spi_flash_partitions,
	176	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	177	.type = "m25p64",
	178	};
	179
	180	/* SPI flash chip (m25p64) */
	181	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	182	.enable_dma = 0, /* use dma transfer with this chip*/
	183	.bits_per_word = 8,
	184	};
	185	#endif
	186
a261eec0	187	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
ab472a04 JH	188	/* SPI ADC chip */
	189	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	190	.ctl_reg = 0x1000,
	191	.enable_dma = 1, /* use dma transfer with this chip*/
	192	.bits_per_word = 16,
	193	};
	194	#endif
	195
	196	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	197	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	198	.ctl_reg = 0x1000,
	199	.enable_dma = 0,
	200	.bits_per_word = 16,
	201	};
	202	#endif
	203
ab472a04 JH	204	/* Notice: for blackfin, the speed_hz is the value of register
	205	* SPI_BAUD, not the real baudrate */
	206	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	207	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	208	{
	209	/* the modalias must be the same as spi device driver name */
	210	.modalias = "m25p80", /* Name of spi_driver for this device */
	211	/* this value is the baudrate divisor */
	212	.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
	213	.bus_num = 0, /* Framework bus number */
	214	.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
	215	.platform_data = &bfin_spi_flash_data,
	216	.controller_data = &spi_flash_chip_info,
	217	.mode = SPI_MODE_3,
	218	},
	219	#endif
	220
a261eec0	221	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
ab472a04 JH	222	{
	223	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	224	.max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */
	225	.bus_num = 1, /* Framework bus number */
	226	.chip_select = 1, /* Framework chip select. */
	227	.platform_data = NULL, /* No spi_driver specific config */
	228	.controller_data = &spi_adc_chip_info,
	229	},
	230	#endif
	231
	232	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	233	{
dac98174	234	.modalias = "ad1836",
ab472a04 JH	235	.max_speed_hz = 16,
	236	.bus_num = 1,
	237	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	238	.controller_data = &ad1836_spi_chip_info,
	239	},
	240	#endif
	241
ab472a04 JH	242	};
	243
	244	/* SPI (0) */
	245	static struct resource bfin_spi0_resource[] = {
	246	[0] = {
	247	.start = SPI0_REGBASE,
	248	.end = SPI0_REGBASE + 0xFF,
	249	.flags = IORESOURCE_MEM,
	250	},
	251	[1] = {
	252	.start = CH_SPI,
	253	.end = CH_SPI,
53122693 YL	254	.flags = IORESOURCE_DMA,
	255	},
	256	[2] = {
	257	.start = IRQ_SPI,
	258	.end = IRQ_SPI,
ab472a04 JH	259	.flags = IORESOURCE_IRQ,
	260	}
	261	};
	262
	263
	264	/* SPI controller data */
	265	static struct bfin5xx_spi_master bfin_spi0_info = {
	266	.num_chipselect = 8,
	267	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	268	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
ab472a04 JH	269	};
	270
	271	static struct platform_device bfin_spi0_device = {
	272	.name = "bfin-spi",
	273	.id = 0, /* Bus number */
	274	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	275	.resource = bfin_spi0_resource,
	276	.dev = {
	277	.platform_data = &bfin_spi0_info, /* Passed to driver */
	278	},
	279	};
	280	#endif /* spi master and devices */
	281
	282	#if defined(CONFIG_FB_BF537_LQ035) \|\| defined(CONFIG_FB_BF537_LQ035_MODULE)
	283	static struct platform_device bfin_fb_device = {
	284	.name = "bf537-fb",
	285	};
	286	#endif
	287
	288	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	289	static struct resource bfin_uart_resources[] = {
	290	{
	291	.start = 0xFFC00400,
	292	.end = 0xFFC004FF,
	293	.flags = IORESOURCE_MEM,
	294	},
	295	};
	296
	297	static struct platform_device bfin_uart_device = {
	298	.name = "bfin-uart",
	299	.id = 1,
	300	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	301	.resource = bfin_uart_resources,
	302	};
	303	#endif
	304
5be36d22	305	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	306	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	307	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	308	{
	309	.start = 0xFFC00400,
	310	.end = 0xFFC004FF,
	311	.flags = IORESOURCE_MEM,
	312	},
42bd8bcb GY	313	{
	314	.start = IRQ_UART0_RX,
	315	.end = IRQ_UART0_RX+1,
	316	.flags = IORESOURCE_IRQ,
	317	},
	318	{
	319	.start = CH_UART0_RX,
	320	.end = CH_UART0_RX+1,
	321	.flags = IORESOURCE_DMA,
	322	},
5be36d22 GY	323	};
5be36d22 GY	324
42bd8bcb	325	static struct platform_device bfin_sir0_device = {
5be36d22 GY	326	.name = "bfin_sir",
5be36d22 GY	327	.id = 0,
42bd8bcb GY	328	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
42bd8bcb GY	329	.resource = bfin_sir0_resources,
5be36d22 GY	330	};
5be36d22 GY	331	#endif
42bd8bcb	332	#endif
5be36d22	333
fb96c56d JH	334	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	335
	336	#include <linux/serial_8250.h>
	337	#include <linux/serial.h>
	338
	339	/*
	340	* Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
	341	* running at half system clock, both with interrupt output or-ed to PF8. Change to
	342	* suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
	343	*/
	344
	345	static struct plat_serial8250_port serial8250_platform_data [] = {
	346	{
45138439	347	.membase = (void *)0x20200000,
fb96c56d JH	348	.mapbase = 0x20200000,
	349	.irq = IRQ_PF8,
	350	.flags = UPF_BOOT_AUTOCONF \| UART_CONFIG_TYPE,
	351	.iotype = UPIO_MEM,
	352	.regshift = 1,
	353	.uartclk = 66666667,
	354	}, {
45138439	355	.membase = (void *)0x20200010,
fb96c56d JH	356	.mapbase = 0x20200010,
	357	.irq = IRQ_PF8,
	358	.flags = UPF_BOOT_AUTOCONF \| UART_CONFIG_TYPE,
	359	.iotype = UPIO_MEM,
	360	.regshift = 1,
	361	.uartclk = 66666667,
	362	}, {
	363	}
	364	};
	365
	366	static struct platform_device serial8250_device = {
	367	.id = PLAT8250_DEV_PLATFORM,
	368	.name = "serial8250",
	369	.dev = {
	370	.platform_data = serial8250_platform_data,
	371	},
	372	};
	373
	374	#endif
	375
7a5f8191 JH	376	#if defined(CONFIG_KEYBOARD_OPENCORES) \|\| defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	377
	378	/*
	379	* Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
	380	* interrupt output wired to PF9. Change to suit different FPGA configuration
	381	*/
	382
	383	static struct resource opencores_kbd_resources[] = {
	384	[0] = {
	385	.start = 0x20200030,
	386	.end = 0x20300030 + 2,
	387	.flags = IORESOURCE_MEM,
	388	},
	389	[1] = {
	390	.start = IRQ_PF9,
	391	.end = IRQ_PF9,
	392	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
	393	},
	394	};
	395
	396	static struct platform_device opencores_kbd_device = {
	397	.id = -1,
	398	.name = "opencores-kbd",
	399	.resource = opencores_kbd_resources,
	400	.num_resources = ARRAY_SIZE(opencores_kbd_resources),
	401	};
	402	#endif
	403
fb96c56d	404	static struct platform_device *h8606_devices[] __initdata = {
ab472a04 JH	405	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	406	&rtc_device,
	407	#endif
	408
	409	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
	410	&dm9000_device,
	411	#endif
	412
	413	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	414	&smc91x_device,
	415	#endif
	416
	417	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	418	&net2272_bfin_device,
	419	#endif
	420
	421	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	422	&bfin_spi0_device,
	423	#endif
	424
	425	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	426	&bfin_uart_device,
	427	#endif
fb96c56d JH	428
	429	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	430	&serial8250_device,
	431	#endif
7a5f8191	432
5be36d22	433	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	434	#ifdef CONFIG_BFIN_SIR0
	435	&bfin_sir0_device,
	436	#endif
5be36d22 GY	437	#endif
5be36d22 GY	438
7a5f8191 JH	439	#if defined(CONFIG_KEYBOARD_OPENCORES) \|\| defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	440	&opencores_kbd_device,
	441	#endif
ab472a04 JH	442	};
	443
	444	static int __init H8606_init(void)
	445	{
	446	printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
b85d858b	447	printk(KERN_INFO "%s(): registering device resources\n", __func__);
fb96c56d	448	platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
ab472a04 JH	449	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	450	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	451	#endif
	452	return 0;
	453	}
	454
0feea17f	455	arch_initcall(H8606_init);