[deliverable/linux.git] / arch / blackfin / mach-bf533 / boards / H8606.c

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *           2007-2008 HV Sistemas S.L.
 *                      Javier Herrero <jherrero@hvsistemas.es>
 *                2005 National ICT Australia (NICTA)
 *                      Aidan Williams <aidan@nicta.com.au>
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/irq.h>

#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "HV Sistemas H8606";

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

/*
*  Driver needs to know address, irq and flag pin.
 */
 #if	defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource dm9000_resources[] = {
	[0] = {
		.start	= 0x20300000,
		.end	= 0x20300002,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 0x20300004,
		.end	= 0x20300006,
		.flags	= IORESOURCE_MEM,
	},
	[2] = {
		.start	= IRQ_PF10,
		.end	= IRQ_PF10,
		.flags	= (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH),
	},
};

static struct platform_device dm9000_device = {
    .id			= 0,
    .name		= "dm9000",
    .resource		= dm9000_resources,
    .num_resources	= ARRAY_SIZE(dm9000_resources),
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
#include <linux/smc91x.h>

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda = RPC_LED_100_10,
	.ledb = RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x20300300,
		.end = 0x20300300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PROG_INTB,
		.end = IRQ_PROG_INTB,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	}, {
		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF10,
		.end = IRQ_PF10,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader (spi)",
		.size = 0x40000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "fpga (spi)",
		.size =   0x30000,
		.offset = 0x40000
	}, {
		.name = "linux kernel (spi)",
		.size =   0x150000,
		.offset =  0x70000
	}, {
		.name = "jffs2 root file system (spi)",
		.size =   0x640000,
		.offset = 0x1c0000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
};
#endif

/* Notice: for blackfin, the speed_hz is the value of register
 * SPI_BAUD, not the real baudrate */
static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		/* this value is the baudrate divisor */
		.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
	{
		.modalias = "ad183x",
		.max_speed_hz = 16,
		.bus_num = 1,
		.chip_select = 4,
	},
#endif

};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	}
};


/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
static struct resource bfin_uart0_resources[] = {
	{
		.start = BFIN_UART_THR,
		.end = BFIN_UART_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX + 1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART0_ERROR,
		.end = IRQ_UART0_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_TX,
		.end = CH_UART0_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX,
		.flags = IORESOURCE_DMA,
	},
};

static unsigned short bfin_uart0_peripherals[] = {
	P_UART0_TX, P_UART0_RX, 0
};

static struct platform_device bfin_uart0_device = {
	.name = "bfin-uart",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	.resource = bfin_uart0_resources,
	.dev = {
		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	},
};
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)

#include <linux/serial_8250.h>
#include <linux/serial.h>

/*
 * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
 * running at half system clock, both with interrupt output or-ed to PF8. Change to
 * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
 */

static struct plat_serial8250_port serial8250_platform_data [] = {
	{
		.membase = (void *)0x20200000,
		.mapbase = 0x20200000,
		.irq = IRQ_PF8,
		.irqflags = IRQF_TRIGGER_HIGH,
		.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
		.iotype = UPIO_MEM,
		.regshift = 1,
		.uartclk = 66666667,
	}, {
		.membase = (void *)0x20200010,
		.mapbase = 0x20200010,
		.irq = IRQ_PF8,
		.irqflags = IRQF_TRIGGER_HIGH,
		.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
		.iotype = UPIO_MEM,
		.regshift = 1,
		.uartclk = 66666667,
	}, {
	}
};

static struct platform_device serial8250_device = {
	.id		= PLAT8250_DEV_PLATFORM,
	.name		= "serial8250",
	.dev		= {
		.platform_data = serial8250_platform_data,
	},
};

#endif

#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)

/*
 * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
 * interrupt output wired to PF9. Change to suit different FPGA configuration
 */

static struct resource opencores_kbd_resources[] = {
	[0] = {
		.start	= 0x20200030,
		.end	= 0x20300030 + 2,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_PF9,
		.end	= IRQ_PF9,
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct platform_device opencores_kbd_device = {
	.id		= -1,
	.name		= "opencores-kbd",
	.resource	= opencores_kbd_resources,
	.num_resources	= ARRAY_SIZE(opencores_kbd_resources),
};
#endif

static struct platform_device *h8606_devices[] __initdata = {
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if	defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
	&dm9000_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	&serial8250_device,
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#endif

#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	&opencores_kbd_device,
#endif
};

static int __init H8606_init(void)
{
	printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif
	return 0;
}

arch_initcall(H8606_init);

static struct platform_device *H8606_early_devices[] __initdata = {
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#endif
};

void __init native_machine_early_platform_add_devices(void)
{
	printk(KERN_INFO "register early platform devices\n");
	early_platform_add_devices(H8606_early_devices,
		ARRAY_SIZE(H8606_early_devices));
}
Commit	Line	Data
ab472a04	1	/*
96f1050d RG	2	* Copyright 2004-2009 Analog Devices Inc.
	3	* 2007-2008 HV Sistemas S.L.
	4	* Javier Herrero <jherrero@hvsistemas.es>
	5	* 2005 National ICT Australia (NICTA)
	6	* Aidan Williams <aidan@nicta.com.au>
ab472a04	7	*
96f1050d	8	* Licensed under the GPL-2 or later.
ab472a04 JH	9	*/
	10
	11	#include <linux/device.h>
	12	#include <linux/platform_device.h>
	13	#include <linux/mtd/mtd.h>
	14	#include <linux/mtd/partitions.h>
	15	#include <linux/spi/spi.h>
	16	#include <linux/spi/flash.h>
	17	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	18	#include <linux/usb/isp1362.h>
ab472a04	19	#endif
ab472a04	20	#include <linux/irq.h>
fb96c56d	21
ab472a04 JH	22	#include <asm/dma.h>
	23	#include <asm/bfin5xx_spi.h>
	24	#include <asm/reboot.h>
5d448dd5	25	#include <asm/portmux.h>
ab472a04 JH	26
	27	/*
	28	* Name the Board for the /proc/cpuinfo
	29	*/
	30	const char bfin_board_name[] = "HV Sistemas H8606";
	31
09db9487	32	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
ab472a04 JH	33	static struct platform_device rtc_device = {
	34	.name = "rtc-bfin",
	35	.id = -1,
	36	};
	37	#endif
	38
	39	/*
	40	* Driver needs to know address, irq and flag pin.
	41	*/
	42	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
	43	static struct resource dm9000_resources[] = {
	44	[0] = {
	45	.start = 0x20300000,
45138439	46	.end = 0x20300002,
ab472a04 JH	47	.flags = IORESOURCE_MEM,
	48	},
	49	[1] = {
45138439 JH	50	.start = 0x20300004,
45138439 JH	51	.end = 0x20300006,
da3854fc LP	52	.flags = IORESOURCE_MEM,
	53	},
	54	[2] = {
ab472a04 JH	55	.start = IRQ_PF10,
ab472a04 JH	56	.end = IRQ_PF10,
45138439	57	.flags = (IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE \| IRQF_SHARED \| IRQF_TRIGGER_HIGH),
ab472a04 JH	58	},
	59	};
	60
	61	static struct platform_device dm9000_device = {
	62	.id = 0,
	63	.name = "dm9000",
	64	.resource = dm9000_resources,
	65	.num_resources = ARRAY_SIZE(dm9000_resources),
	66	};
	67	#endif
	68
	69	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
61f09b5a MH	70	#include <linux/smc91x.h>
	71
	72	static struct smc91x_platdata smc91x_info = {
	73	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	74	.leda = RPC_LED_100_10,
	75	.ledb = RPC_LED_TX_RX,
	76	};
	77
ab472a04 JH	78	static struct resource smc91x_resources[] = {
	79	{
	80	.name = "smc91x-regs",
	81	.start = 0x20300300,
	82	.end = 0x20300300 + 16,
	83	.flags = IORESOURCE_MEM,
	84	}, {
	85	.start = IRQ_PROG_INTB,
	86	.end = IRQ_PROG_INTB,
	87	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	88	}, {
ab472a04 JH	89	.start = IRQ_PF7,
	90	.end = IRQ_PF7,
	91	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	92	},
	93	};
	94
	95	static struct platform_device smc91x_device = {
	96	.name = "smc91x",
	97	.id = 0,
	98	.num_resources = ARRAY_SIZE(smc91x_resources),
	99	.resource = smc91x_resources,
61f09b5a MH	100	.dev = {
	101	.platform_data = &smc91x_info,
	102	},
ab472a04 JH	103	};
	104	#endif
	105
	106	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	107	static struct resource net2272_bfin_resources[] = {
	108	{
	109	.start = 0x20300000,
	110	.end = 0x20300000 + 0x100,
	111	.flags = IORESOURCE_MEM,
	112	}, {
	113	.start = IRQ_PF10,
	114	.end = IRQ_PF10,
	115	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	116	},
	117	};
	118
	119	static struct platform_device net2272_bfin_device = {
	120	.name = "net2272",
	121	.id = -1,
	122	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	123	.resource = net2272_bfin_resources,
	124	};
	125	#endif
	126
	127	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	128	/* all SPI peripherals info goes here */
	129
	130	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	131	static struct mtd_partition bfin_spi_flash_partitions[] = {
	132	{
45138439 JH	133	.name = "bootloader (spi)",
45138439 JH	134	.size = 0x40000,
ab472a04 JH	135	.offset = 0,
	136	.mask_flags = MTD_CAP_ROM
	137	}, {
45138439 JH	138	.name = "fpga (spi)",
	139	.size = 0x30000,
	140	.offset = 0x40000
ab472a04	141	}, {
45138439 JH	142	.name = "linux kernel (spi)",
	143	.size = 0x150000,
	144	.offset = 0x70000
	145	}, {
	146	.name = "jffs2 root file system (spi)",
	147	.size = 0x640000,
	148	.offset = 0x1c0000,
ab472a04 JH	149	}
	150	};
	151
	152	static struct flash_platform_data bfin_spi_flash_data = {
	153	.name = "m25p80",
	154	.parts = bfin_spi_flash_partitions,
	155	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	156	.type = "m25p64",
	157	};
	158
	159	/* SPI flash chip (m25p64) */
	160	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	161	.enable_dma = 0, /* use dma transfer with this chip*/
ab472a04 JH	162	};
	163	#endif
	164
ab472a04 JH	165	/* Notice: for blackfin, the speed_hz is the value of register
	166	* SPI_BAUD, not the real baudrate */
	167	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	168	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	169	{
	170	/* the modalias must be the same as spi device driver name */
	171	.modalias = "m25p80", /* Name of spi_driver for this device */
	172	/* this value is the baudrate divisor */
	173	.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
	174	.bus_num = 0, /* Framework bus number */
	175	.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
	176	.platform_data = &bfin_spi_flash_data,
	177	.controller_data = &spi_flash_chip_info,
	178	.mode = SPI_MODE_3,
	179	},
	180	#endif
	181
7ba80063	182	#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \|\| defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
ab472a04	183	{
7ba80063	184	.modalias = "ad183x",
ab472a04 JH	185	.max_speed_hz = 16,
ab472a04 JH	186	.bus_num = 1,
7ba80063	187	.chip_select = 4,
ab472a04 JH	188	},
	189	#endif
	190
ab472a04 JH	191	};
	192
	193	/* SPI (0) */
	194	static struct resource bfin_spi0_resource[] = {
	195	[0] = {
	196	.start = SPI0_REGBASE,
	197	.end = SPI0_REGBASE + 0xFF,
	198	.flags = IORESOURCE_MEM,
	199	},
	200	[1] = {
	201	.start = CH_SPI,
	202	.end = CH_SPI,
53122693 YL	203	.flags = IORESOURCE_DMA,
	204	},
	205	[2] = {
	206	.start = IRQ_SPI,
	207	.end = IRQ_SPI,
ab472a04 JH	208	.flags = IORESOURCE_IRQ,
	209	}
	210	};
	211
	212
	213	/* SPI controller data */
	214	static struct bfin5xx_spi_master bfin_spi0_info = {
	215	.num_chipselect = 8,
	216	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	217	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
ab472a04 JH	218	};
	219
	220	static struct platform_device bfin_spi0_device = {
	221	.name = "bfin-spi",
	222	.id = 0, /* Bus number */
	223	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	224	.resource = bfin_spi0_resource,
	225	.dev = {
	226	.platform_data = &bfin_spi0_info, /* Passed to driver */
	227	},
	228	};
	229	#endif /* spi master and devices */
	230
ab472a04	231	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	232	#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea SZ	233	static struct resource bfin_uart0_resources[] = {
ab472a04	234	{
6bd1fbea SZ	235	.start = BFIN_UART_THR,
6bd1fbea SZ	236	.end = BFIN_UART_GCTL+2,
ab472a04 JH	237	.flags = IORESOURCE_MEM,
ab472a04 JH	238	},
6bd1fbea SZ	239	{
	240	.start = IRQ_UART0_RX,
	241	.end = IRQ_UART0_RX + 1,
	242	.flags = IORESOURCE_IRQ,
	243	},
	244	{
	245	.start = IRQ_UART0_ERROR,
	246	.end = IRQ_UART0_ERROR,
	247	.flags = IORESOURCE_IRQ,
	248	},
	249	{
	250	.start = CH_UART0_TX,
	251	.end = CH_UART0_TX,
	252	.flags = IORESOURCE_DMA,
	253	},
	254	{
	255	.start = CH_UART0_RX,
	256	.end = CH_UART0_RX,
	257	.flags = IORESOURCE_DMA,
	258	},
	259	};
	260
a8b19886	261	static unsigned short bfin_uart0_peripherals[] = {
6bd1fbea	262	P_UART0_TX, P_UART0_RX, 0
ab472a04 JH	263	};
ab472a04 JH	264
6bd1fbea	265	static struct platform_device bfin_uart0_device = {
ab472a04	266	.name = "bfin-uart",
6bd1fbea SZ	267	.id = 0,
	268	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	269	.resource = bfin_uart0_resources,
	270	.dev = {
	271	.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	272	},
ab472a04 JH	273	};
ab472a04 JH	274	#endif
6bd1fbea	275	#endif
ab472a04	276
5be36d22	277	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	278	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	279	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	280	{
	281	.start = 0xFFC00400,
	282	.end = 0xFFC004FF,
	283	.flags = IORESOURCE_MEM,
	284	},
42bd8bcb GY	285	{
	286	.start = IRQ_UART0_RX,
	287	.end = IRQ_UART0_RX+1,
	288	.flags = IORESOURCE_IRQ,
	289	},
	290	{
	291	.start = CH_UART0_RX,
	292	.end = CH_UART0_RX+1,
	293	.flags = IORESOURCE_DMA,
	294	},
5be36d22 GY	295	};
5be36d22 GY	296
42bd8bcb	297	static struct platform_device bfin_sir0_device = {
5be36d22 GY	298	.name = "bfin_sir",
5be36d22 GY	299	.id = 0,
42bd8bcb GY	300	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
42bd8bcb GY	301	.resource = bfin_sir0_resources,
5be36d22 GY	302	};
5be36d22 GY	303	#endif
42bd8bcb	304	#endif
5be36d22	305
fb96c56d JH	306	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	307
	308	#include <linux/serial_8250.h>
	309	#include <linux/serial.h>
	310
	311	/*
	312	* Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
	313	* running at half system clock, both with interrupt output or-ed to PF8. Change to
	314	* suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
	315	*/
	316
	317	static struct plat_serial8250_port serial8250_platform_data [] = {
	318	{
45138439	319	.membase = (void *)0x20200000,
fb96c56d JH	320	.mapbase = 0x20200000,
fb96c56d JH	321	.irq = IRQ_PF8,
49e00edb	322	.irqflags = IRQF_TRIGGER_HIGH,
fb96c56d JH	323	.flags = UPF_BOOT_AUTOCONF \| UART_CONFIG_TYPE,
	324	.iotype = UPIO_MEM,
	325	.regshift = 1,
	326	.uartclk = 66666667,
	327	}, {
45138439	328	.membase = (void *)0x20200010,
fb96c56d JH	329	.mapbase = 0x20200010,
fb96c56d JH	330	.irq = IRQ_PF8,
49e00edb	331	.irqflags = IRQF_TRIGGER_HIGH,
fb96c56d JH	332	.flags = UPF_BOOT_AUTOCONF \| UART_CONFIG_TYPE,
	333	.iotype = UPIO_MEM,
	334	.regshift = 1,
	335	.uartclk = 66666667,
	336	}, {
	337	}
	338	};
	339
	340	static struct platform_device serial8250_device = {
	341	.id = PLAT8250_DEV_PLATFORM,
	342	.name = "serial8250",
	343	.dev = {
	344	.platform_data = serial8250_platform_data,
	345	},
	346	};
	347
	348	#endif
	349
7a5f8191 JH	350	#if defined(CONFIG_KEYBOARD_OPENCORES) \|\| defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	351
	352	/*
	353	* Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
	354	* interrupt output wired to PF9. Change to suit different FPGA configuration
	355	*/
	356
	357	static struct resource opencores_kbd_resources[] = {
	358	[0] = {
	359	.start = 0x20200030,
	360	.end = 0x20300030 + 2,
	361	.flags = IORESOURCE_MEM,
	362	},
	363	[1] = {
	364	.start = IRQ_PF9,
	365	.end = IRQ_PF9,
	366	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
	367	},
	368	};
	369
	370	static struct platform_device opencores_kbd_device = {
	371	.id = -1,
	372	.name = "opencores-kbd",
	373	.resource = opencores_kbd_resources,
	374	.num_resources = ARRAY_SIZE(opencores_kbd_resources),
	375	};
	376	#endif
	377
fb96c56d	378	static struct platform_device *h8606_devices[] __initdata = {
ab472a04 JH	379	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	380	&rtc_device,
	381	#endif
	382
	383	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
	384	&dm9000_device,
	385	#endif
	386
	387	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	388	&smc91x_device,
	389	#endif
	390
	391	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	392	&net2272_bfin_device,
	393	#endif
	394
	395	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	396	&bfin_spi0_device,
	397	#endif
	398
	399	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	400	#ifdef CONFIG_SERIAL_BFIN_UART0
	401	&bfin_uart0_device,
	402	#endif
ab472a04	403	#endif
fb96c56d JH	404
	405	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	406	&serial8250_device,
	407	#endif
7a5f8191	408
5be36d22	409	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	410	#ifdef CONFIG_BFIN_SIR0
	411	&bfin_sir0_device,
	412	#endif
5be36d22 GY	413	#endif
5be36d22 GY	414
7a5f8191 JH	415	#if defined(CONFIG_KEYBOARD_OPENCORES) \|\| defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	416	&opencores_kbd_device,
	417	#endif
ab472a04 JH	418	};
	419
	420	static int __init H8606_init(void)
	421	{
	422	printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
b85d858b	423	printk(KERN_INFO "%s(): registering device resources\n", __func__);
fb96c56d	424	platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
ab472a04 JH	425	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	426	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	427	#endif
	428	return 0;
	429	}
	430
0feea17f	431	arch_initcall(H8606_init);
c13ce9fd SZ	432
	433	static struct platform_device *H8606_early_devices[] __initdata = {
	434	#if defined(CONFIG_SERIAL_BFIN_CONSOLE) \|\| defined(CONFIG_EARLY_PRINTK)
	435	#ifdef CONFIG_SERIAL_BFIN_UART0
	436	&bfin_uart0_device,
	437	#endif
	438	#endif
	439	};
	440
	441	void __init native_machine_early_platform_add_devices(void)
	442	{
	443	printk(KERN_INFO "register early platform devices\n");
	444	early_platform_add_devices(H8606_early_devices,
	445	ARRAY_SIZE(H8606_early_devices));
	446	}