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ab472a04 JH |
1 | /* |
2 | * File: arch/blackfin/mach-bf533/H8606.c | |
3 | * Based on: arch/blackfin/mach-bf533/stamp.c | |
4 | * Author: Javier Herrero <jherrero@hvsistemas.es> | |
5 | * | |
6 | * Created: 2007 | |
7 | * Description: Board Info File for the HV Sistemas H8606 board | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc | |
12 | * Copyright 2007 HV Sistemas S.L. | |
13 | * | |
14 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or modify | |
17 | * it under the terms of the GNU General Public License as published by | |
18 | * the Free Software Foundation; either version 2 of the License, or | |
19 | * (at your option) any later version. | |
20 | * | |
21 | * This program is distributed in the hope that it will be useful, | |
22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
24 | * GNU General Public License for more details. | |
25 | * | |
26 | * You should have received a copy of the GNU General Public License | |
27 | * along with this program; if not, see the file COPYING, or write | |
28 | * to the Free Software Foundation, Inc., | |
29 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
30 | */ | |
31 | ||
32 | #include <linux/device.h> | |
33 | #include <linux/platform_device.h> | |
34 | #include <linux/mtd/mtd.h> | |
35 | #include <linux/mtd/partitions.h> | |
36 | #include <linux/spi/spi.h> | |
37 | #include <linux/spi/flash.h> | |
38 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
39 | #include <linux/usb_isp1362.h> | |
40 | #endif | |
41 | #include <linux/pata_platform.h> | |
42 | #include <linux/irq.h> | |
43 | #include <asm/dma.h> | |
44 | #include <asm/bfin5xx_spi.h> | |
45 | #include <asm/reboot.h> | |
46 | ||
47 | /* | |
48 | * Name the Board for the /proc/cpuinfo | |
49 | */ | |
50 | const char bfin_board_name[] = "HV Sistemas H8606"; | |
51 | ||
52 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_BFIN_MODULE) | |
53 | static struct platform_device rtc_device = { | |
54 | .name = "rtc-bfin", | |
55 | .id = -1, | |
56 | }; | |
57 | #endif | |
58 | ||
59 | /* | |
60 | * Driver needs to know address, irq and flag pin. | |
61 | */ | |
62 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | |
63 | static struct resource dm9000_resources[] = { | |
64 | [0] = { | |
65 | .start = 0x20300000, | |
66 | .end = 0x20300000 + 8, | |
67 | .flags = IORESOURCE_MEM, | |
68 | }, | |
69 | [1] = { | |
70 | .start = IRQ_PF10, | |
71 | .end = IRQ_PF10, | |
72 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | |
73 | }, | |
74 | }; | |
75 | ||
76 | static struct platform_device dm9000_device = { | |
77 | .id = 0, | |
78 | .name = "dm9000", | |
79 | .resource = dm9000_resources, | |
80 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
81 | }; | |
82 | #endif | |
83 | ||
84 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
85 | static struct resource smc91x_resources[] = { | |
86 | { | |
87 | .name = "smc91x-regs", | |
88 | .start = 0x20300300, | |
89 | .end = 0x20300300 + 16, | |
90 | .flags = IORESOURCE_MEM, | |
91 | }, { | |
92 | .start = IRQ_PROG_INTB, | |
93 | .end = IRQ_PROG_INTB, | |
94 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
95 | }, { | |
96 | /* | |
97 | * denotes the flag pin and is used directly if | |
98 | * CONFIG_IRQCHIP_DEMUX_GPIO is defined. | |
99 | */ | |
100 | .start = IRQ_PF7, | |
101 | .end = IRQ_PF7, | |
102 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
103 | }, | |
104 | }; | |
105 | ||
106 | static struct platform_device smc91x_device = { | |
107 | .name = "smc91x", | |
108 | .id = 0, | |
109 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
110 | .resource = smc91x_resources, | |
111 | }; | |
112 | #endif | |
113 | ||
114 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
115 | static struct resource net2272_bfin_resources[] = { | |
116 | { | |
117 | .start = 0x20300000, | |
118 | .end = 0x20300000 + 0x100, | |
119 | .flags = IORESOURCE_MEM, | |
120 | }, { | |
121 | .start = IRQ_PF10, | |
122 | .end = IRQ_PF10, | |
123 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
124 | }, | |
125 | }; | |
126 | ||
127 | static struct platform_device net2272_bfin_device = { | |
128 | .name = "net2272", | |
129 | .id = -1, | |
130 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
131 | .resource = net2272_bfin_resources, | |
132 | }; | |
133 | #endif | |
134 | ||
135 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
136 | /* all SPI peripherals info goes here */ | |
137 | ||
138 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
139 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
140 | { | |
141 | .name = "bootloader", | |
142 | .size = 0x00060000, | |
143 | .offset = 0, | |
144 | .mask_flags = MTD_CAP_ROM | |
145 | }, { | |
146 | .name = "kernel", | |
147 | .size = 0x100000, | |
148 | .offset = 0x60000 | |
149 | }, { | |
150 | .name = "file system", | |
151 | .size = 0x6a0000, | |
152 | .offset = 0x00160000, | |
153 | } | |
154 | }; | |
155 | ||
156 | static struct flash_platform_data bfin_spi_flash_data = { | |
157 | .name = "m25p80", | |
158 | .parts = bfin_spi_flash_partitions, | |
159 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
160 | .type = "m25p64", | |
161 | }; | |
162 | ||
163 | /* SPI flash chip (m25p64) */ | |
164 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
165 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
166 | .bits_per_word = 8, | |
167 | }; | |
168 | #endif | |
169 | ||
170 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
171 | /* SPI ADC chip */ | |
172 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
173 | .ctl_reg = 0x1000, | |
174 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
175 | .bits_per_word = 16, | |
176 | }; | |
177 | #endif | |
178 | ||
179 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
180 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
181 | .ctl_reg = 0x1000, | |
182 | .enable_dma = 0, | |
183 | .bits_per_word = 16, | |
184 | }; | |
185 | #endif | |
186 | ||
187 | #if defined(CONFIG_PBX) | |
188 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
189 | .ctl_reg = 0x1c04, | |
190 | .enable_dma = 0, | |
191 | .bits_per_word = 8, | |
192 | .cs_change_per_word = 1, | |
193 | }; | |
194 | #endif | |
195 | ||
196 | /* Notice: for blackfin, the speed_hz is the value of register | |
197 | * SPI_BAUD, not the real baudrate */ | |
198 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | |
199 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
200 | { | |
201 | /* the modalias must be the same as spi device driver name */ | |
202 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
203 | /* this value is the baudrate divisor */ | |
204 | .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */ | |
205 | .bus_num = 0, /* Framework bus number */ | |
206 | .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ | |
207 | .platform_data = &bfin_spi_flash_data, | |
208 | .controller_data = &spi_flash_chip_info, | |
209 | .mode = SPI_MODE_3, | |
210 | }, | |
211 | #endif | |
212 | ||
213 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
214 | { | |
215 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
216 | .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */ | |
217 | .bus_num = 1, /* Framework bus number */ | |
218 | .chip_select = 1, /* Framework chip select. */ | |
219 | .platform_data = NULL, /* No spi_driver specific config */ | |
220 | .controller_data = &spi_adc_chip_info, | |
221 | }, | |
222 | #endif | |
223 | ||
224 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
225 | { | |
226 | .modalias = "ad1836-spi", | |
227 | .max_speed_hz = 16, | |
228 | .bus_num = 1, | |
229 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, | |
230 | .controller_data = &ad1836_spi_chip_info, | |
231 | }, | |
232 | #endif | |
233 | ||
234 | #if defined(CONFIG_PBX) | |
235 | { | |
236 | .modalias = "fxs-spi", | |
237 | .max_speed_hz = 4, | |
238 | .bus_num = 1, | |
239 | .chip_select = 3, | |
240 | .controller_data = &spi_si3xxx_chip_info, | |
241 | }, | |
242 | ||
243 | { | |
244 | .modalias = "fxo-spi", | |
245 | .max_speed_hz = 4, | |
246 | .bus_num = 1, | |
247 | .chip_select = 2, | |
248 | .controller_data = &spi_si3xxx_chip_info, | |
249 | }, | |
250 | #endif | |
251 | }; | |
252 | ||
253 | /* SPI (0) */ | |
254 | static struct resource bfin_spi0_resource[] = { | |
255 | [0] = { | |
256 | .start = SPI0_REGBASE, | |
257 | .end = SPI0_REGBASE + 0xFF, | |
258 | .flags = IORESOURCE_MEM, | |
259 | }, | |
260 | [1] = { | |
261 | .start = CH_SPI, | |
262 | .end = CH_SPI, | |
263 | .flags = IORESOURCE_IRQ, | |
264 | } | |
265 | }; | |
266 | ||
267 | ||
268 | /* SPI controller data */ | |
269 | static struct bfin5xx_spi_master bfin_spi0_info = { | |
270 | .num_chipselect = 8, | |
271 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
272 | }; | |
273 | ||
274 | static struct platform_device bfin_spi0_device = { | |
275 | .name = "bfin-spi", | |
276 | .id = 0, /* Bus number */ | |
277 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
278 | .resource = bfin_spi0_resource, | |
279 | .dev = { | |
280 | .platform_data = &bfin_spi0_info, /* Passed to driver */ | |
281 | }, | |
282 | }; | |
283 | #endif /* spi master and devices */ | |
284 | ||
285 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
286 | static struct platform_device bfin_fb_device = { | |
287 | .name = "bf537-fb", | |
288 | }; | |
289 | #endif | |
290 | ||
291 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
292 | static struct resource bfin_uart_resources[] = { | |
293 | { | |
294 | .start = 0xFFC00400, | |
295 | .end = 0xFFC004FF, | |
296 | .flags = IORESOURCE_MEM, | |
297 | }, | |
298 | }; | |
299 | ||
300 | static struct platform_device bfin_uart_device = { | |
301 | .name = "bfin-uart", | |
302 | .id = 1, | |
303 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
304 | .resource = bfin_uart_resources, | |
305 | }; | |
306 | #endif | |
307 | ||
308 | static struct platform_device *stamp_devices[] __initdata = { | |
309 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
310 | &rtc_device, | |
311 | #endif | |
312 | ||
313 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | |
314 | &dm9000_device, | |
315 | #endif | |
316 | ||
317 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
318 | &smc91x_device, | |
319 | #endif | |
320 | ||
321 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
322 | &net2272_bfin_device, | |
323 | #endif | |
324 | ||
325 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
326 | &bfin_spi0_device, | |
327 | #endif | |
328 | ||
329 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
330 | &bfin_uart_device, | |
331 | #endif | |
332 | }; | |
333 | ||
334 | static int __init H8606_init(void) | |
335 | { | |
336 | printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n"); | |
337 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
338 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | |
339 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
340 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | |
341 | #endif | |
342 | return 0; | |
343 | } | |
344 | ||
345 | arch_initcall(H8606_init); |