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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf533/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: 2005 | |
7 | * Description: Board Info File for the BF533-STAMP | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
de8c43f2 | 35 | #include <linux/mtd/physmap.h> |
1394f032 BW |
36 | #include <linux/spi/spi.h> |
37 | #include <linux/spi/flash.h> | |
2120b68f | 38 | #include <linux/spi/mmc_spi.h> |
1394f032 | 39 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
f02bcec5 | 40 | #include <linux/usb/isp1362.h> |
1394f032 | 41 | #endif |
1f83b8f1 | 42 | #include <linux/irq.h> |
81d9c7f2 | 43 | #include <linux/i2c.h> |
c6c4d7bb | 44 | #include <asm/dma.h> |
1394f032 | 45 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 46 | #include <asm/reboot.h> |
5d448dd5 | 47 | #include <asm/portmux.h> |
14b03204 | 48 | #include <asm/dpmc.h> |
1394f032 BW |
49 | |
50 | /* | |
51 | * Name the Board for the /proc/cpuinfo | |
52 | */ | |
fe85cad2 | 53 | const char bfin_board_name[] = "ADI BF533-STAMP"; |
1394f032 BW |
54 | |
55 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
56 | static struct platform_device rtc_device = { | |
57 | .name = "rtc-bfin", | |
58 | .id = -1, | |
59 | }; | |
60 | #endif | |
61 | ||
62 | /* | |
63 | * Driver needs to know address, irq and flag pin. | |
64 | */ | |
65 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
61f09b5a MH |
66 | #include <linux/smc91x.h> |
67 | ||
68 | static struct smc91x_platdata smc91x_info = { | |
69 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, | |
70 | .leda = RPC_LED_100_10, | |
71 | .ledb = RPC_LED_TX_RX, | |
72 | }; | |
73 | ||
1394f032 BW |
74 | static struct resource smc91x_resources[] = { |
75 | { | |
76 | .name = "smc91x-regs", | |
77 | .start = 0x20300300, | |
78 | .end = 0x20300300 + 16, | |
79 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 80 | }, { |
1394f032 BW |
81 | .start = IRQ_PF7, |
82 | .end = IRQ_PF7, | |
83 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
84 | }, | |
85 | }; | |
86 | ||
87 | static struct platform_device smc91x_device = { | |
88 | .name = "smc91x", | |
89 | .id = 0, | |
90 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
91 | .resource = smc91x_resources, | |
61f09b5a MH |
92 | .dev = { |
93 | .platform_data = &smc91x_info, | |
94 | }, | |
1394f032 BW |
95 | }; |
96 | #endif | |
97 | ||
c6c4d7bb BW |
98 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
99 | static struct platform_device bfin_fb_adv7393_device = { | |
100 | .name = "bfin-adv7393", | |
101 | }; | |
102 | #endif | |
103 | ||
1394f032 BW |
104 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
105 | static struct resource net2272_bfin_resources[] = { | |
106 | { | |
107 | .start = 0x20300000, | |
108 | .end = 0x20300000 + 0x100, | |
109 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 110 | }, { |
1394f032 BW |
111 | .start = IRQ_PF10, |
112 | .end = IRQ_PF10, | |
113 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
114 | }, | |
115 | }; | |
116 | ||
117 | static struct platform_device net2272_bfin_device = { | |
118 | .name = "net2272", | |
119 | .id = -1, | |
120 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
121 | .resource = net2272_bfin_resources, | |
122 | }; | |
123 | #endif | |
124 | ||
9cd9c616 | 125 | #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE) |
de8c43f2 MF |
126 | static struct mtd_partition stamp_partitions[] = { |
127 | { | |
aa582977 | 128 | .name = "bootloader(nor)", |
edf05641 | 129 | .size = 0x40000, |
de8c43f2 MF |
130 | .offset = 0, |
131 | }, { | |
aa582977 | 132 | .name = "linux kernel(nor)", |
6ecb5b6d | 133 | .size = 0x180000, |
de8c43f2 MF |
134 | .offset = MTDPART_OFS_APPEND, |
135 | }, { | |
aa582977 | 136 | .name = "file system(nor)", |
de8c43f2 MF |
137 | .size = MTDPART_SIZ_FULL, |
138 | .offset = MTDPART_OFS_APPEND, | |
139 | } | |
140 | }; | |
141 | ||
142 | static struct physmap_flash_data stamp_flash_data = { | |
143 | .width = 2, | |
144 | .parts = stamp_partitions, | |
145 | .nr_parts = ARRAY_SIZE(stamp_partitions), | |
146 | }; | |
147 | ||
148 | static struct resource stamp_flash_resource[] = { | |
149 | { | |
150 | .name = "cfi_probe", | |
151 | .start = 0x20000000, | |
152 | .end = 0x203fffff, | |
153 | .flags = IORESOURCE_MEM, | |
154 | }, { | |
9cd9c616 MF |
155 | .start = 0x7BB07BB0, /* AMBCTL0 setting when accessing flash */ |
156 | .end = 0x7BB07BB0, /* AMBCTL1 setting when accessing flash */ | |
157 | .flags = IORESOURCE_MEM, | |
158 | }, { | |
159 | .start = GPIO_PF0, | |
de8c43f2 MF |
160 | .flags = IORESOURCE_IRQ, |
161 | } | |
162 | }; | |
163 | ||
164 | static struct platform_device stamp_flash_device = { | |
9cd9c616 | 165 | .name = "bfin-async-flash", |
de8c43f2 MF |
166 | .id = 0, |
167 | .dev = { | |
168 | .platform_data = &stamp_flash_data, | |
169 | }, | |
170 | .num_resources = ARRAY_SIZE(stamp_flash_resource), | |
171 | .resource = stamp_flash_resource, | |
172 | }; | |
793dc27b | 173 | #endif |
de8c43f2 | 174 | |
1394f032 BW |
175 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
176 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
177 | { | |
aa582977 | 178 | .name = "bootloader(spi)", |
edf05641 | 179 | .size = 0x00040000, |
1394f032 BW |
180 | .offset = 0, |
181 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 182 | }, { |
aa582977 | 183 | .name = "linux kernel(spi)", |
6ecb5b6d | 184 | .size = 0x180000, |
edf05641 | 185 | .offset = MTDPART_OFS_APPEND, |
1f83b8f1 | 186 | }, { |
aa582977 | 187 | .name = "file system(spi)", |
edf05641 MF |
188 | .size = MTDPART_SIZ_FULL, |
189 | .offset = MTDPART_OFS_APPEND, | |
1394f032 BW |
190 | } |
191 | }; | |
192 | ||
193 | static struct flash_platform_data bfin_spi_flash_data = { | |
194 | .name = "m25p80", | |
195 | .parts = bfin_spi_flash_partitions, | |
196 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
197 | .type = "m25p64", | |
198 | }; | |
199 | ||
200 | /* SPI flash chip (m25p64) */ | |
201 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
202 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
203 | .bits_per_word = 8, | |
204 | }; | |
205 | #endif | |
206 | ||
a261eec0 | 207 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
1394f032 BW |
208 | /* SPI ADC chip */ |
209 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
210 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
211 | .bits_per_word = 16, | |
212 | }; | |
213 | #endif | |
214 | ||
215 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
216 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
217 | .enable_dma = 0, | |
218 | .bits_per_word = 16, | |
219 | }; | |
220 | #endif | |
221 | ||
6e668936 MH |
222 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
223 | static struct bfin5xx_spi_chip spidev_chip_info = { | |
224 | .enable_dma = 0, | |
225 | .bits_per_word = 8, | |
226 | }; | |
227 | #endif | |
228 | ||
2120b68f YL |
229 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
230 | #define MMC_SPI_CARD_DETECT_INT IRQ_PF5 | |
231 | static int bfin_mmc_spi_init(struct device *dev, | |
232 | irqreturn_t (*detect_int)(int, void *), void *data) | |
233 | { | |
234 | return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int, | |
235 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, | |
236 | "mmc-spi-detect", data); | |
237 | } | |
238 | ||
239 | static void bfin_mmc_spi_exit(struct device *dev, void *data) | |
240 | { | |
241 | free_irq(MMC_SPI_CARD_DETECT_INT, data); | |
242 | } | |
243 | ||
244 | static struct mmc_spi_platform_data bfin_mmc_spi_pdata = { | |
245 | .init = bfin_mmc_spi_init, | |
246 | .exit = bfin_mmc_spi_exit, | |
247 | .detect_delay = 100, /* msecs */ | |
248 | }; | |
249 | ||
250 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | |
251 | .enable_dma = 0, | |
252 | .bits_per_word = 8, | |
253 | .pio_interrupt = 0, | |
254 | }; | |
255 | #endif | |
256 | ||
1394f032 BW |
257 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
258 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
259 | { | |
260 | /* the modalias must be the same as spi device driver name */ | |
261 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
262 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 263 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
264 | .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ |
265 | .platform_data = &bfin_spi_flash_data, | |
266 | .controller_data = &spi_flash_chip_info, | |
267 | .mode = SPI_MODE_3, | |
268 | }, | |
269 | #endif | |
270 | ||
a261eec0 | 271 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
1394f032 BW |
272 | { |
273 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
274 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 275 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
276 | .chip_select = 1, /* Framework chip select. */ |
277 | .platform_data = NULL, /* No spi_driver specific config */ | |
278 | .controller_data = &spi_adc_chip_info, | |
279 | }, | |
280 | #endif | |
281 | ||
282 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
283 | { | |
dac98174 | 284 | .modalias = "ad1836", |
858c5e9a | 285 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 286 | .bus_num = 0, |
1394f032 BW |
287 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
288 | .controller_data = &ad1836_spi_chip_info, | |
289 | }, | |
290 | #endif | |
291 | ||
6e668936 MH |
292 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
293 | { | |
294 | .modalias = "spidev", | |
295 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
296 | .bus_num = 0, | |
297 | .chip_select = 1, | |
298 | .controller_data = &spidev_chip_info, | |
299 | }, | |
300 | #endif | |
2120b68f YL |
301 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
302 | { | |
303 | .modalias = "mmc_spi", | |
304 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | |
305 | .bus_num = 0, | |
306 | .chip_select = 4, | |
307 | .platform_data = &bfin_mmc_spi_pdata, | |
308 | .controller_data = &mmc_spi_chip_info, | |
309 | .mode = SPI_MODE_3, | |
310 | }, | |
311 | #endif | |
1394f032 BW |
312 | }; |
313 | ||
5bda2723 | 314 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
c6c4d7bb BW |
315 | /* SPI (0) */ |
316 | static struct resource bfin_spi0_resource[] = { | |
317 | [0] = { | |
318 | .start = SPI0_REGBASE, | |
319 | .end = SPI0_REGBASE + 0xFF, | |
320 | .flags = IORESOURCE_MEM, | |
321 | }, | |
322 | [1] = { | |
323 | .start = CH_SPI, | |
324 | .end = CH_SPI, | |
53122693 YL |
325 | .flags = IORESOURCE_DMA, |
326 | }, | |
327 | [2] = { | |
328 | .start = IRQ_SPI, | |
329 | .end = IRQ_SPI, | |
c6c4d7bb BW |
330 | .flags = IORESOURCE_IRQ, |
331 | } | |
332 | }; | |
333 | ||
1394f032 | 334 | /* SPI controller data */ |
c6c4d7bb | 335 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
336 | .num_chipselect = 8, |
337 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 338 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
339 | }; |
340 | ||
c6c4d7bb BW |
341 | static struct platform_device bfin_spi0_device = { |
342 | .name = "bfin-spi", | |
343 | .id = 0, /* Bus number */ | |
344 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
345 | .resource = bfin_spi0_resource, | |
1394f032 | 346 | .dev = { |
c6c4d7bb | 347 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
348 | }, |
349 | }; | |
350 | #endif /* spi master and devices */ | |
351 | ||
352 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
353 | static struct platform_device bfin_fb_device = { | |
354 | .name = "bf537-fb", | |
355 | }; | |
356 | #endif | |
357 | ||
358 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
359 | static struct resource bfin_uart_resources[] = { | |
360 | { | |
361 | .start = 0xFFC00400, | |
362 | .end = 0xFFC004FF, | |
363 | .flags = IORESOURCE_MEM, | |
364 | }, | |
365 | }; | |
366 | ||
367 | static struct platform_device bfin_uart_device = { | |
368 | .name = "bfin-uart", | |
369 | .id = 1, | |
370 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
371 | .resource = bfin_uart_resources, | |
372 | }; | |
373 | #endif | |
374 | ||
5be36d22 | 375 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
5be36d22 | 376 | #ifdef CONFIG_BFIN_SIR0 |
42bd8bcb | 377 | static struct resource bfin_sir0_resources[] = { |
5be36d22 GY |
378 | { |
379 | .start = 0xFFC00400, | |
380 | .end = 0xFFC004FF, | |
381 | .flags = IORESOURCE_MEM, | |
382 | }, | |
42bd8bcb GY |
383 | { |
384 | .start = IRQ_UART0_RX, | |
385 | .end = IRQ_UART0_RX+1, | |
386 | .flags = IORESOURCE_IRQ, | |
387 | }, | |
388 | { | |
389 | .start = CH_UART0_RX, | |
390 | .end = CH_UART0_RX+1, | |
391 | .flags = IORESOURCE_DMA, | |
392 | }, | |
5be36d22 GY |
393 | }; |
394 | ||
42bd8bcb | 395 | static struct platform_device bfin_sir0_device = { |
5be36d22 GY |
396 | .name = "bfin_sir", |
397 | .id = 0, | |
42bd8bcb GY |
398 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), |
399 | .resource = bfin_sir0_resources, | |
5be36d22 GY |
400 | }; |
401 | #endif | |
42bd8bcb | 402 | #endif |
5be36d22 | 403 | |
1394f032 BW |
404 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
405 | static struct platform_device bfin_sport0_uart_device = { | |
406 | .name = "bfin-sport-uart", | |
407 | .id = 0, | |
408 | }; | |
409 | ||
410 | static struct platform_device bfin_sport1_uart_device = { | |
411 | .name = "bfin-sport-uart", | |
412 | .id = 1, | |
413 | }; | |
414 | #endif | |
415 | ||
2463ef22 MH |
416 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
417 | #include <linux/input.h> | |
418 | #include <linux/gpio_keys.h> | |
419 | ||
420 | static struct gpio_keys_button bfin_gpio_keys_table[] = { | |
f1bceb47 MH |
421 | {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"}, |
422 | {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"}, | |
423 | {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"}, | |
2463ef22 MH |
424 | }; |
425 | ||
426 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { | |
427 | .buttons = bfin_gpio_keys_table, | |
428 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), | |
429 | }; | |
430 | ||
431 | static struct platform_device bfin_device_gpiokeys = { | |
432 | .name = "gpio-keys", | |
433 | .dev = { | |
434 | .platform_data = &bfin_gpio_keys_data, | |
435 | }, | |
436 | }; | |
437 | #endif | |
438 | ||
cad2ab65 MF |
439 | static struct resource bfin_gpios_resources = { |
440 | .start = 0, | |
441 | .end = MAX_BLACKFIN_GPIOS - 1, | |
442 | .flags = IORESOURCE_IRQ, | |
443 | }; | |
444 | ||
445 | static struct platform_device bfin_gpios_device = { | |
446 | .name = "simple-gpio", | |
447 | .id = -1, | |
448 | .num_resources = 1, | |
449 | .resource = &bfin_gpios_resources, | |
450 | }; | |
451 | ||
e3163954 BW |
452 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) |
453 | #include <linux/i2c-gpio.h> | |
454 | ||
455 | static struct i2c_gpio_platform_data i2c_gpio_data = { | |
456 | .sda_pin = 2, | |
457 | .scl_pin = 3, | |
458 | .sda_is_open_drain = 0, | |
459 | .scl_is_open_drain = 0, | |
460 | .udelay = 40, | |
461 | }; | |
462 | ||
463 | static struct platform_device i2c_gpio_device = { | |
464 | .name = "i2c-gpio", | |
465 | .id = 0, | |
466 | .dev = { | |
467 | .platform_data = &i2c_gpio_data, | |
468 | }, | |
469 | }; | |
470 | #endif | |
471 | ||
81d9c7f2 BW |
472 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
473 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) | |
474 | { | |
475 | I2C_BOARD_INFO("ad7142_joystick", 0x2C), | |
81d9c7f2 BW |
476 | .irq = 39, |
477 | }, | |
478 | #endif | |
ebd58333 | 479 | #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE) |
81d9c7f2 BW |
480 | { |
481 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | |
81d9c7f2 BW |
482 | }, |
483 | #endif | |
204844eb | 484 | #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE) |
81d9c7f2 BW |
485 | { |
486 | I2C_BOARD_INFO("pcf8574_keypad", 0x27), | |
81d9c7f2 BW |
487 | .irq = 39, |
488 | }, | |
489 | #endif | |
490 | }; | |
81d9c7f2 | 491 | |
14b03204 MH |
492 | static const unsigned int cclk_vlev_datasheet[] = |
493 | { | |
494 | VRPAIR(VLEV_085, 250000000), | |
495 | VRPAIR(VLEV_090, 376000000), | |
496 | VRPAIR(VLEV_095, 426000000), | |
497 | VRPAIR(VLEV_100, 426000000), | |
498 | VRPAIR(VLEV_105, 476000000), | |
499 | VRPAIR(VLEV_110, 476000000), | |
500 | VRPAIR(VLEV_115, 476000000), | |
501 | VRPAIR(VLEV_120, 600000000), | |
502 | VRPAIR(VLEV_125, 600000000), | |
503 | VRPAIR(VLEV_130, 600000000), | |
504 | }; | |
505 | ||
506 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { | |
507 | .tuple_tab = cclk_vlev_datasheet, | |
508 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), | |
509 | .vr_settling_time = 25 /* us */, | |
510 | }; | |
511 | ||
512 | static struct platform_device bfin_dpmc = { | |
513 | .name = "bfin dpmc", | |
514 | .dev = { | |
515 | .platform_data = &bfin_dmpc_vreg_data, | |
516 | }, | |
517 | }; | |
518 | ||
1394f032 | 519 | static struct platform_device *stamp_devices[] __initdata = { |
14b03204 MH |
520 | |
521 | &bfin_dpmc, | |
522 | ||
1394f032 BW |
523 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
524 | &rtc_device, | |
525 | #endif | |
526 | ||
527 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
528 | &smc91x_device, | |
529 | #endif | |
530 | ||
c6c4d7bb BW |
531 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
532 | &bfin_fb_adv7393_device, | |
533 | #endif | |
534 | ||
1394f032 BW |
535 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
536 | &net2272_bfin_device, | |
537 | #endif | |
538 | ||
539 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 540 | &bfin_spi0_device, |
1394f032 BW |
541 | #endif |
542 | ||
543 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
544 | &bfin_uart_device, | |
545 | #endif | |
546 | ||
5be36d22 | 547 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
42bd8bcb GY |
548 | #ifdef CONFIG_BFIN_SIR0 |
549 | &bfin_sir0_device, | |
550 | #endif | |
5be36d22 GY |
551 | #endif |
552 | ||
1394f032 BW |
553 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
554 | &bfin_sport0_uart_device, | |
555 | &bfin_sport1_uart_device, | |
556 | #endif | |
c6c4d7bb | 557 | |
2463ef22 MH |
558 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
559 | &bfin_device_gpiokeys, | |
560 | #endif | |
e3163954 BW |
561 | |
562 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) | |
563 | &i2c_gpio_device, | |
564 | #endif | |
cad2ab65 MF |
565 | |
566 | &bfin_gpios_device, | |
793dc27b | 567 | |
9cd9c616 | 568 | #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE) |
de8c43f2 | 569 | &stamp_flash_device, |
793dc27b | 570 | #endif |
1394f032 BW |
571 | }; |
572 | ||
573 | static int __init stamp_init(void) | |
574 | { | |
c0fc525d MF |
575 | int ret; |
576 | ||
b85d858b | 577 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
81d9c7f2 | 578 | |
81d9c7f2 BW |
579 | i2c_register_board_info(0, bfin_i2c_board_info, |
580 | ARRAY_SIZE(bfin_i2c_board_info)); | |
81d9c7f2 | 581 | |
c0fc525d MF |
582 | ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
583 | if (ret < 0) | |
584 | return ret; | |
585 | ||
586 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
c0fc525d | 587 | /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */ |
9cd9c616 MF |
588 | bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF0); |
589 | bfin_write_FIO_FLAG_S(PF0); | |
c0fc525d | 590 | SSYNC(); |
c0fc525d MF |
591 | #endif |
592 | ||
5bda2723 | 593 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
c6c4d7bb | 594 | return 0; |
1394f032 BW |
595 | } |
596 | ||
597 | arch_initcall(stamp_init); | |
c6c4d7bb BW |
598 | |
599 | void native_machine_restart(char *cmd) | |
600 | { | |
9cd9c616 MF |
601 | /* workaround pull up on cpld / flash pin not being strong enough */ |
602 | bfin_write_FIO_INEN(~PF0); | |
603 | bfin_write_FIO_DIR(PF0); | |
604 | bfin_write_FIO_FLAG_C(PF0); | |
c6c4d7bb | 605 | } |