Commit | Line | Data |
---|---|---|
1394f032 BW |
1 | /* |
2 | * File: include/asm-blackfin/mach-bf533/blackfin.h | |
3 | * Based on: | |
4 | * Author: | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Rev: | |
10 | * | |
11 | * Modified: | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2, or (at your option) | |
18 | * any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; see the file COPYING. | |
27 | * If not, write to the Free Software Foundation, | |
28 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
29 | */ | |
30 | ||
31 | #ifndef _MACH_BLACKFIN_H_ | |
32 | #define _MACH_BLACKFIN_H_ | |
33 | ||
34 | #define BF533_FAMILY | |
35 | ||
36 | #include "bf533.h" | |
1394f032 BW |
37 | #include "defBF532.h" |
38 | #include "anomaly.h" | |
39 | ||
1708268f | 40 | #if !defined(__ASSEMBLY__) |
1394f032 BW |
41 | #include "cdefBF532.h" |
42 | #endif | |
43 | ||
5be36d22 GY |
44 | #define BFIN_UART_NR_PORTS 1 |
45 | ||
46 | #define OFFSET_THR 0x00 /* Transmit Holding register */ | |
47 | #define OFFSET_RBR 0x00 /* Receive Buffer register */ | |
48 | #define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */ | |
49 | #define OFFSET_IER 0x04 /* Interrupt Enable Register */ | |
50 | #define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */ | |
51 | #define OFFSET_IIR 0x08 /* Interrupt Identification Register */ | |
52 | #define OFFSET_LCR 0x0C /* Line Control Register */ | |
53 | #define OFFSET_MCR 0x10 /* Modem Control Register */ | |
54 | #define OFFSET_LSR 0x14 /* Line Status Register */ | |
55 | #define OFFSET_MSR 0x18 /* Modem Status Register */ | |
56 | #define OFFSET_SCR 0x1C /* SCR Scratch Register */ | |
57 | #define OFFSET_GCTL 0x24 /* Global Control Register */ | |
58 | ||
1394f032 | 59 | #endif /* _MACH_BLACKFIN_H_ */ |