[deliverable/linux.git] / arch / blackfin / mach-bf537 / boards / cm_bf537.c

/*
 * File:         arch/blackfin/mach-bf537/boards/cm_bf537.c
 * Based on:     arch/blackfin/mach-bf533/boards/ezkit.c
 * Author:       Aidan Williams <aidan@nicta.com.au>
 *
 * Created:      2005
 * Description:  Board description file
 *
 * Modified:
 *               Copyright 2005 National ICT Australia (NICTA)
 *               Copyright 2004-2006 Analog Devices Inc.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/device.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
#include <asm/dpmc.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "Bluetechnix CM BF537";

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader(spi)",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "linux kernel(spi)",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system(spi)",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 8,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836-spi",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif

#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
	{
		.modalias = "ad9960-spi",
		.max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 1,
		.controller_data = &ad9960_spi_chip_info,
	},
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
	{
		.modalias = "mmc_spi",
		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 1,
		.controller_data = &mmc_spi_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
		},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	},
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
static struct platform_device hitachi_fb_device = {
	.name = "hitachi-tx09",
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct resource smc91x_resources[] = {
	{
		.start = 0x20200300,
		.end = 0x20200300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF14,
		.end = IRQ_PF14,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
		},
};

static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
};
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
static struct resource isp1362_hcd_resources[] = {
	{
		.start = 0x20308000,
		.end = 0x20308000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x20308004,
		.end = 0x20308004,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PG15,
		.end = IRQ_PG15,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct isp1362_platform_data isp1362_priv = {
	.sel15Kres = 1,
	.clknotstop = 0,
	.oc_enable = 0,
	.int_act_high = 0,
	.int_edge_triggered = 0,
	.remote_wakeup_connected = 0,
	.no_power_switching = 1,
	.power_switching_mode = 0,
};

static struct platform_device isp1362_hcd_device = {
	.name = "isp1362-hcd",
	.id = 0,
	.dev = {
		.platform_data = &isp1362_priv,
	},
	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	.resource = isp1362_hcd_resources,
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20200000,
		.end = 0x20200000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PH14,
		.end = IRQ_PH14,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

static struct resource bfin_gpios_resources = {
	.start = 0,
	.end   = MAX_BLACKFIN_GPIOS - 1,
	.flags = IORESOURCE_IRQ,
};

static struct platform_device bfin_gpios_device = {
	.name = "simple-gpio",
	.id = -1,
	.num_resources = 1,
	.resource = &bfin_gpios_resources,
};

#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
static struct mtd_partition cm_partitions[] = {
	{
		.name   = "bootloader(nor)",
		.size   = 0x40000,
		.offset = 0,
	}, {
		.name   = "linux kernel(nor)",
		.size   = 0xE0000,
		.offset = MTDPART_OFS_APPEND,
	}, {
		.name   = "file system(nor)",
		.size   = MTDPART_SIZ_FULL,
		.offset = MTDPART_OFS_APPEND,
	}
};

static struct physmap_flash_data cm_flash_data = {
	.width    = 2,
	.parts    = cm_partitions,
	.nr_parts = ARRAY_SIZE(cm_partitions),
};

static unsigned cm_flash_gpios[] = { GPIO_PF4 };

static struct resource cm_flash_resource[] = {
	{
		.name  = "cfi_probe",
		.start = 0x20000000,
		.end   = 0x201fffff,
		.flags = IORESOURCE_MEM,
	}, {
		.start = (unsigned long)cm_flash_gpios,
		.end   = ARRAY_SIZE(cm_flash_gpios),
		.flags = IORESOURCE_IRQ,
	}
};

static struct platform_device cm_flash_device = {
	.name          = "gpio-addr-flash",
	.id            = 0,
	.dev = {
		.platform_data = &cm_flash_data,
	},
	.num_resources = ARRAY_SIZE(cm_flash_resource),
	.resource      = cm_flash_resource,
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
};

static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
};
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};
static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#ifdef CONFIG_BFIN_SIR1
static struct resource bfin_sir1_resources[] = {
	{
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX+1,
		.flags = IORESOURCE_DMA,
	},
};
static struct platform_device bfin_sir1_device = {
	.name = "bfin_sir",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	.resource = bfin_sir1_resources,
};
#endif
#endif

#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
static struct resource bfin_twi0_resource[] = {
	[0] = {
		.start = TWI0_REGBASE,
		.end   = TWI0_REGBASE,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = IRQ_TWI,
		.end   = IRQ_TWI,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device i2c_bfin_twi_device = {
	.name = "i2c-bfin-twi",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
	.resource = bfin_twi0_resource,
};
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
	.name = "bfin-sport-uart",
	.id = 0,
};

static struct platform_device bfin_sport1_uart_device = {
	.name = "bfin-sport-uart",
	.id = 1,
};
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
	.name = "bfin_mii_bus",
};

static struct platform_device bfin_mac_device = {
	.name = "bfin_mac",
	.dev.platform_data = &bfin_mii_bus,
};
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
#define PATA_INT	IRQ_PF14

static struct pata_platform_info bfin_pata_platform_data = {
	.ioport_shift = 2,
	.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
};

static struct resource bfin_pata_resources[] = {
	{
		.start = 0x2030C000,
		.end = 0x2030C01F,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = 0x2030D018,
		.end = 0x2030D01B,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = PATA_INT,
		.end = PATA_INT,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pata_device = {
	.name = "pata_platform",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	.resource = bfin_pata_resources,
	.dev = {
		.platform_data = &bfin_pata_platform_data,
	}
};
#endif

static const unsigned int cclk_vlev_datasheet[] =
{
	VRPAIR(VLEV_085, 250000000),
	VRPAIR(VLEV_090, 376000000),
	VRPAIR(VLEV_095, 426000000),
	VRPAIR(VLEV_100, 426000000),
	VRPAIR(VLEV_105, 476000000),
	VRPAIR(VLEV_110, 476000000),
	VRPAIR(VLEV_115, 476000000),
	VRPAIR(VLEV_120, 500000000),
	VRPAIR(VLEV_125, 533000000),
	VRPAIR(VLEV_130, 600000000),
};

static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	.tuple_tab = cclk_vlev_datasheet,
	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	.vr_settling_time = 25 /* us */,
};

static struct platform_device bfin_dpmc = {
	.name = "bfin dpmc",
	.dev = {
		.platform_data = &bfin_dmpc_vreg_data,
	},
};

static struct platform_device *cm_bf537_devices[] __initdata = {

	&bfin_dpmc,

#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
	&hitachi_fb_device,
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#ifdef CONFIG_BFIN_SIR1
	&bfin_sir1_device,
#endif
#endif

#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	&i2c_bfin_twi_device,
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	&bfin_sport0_uart_device,
	&bfin_sport1_uart_device,
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
	&isp1362_hcd_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
	&bfin_mii_bus,
	&bfin_mac_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	&bfin_pata_device,
#endif

#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
	&cm_flash_device,
#endif

	&bfin_gpios_device,
};

static int __init cm_bf537_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
#endif
	return 0;
}

arch_initcall(cm_bf537_init);

void bfin_get_ether_addr(char *addr)
{
	random_ether_addr(addr);
	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
}
EXPORT_SYMBOL(bfin_get_ether_addr);
Commit	Line	Data
1394f032 BW	1	/*
	2	* File: arch/blackfin/mach-bf537/boards/cm_bf537.c
	3	* Based on: arch/blackfin/mach-bf533/boards/ezkit.c
	4	* Author: Aidan Williams <aidan@nicta.com.au>
	5	*
	6	* Created: 2005
	7	* Description: Board description file
	8	*
	9	* Modified:
	10	* Copyright 2005 National ICT Australia (NICTA)
	11	* Copyright 2004-2006 Analog Devices Inc.
	12	*
	13	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	14	*
	15	* This program is free software; you can redistribute it and/or modify
	16	* it under the terms of the GNU General Public License as published by
	17	* the Free Software Foundation; either version 2 of the License, or
	18	* (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, see the file COPYING, or write
	27	* to the Free Software Foundation, Inc.,
	28	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	29	*/
	30
	31	#include <linux/device.h>
43f73fef	32	#include <linux/etherdevice.h>
1394f032 BW	33	#include <linux/platform_device.h>
	34	#include <linux/mtd/mtd.h>
	35	#include <linux/mtd/partitions.h>
8ea89497	36	#include <linux/mtd/physmap.h>
1394f032 BW	37	#include <linux/spi/spi.h>
1394f032 BW	38	#include <linux/spi/flash.h>
b964c592	39	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	40	#include <linux/usb/isp1362.h>
b964c592	41	#endif
0a87e3e9	42	#include <linux/ata_platform.h>
1f83b8f1	43	#include <linux/irq.h>
c6c4d7bb	44	#include <asm/dma.h>
1394f032	45	#include <asm/bfin5xx_spi.h>
5d448dd5	46	#include <asm/portmux.h>
14b03204	47	#include <asm/dpmc.h>
1394f032 BW	48
	49	/*
	50	* Name the Board for the /proc/cpuinfo
	51	*/
066954a3	52	const char bfin_board_name[] = "Bluetechnix CM BF537";
1394f032 BW	53
	54	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	55	/* all SPI peripherals info goes here */
	56
	57	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	58	static struct mtd_partition bfin_spi_flash_partitions[] = {
	59	{
aa582977	60	.name = "bootloader(spi)",
1394f032 BW	61	.size = 0x00020000,
	62	.offset = 0,
	63	.mask_flags = MTD_CAP_ROM
1f83b8f1	64	}, {
aa582977	65	.name = "linux kernel(spi)",
1394f032 BW	66	.size = 0xe0000,
1394f032 BW	67	.offset = 0x20000
1f83b8f1	68	}, {
aa582977	69	.name = "file system(spi)",
1394f032 BW	70	.size = 0x700000,
	71	.offset = 0x00100000,
	72	}
	73	};
	74
	75	static struct flash_platform_data bfin_spi_flash_data = {
	76	.name = "m25p80",
	77	.parts = bfin_spi_flash_partitions,
	78	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	79	.type = "m25p64",
	80	};
	81
	82	/* SPI flash chip (m25p64) */
	83	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	84	.enable_dma = 0, /* use dma transfer with this chip*/
	85	.bits_per_word = 8,
	86	};
	87	#endif
	88
a261eec0	89	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	90	/* SPI ADC chip */
	91	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	92	.enable_dma = 1, /* use dma transfer with this chip*/
	93	.bits_per_word = 16,
	94	};
	95	#endif
	96
	97	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	98	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	99	.enable_dma = 0,
	100	.bits_per_word = 16,
	101	};
	102	#endif
	103
	104	#if defined(CONFIG_AD9960) \|\| defined(CONFIG_AD9960_MODULE)
	105	static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
	106	.enable_dma = 0,
	107	.bits_per_word = 16,
	108	};
	109	#endif
	110
f3f704d3 MH	111	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	112	static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	113	.enable_dma = 0,
1394f032 BW	114	.bits_per_word = 8,
	115	};
	116	#endif
	117
	118	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	119	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	120	{
	121	/* the modalias must be the same as spi device driver name */
	122	.modalias = "m25p80", /* Name of spi_driver for this device */
	123	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	124	.bus_num = 0, /* Framework bus number */
1394f032 BW	125	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	126	.platform_data = &bfin_spi_flash_data,
	127	.controller_data = &spi_flash_chip_info,
	128	.mode = SPI_MODE_3,
	129	},
	130	#endif
	131
a261eec0	132	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	133	{
	134	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	135	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	136	.bus_num = 0, /* Framework bus number */
1394f032 BW	137	.chip_select = 1, /* Framework chip select. */
	138	.platform_data = NULL, /* No spi_driver specific config */
	139	.controller_data = &spi_adc_chip_info,
	140	},
	141	#endif
	142
	143	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	144	{
	145	.modalias = "ad1836-spi",
	146	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	147	.bus_num = 0,
1394f032 BW	148	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	149	.controller_data = &ad1836_spi_chip_info,
	150	},
	151	#endif
	152
	153	#if defined(CONFIG_AD9960) \|\| defined(CONFIG_AD9960_MODULE)
	154	{
	155	.modalias = "ad9960-spi",
	156	.max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	157	.bus_num = 0,
1394f032 BW	158	.chip_select = 1,
	159	.controller_data = &ad9960_spi_chip_info,
	160	},
	161	#endif
	162
f3f704d3	163	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
1394f032	164	{
f3f704d3 MH	165	.modalias = "mmc_spi",
f3f704d3 MH	166	.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	167	.bus_num = 0,
f3f704d3 MH	168	.chip_select = 1,
f3f704d3 MH	169	.controller_data = &mmc_spi_chip_info,
1394f032 BW	170	.mode = SPI_MODE_3,
	171	},
	172	#endif
	173	};
	174
c6c4d7bb BW	175	/* SPI (0) */
	176	static struct resource bfin_spi0_resource[] = {
	177	[0] = {
	178	.start = SPI0_REGBASE,
	179	.end = SPI0_REGBASE + 0xFF,
	180	.flags = IORESOURCE_MEM,
	181	},
	182	[1] = {
	183	.start = CH_SPI,
	184	.end = CH_SPI,
53122693 YL	185	.flags = IORESOURCE_DMA,
	186	},
	187	[2] = {
	188	.start = IRQ_SPI,
	189	.end = IRQ_SPI,
c6c4d7bb	190	.flags = IORESOURCE_IRQ,
53122693	191	},
c6c4d7bb BW	192	};
c6c4d7bb BW	193
1394f032	194	/* SPI controller data */
c6c4d7bb	195	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	196	.num_chipselect = 8,
1394f032 BW	197	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	198	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	199	};
1394f032 BW	200
c6c4d7bb BW	201	static struct platform_device bfin_spi0_device = {
	202	.name = "bfin-spi",
	203	.id = 0, /* Bus number */
	204	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	205	.resource = bfin_spi0_resource,
1394f032	206	.dev = {
c6c4d7bb	207	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	208	},
	209	};
	210	#endif /* spi master and devices */
	211
	212	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	213	static struct platform_device rtc_device = {
	214	.name = "rtc-bfin",
	215	.id = -1,
	216	};
	217	#endif
	218
0d4a89bb MH	219	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	220	static struct platform_device hitachi_fb_device = {
	221	.name = "hitachi-tx09",
	222	};
	223	#endif
	224
1394f032 BW	225	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	226	static struct resource smc91x_resources[] = {
	227	{
	228	.start = 0x20200300,
	229	.end = 0x20200300 + 16,
	230	.flags = IORESOURCE_MEM,
1f83b8f1	231	}, {
1394f032 BW	232	.start = IRQ_PF14,
	233	.end = IRQ_PF14,
	234	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	235	},
	236	};
	237
	238	static struct platform_device smc91x_device = {
	239	.name = "smc91x",
	240	.id = 0,
	241	.num_resources = ARRAY_SIZE(smc91x_resources),
	242	.resource = smc91x_resources,
	243	};
	244	#endif
	245
	246	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	247	static struct resource isp1362_hcd_resources[] = {
	248	{
	249	.start = 0x20308000,
	250	.end = 0x20308000,
	251	.flags = IORESOURCE_MEM,
1f83b8f1	252	}, {
1394f032 BW	253	.start = 0x20308004,
	254	.end = 0x20308004,
	255	.flags = IORESOURCE_MEM,
1f83b8f1	256	}, {
1394f032 BW	257	.start = IRQ_PG15,
	258	.end = IRQ_PG15,
	259	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	260	},
	261	};
	262
	263	static struct isp1362_platform_data isp1362_priv = {
	264	.sel15Kres = 1,
	265	.clknotstop = 0,
	266	.oc_enable = 0,
	267	.int_act_high = 0,
	268	.int_edge_triggered = 0,
	269	.remote_wakeup_connected = 0,
	270	.no_power_switching = 1,
	271	.power_switching_mode = 0,
	272	};
	273
	274	static struct platform_device isp1362_hcd_device = {
	275	.name = "isp1362-hcd",
	276	.id = 0,
	277	.dev = {
	278	.platform_data = &isp1362_priv,
	279	},
	280	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	281	.resource = isp1362_hcd_resources,
	282	};
	283	#endif
	284
	285	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	286	static struct resource net2272_bfin_resources[] = {
	287	{
	288	.start = 0x20200000,
	289	.end = 0x20200000 + 0x100,
	290	.flags = IORESOURCE_MEM,
1f83b8f1	291	}, {
8ecc7368 MH	292	.start = IRQ_PH14,
8ecc7368 MH	293	.end = IRQ_PH14,
1394f032 BW	294	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	295	},
	296	};
	297
	298	static struct platform_device net2272_bfin_device = {
	299	.name = "net2272",
	300	.id = -1,
	301	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	302	.resource = net2272_bfin_resources,
	303	};
	304	#endif
	305
c97618d3 MF	306	static struct resource bfin_gpios_resources = {
	307	.start = 0,
	308	.end = MAX_BLACKFIN_GPIOS - 1,
	309	.flags = IORESOURCE_IRQ,
	310	};
	311
	312	static struct platform_device bfin_gpios_device = {
	313	.name = "simple-gpio",
	314	.id = -1,
	315	.num_resources = 1,
	316	.resource = &bfin_gpios_resources,
	317	};
	318
8ea89497 MF	319	#if defined(CONFIG_MTD_GPIO_ADDR) \|\| defined(CONFIG_MTD_GPIO_ADDR_MODULE)
	320	static struct mtd_partition cm_partitions[] = {
	321	{
	322	.name = "bootloader(nor)",
	323	.size = 0x40000,
	324	.offset = 0,
	325	}, {
	326	.name = "linux kernel(nor)",
	327	.size = 0xE0000,
	328	.offset = MTDPART_OFS_APPEND,
	329	}, {
	330	.name = "file system(nor)",
	331	.size = MTDPART_SIZ_FULL,
	332	.offset = MTDPART_OFS_APPEND,
	333	}
	334	};
	335
	336	static struct physmap_flash_data cm_flash_data = {
	337	.width = 2,
	338	.parts = cm_partitions,
	339	.nr_parts = ARRAY_SIZE(cm_partitions),
	340	};
	341
	342	static unsigned cm_flash_gpios[] = { GPIO_PF4 };
	343
	344	static struct resource cm_flash_resource[] = {
	345	{
	346	.name = "cfi_probe",
	347	.start = 0x20000000,
	348	.end = 0x201fffff,
	349	.flags = IORESOURCE_MEM,
	350	}, {
	351	.start = (unsigned long)cm_flash_gpios,
	352	.end = ARRAY_SIZE(cm_flash_gpios),
	353	.flags = IORESOURCE_IRQ,
	354	}
	355	};
	356
	357	static struct platform_device cm_flash_device = {
	358	.name = "gpio-addr-flash",
	359	.id = 0,
	360	.dev = {
	361	.platform_data = &cm_flash_data,
	362	},
	363	.num_resources = ARRAY_SIZE(cm_flash_resource),
	364	.resource = cm_flash_resource,
	365	};
	366	#endif
	367
1394f032 BW	368	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	369	static struct resource bfin_uart_resources[] = {
	370	{
	371	.start = 0xFFC00400,
	372	.end = 0xFFC004FF,
	373	.flags = IORESOURCE_MEM,
1f83b8f1	374	}, {
1394f032 BW	375	.start = 0xFFC02000,
	376	.end = 0xFFC020FF,
	377	.flags = IORESOURCE_MEM,
	378	},
	379	};
	380
	381	static struct platform_device bfin_uart_device = {
	382	.name = "bfin-uart",
	383	.id = 1,
	384	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	385	.resource = bfin_uart_resources,
	386	};
	387	#endif
	388
5be36d22	389	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	390	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	391	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	392	{
	393	.start = 0xFFC00400,
	394	.end = 0xFFC004FF,
	395	.flags = IORESOURCE_MEM,
	396	},
42bd8bcb GY	397	{
	398	.start = IRQ_UART0_RX,
	399	.end = IRQ_UART0_RX+1,
	400	.flags = IORESOURCE_IRQ,
	401	},
	402	{
	403	.start = CH_UART0_RX,
	404	.end = CH_UART0_RX+1,
	405	.flags = IORESOURCE_DMA,
	406	},
	407	};
	408	static struct platform_device bfin_sir0_device = {
	409	.name = "bfin_sir",
	410	.id = 0,
	411	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	412	.resource = bfin_sir0_resources,
	413	};
5be36d22 GY	414	#endif
5be36d22 GY	415	#ifdef CONFIG_BFIN_SIR1
42bd8bcb	416	static struct resource bfin_sir1_resources[] = {
5be36d22 GY	417	{
	418	.start = 0xFFC02000,
	419	.end = 0xFFC020FF,
	420	.flags = IORESOURCE_MEM,
	421	},
42bd8bcb GY	422	{
	423	.start = IRQ_UART1_RX,
	424	.end = IRQ_UART1_RX+1,
	425	.flags = IORESOURCE_IRQ,
	426	},
	427	{
	428	.start = CH_UART1_RX,
	429	.end = CH_UART1_RX+1,
	430	.flags = IORESOURCE_DMA,
	431	},
5be36d22	432	};
42bd8bcb	433	static struct platform_device bfin_sir1_device = {
5be36d22	434	.name = "bfin_sir",
42bd8bcb GY	435	.id = 1,
	436	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	437	.resource = bfin_sir1_resources,
5be36d22 GY	438	};
5be36d22 GY	439	#endif
42bd8bcb	440	#endif
5be36d22	441
56ce835b MF	442	#if defined(CONFIG_I2C_BLACKFIN_TWI) \|\| defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	443	static struct resource bfin_twi0_resource[] = {
	444	[0] = {
	445	.start = TWI0_REGBASE,
	446	.end = TWI0_REGBASE,
	447	.flags = IORESOURCE_MEM,
	448	},
	449	[1] = {
	450	.start = IRQ_TWI,
	451	.end = IRQ_TWI,
	452	.flags = IORESOURCE_IRQ,
	453	},
	454	};
	455
	456	static struct platform_device i2c_bfin_twi_device = {
	457	.name = "i2c-bfin-twi",
	458	.id = 0,
	459	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
	460	.resource = bfin_twi0_resource,
	461	};
	462	#endif
	463
1394f032 BW	464	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	465	static struct platform_device bfin_sport0_uart_device = {
	466	.name = "bfin-sport-uart",
	467	.id = 0,
	468	};
	469
	470	static struct platform_device bfin_sport1_uart_device = {
	471	.name = "bfin-sport-uart",
	472	.id = 1,
	473	};
	474	#endif
	475
	476	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628 GY	477	static struct platform_device bfin_mii_bus = {
	478	.name = "bfin_mii_bus",
	479	};
	480
1394f032 BW	481	static struct platform_device bfin_mac_device = {
1394f032 BW	482	.name = "bfin_mac",
65319628	483	.dev.platform_data = &bfin_mii_bus,
1394f032 BW	484	};
	485	#endif
	486
c6c4d7bb	487	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
fe5aeb93	488	#define PATA_INT IRQ_PF14
c6c4d7bb BW	489
	490	static struct pata_platform_info bfin_pata_platform_data = {
	491	.ioport_shift = 2,
	492	.irq_type = IRQF_TRIGGER_HIGH \| IRQF_DISABLED,
	493	};
	494
	495	static struct resource bfin_pata_resources[] = {
	496	{
	497	.start = 0x2030C000,
	498	.end = 0x2030C01F,
	499	.flags = IORESOURCE_MEM,
	500	},
	501	{
	502	.start = 0x2030D018,
	503	.end = 0x2030D01B,
	504	.flags = IORESOURCE_MEM,
	505	},
	506	{
	507	.start = PATA_INT,
	508	.end = PATA_INT,
	509	.flags = IORESOURCE_IRQ,
	510	},
	511	};
	512
	513	static struct platform_device bfin_pata_device = {
	514	.name = "pata_platform",
	515	.id = -1,
	516	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	517	.resource = bfin_pata_resources,
	518	.dev = {
	519	.platform_data = &bfin_pata_platform_data,
	520	}
	521	};
	522	#endif
	523
14b03204 MH	524	static const unsigned int cclk_vlev_datasheet[] =
	525	{
	526	VRPAIR(VLEV_085, 250000000),
	527	VRPAIR(VLEV_090, 376000000),
	528	VRPAIR(VLEV_095, 426000000),
	529	VRPAIR(VLEV_100, 426000000),
	530	VRPAIR(VLEV_105, 476000000),
	531	VRPAIR(VLEV_110, 476000000),
	532	VRPAIR(VLEV_115, 476000000),
	533	VRPAIR(VLEV_120, 500000000),
	534	VRPAIR(VLEV_125, 533000000),
	535	VRPAIR(VLEV_130, 600000000),
	536	};
	537
	538	static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	539	.tuple_tab = cclk_vlev_datasheet,
	540	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	541	.vr_settling_time = 25 /* us */,
	542	};
	543
	544	static struct platform_device bfin_dpmc = {
	545	.name = "bfin dpmc",
	546	.dev = {
	547	.platform_data = &bfin_dmpc_vreg_data,
	548	},
	549	};
	550
1394f032	551	static struct platform_device *cm_bf537_devices[] __initdata = {
14b03204 MH	552
	553	&bfin_dpmc,
	554
0d4a89bb MH	555	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	556	&hitachi_fb_device,
	557	#endif
	558
1394f032 BW	559	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	560	&rtc_device,
	561	#endif
	562
	563	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	564	&bfin_uart_device,
	565	#endif
	566
5be36d22	567	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	568	#ifdef CONFIG_BFIN_SIR0
	569	&bfin_sir0_device,
	570	#endif
	571	#ifdef CONFIG_BFIN_SIR1
	572	&bfin_sir1_device,
	573	#endif
5be36d22 GY	574	#endif
5be36d22 GY	575
56ce835b MF	576	#if defined(CONFIG_I2C_BLACKFIN_TWI) \|\| defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	577	&i2c_bfin_twi_device,
	578	#endif
	579
1394f032 BW	580	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	581	&bfin_sport0_uart_device,
	582	&bfin_sport1_uart_device,
	583	#endif
	584
	585	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	586	&isp1362_hcd_device,
	587	#endif
	588
	589	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	590	&smc91x_device,
	591	#endif
	592
	593	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628	594	&bfin_mii_bus,
1394f032 BW	595	&bfin_mac_device,
	596	#endif
	597
	598	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	599	&net2272_bfin_device,
	600	#endif
	601
	602	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb BW	603	&bfin_spi0_device,
	604	#endif
	605
	606	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	607	&bfin_pata_device,
1394f032	608	#endif
8ea89497 MF	609
	610	#if defined(CONFIG_MTD_GPIO_ADDR) \|\| defined(CONFIG_MTD_GPIO_ADDR_MODULE)
	611	&cm_flash_device,
	612	#endif
c97618d3 MF	613
c97618d3 MF	614	&bfin_gpios_device,
1394f032 BW	615	};
	616
	617	static int __init cm_bf537_init(void)
	618	{
b85d858b	619	printk(KERN_INFO "%s(): registering device resources\n", __func__);
1394f032 BW	620	platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
	621	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	622	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	623	#endif
c6c4d7bb BW	624
	625	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	626	irq_desc[PATA_INT].status \|= IRQ_NOAUTOEN;
	627	#endif
1394f032 BW	628	return 0;
	629	}
	630
	631	arch_initcall(cm_bf537_init);
137b1529	632
9862cc52	633	void bfin_get_ether_addr(char *addr)
137b1529 MF	634	{
	635	random_ether_addr(addr);
	636	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
	637	}
9862cc52	638	EXPORT_SYMBOL(bfin_get_ether_addr);