Commit | Line | Data |
---|---|---|
1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/generic_board.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
a628a8bc | 11 | * Copyright 2004-2008 Analog Devices Inc. |
1394f032 BW |
12 | * |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
43f73fef | 32 | #include <linux/etherdevice.h> |
1394f032 BW |
33 | #include <linux/platform_device.h> |
34 | #include <linux/mtd/mtd.h> | |
35 | #include <linux/mtd/partitions.h> | |
36 | #include <linux/spi/spi.h> | |
37 | #include <linux/spi/flash.h> | |
c6c4d7bb | 38 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
f02bcec5 | 39 | #include <linux/usb/isp1362.h> |
c6c4d7bb | 40 | #endif |
1f83b8f1 | 41 | #include <linux/irq.h> |
c6c4d7bb | 42 | #include <linux/interrupt.h> |
27f5d75a | 43 | #include <linux/usb/sl811.h> |
c6c4d7bb | 44 | #include <asm/dma.h> |
1f83b8f1 | 45 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 46 | #include <asm/reboot.h> |
5d448dd5 | 47 | #include <asm/portmux.h> |
c6c4d7bb | 48 | #include <linux/spi/ad7877.h> |
1394f032 BW |
49 | |
50 | /* | |
51 | * Name the Board for the /proc/cpuinfo | |
52 | */ | |
fe85cad2 | 53 | const char bfin_board_name[] = "UNKNOWN BOARD"; |
1394f032 BW |
54 | |
55 | /* | |
56 | * Driver needs to know address, irq and flag pin. | |
57 | */ | |
58 | ||
c6c4d7bb | 59 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) |
3f375690 MH |
60 | #include <linux/usb/isp1760.h> |
61 | static struct resource bfin_isp1760_resources[] = { | |
c6c4d7bb | 62 | [0] = { |
3f375690 MH |
63 | .start = 0x203C0000, |
64 | .end = 0x203C0000 + 0x000fffff, | |
c6c4d7bb BW |
65 | .flags = IORESOURCE_MEM, |
66 | }, | |
67 | [1] = { | |
3f375690 MH |
68 | .start = IRQ_PF7, |
69 | .end = IRQ_PF7, | |
c6c4d7bb BW |
70 | .flags = IORESOURCE_IRQ, |
71 | }, | |
72 | }; | |
73 | ||
3f375690 MH |
74 | static struct isp1760_platform_data isp1760_priv = { |
75 | .is_isp1761 = 0, | |
76 | .port1_disable = 0, | |
77 | .bus_width_16 = 1, | |
78 | .port1_otg = 0, | |
79 | .analog_oc = 0, | |
80 | .dack_polarity_high = 0, | |
81 | .dreq_polarity_high = 0, | |
c6c4d7bb BW |
82 | }; |
83 | ||
3f375690 MH |
84 | static struct platform_device bfin_isp1760_device = { |
85 | .name = "isp1760-hcd", | |
86 | .id = 0, | |
87 | .dev = { | |
88 | .platform_data = &isp1760_priv, | |
89 | }, | |
90 | .num_resources = ARRAY_SIZE(bfin_isp1760_resources), | |
91 | .resource = bfin_isp1760_resources, | |
c6c4d7bb | 92 | }; |
c6c4d7bb BW |
93 | #endif |
94 | ||
1394f032 BW |
95 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) |
96 | static struct resource bfin_pcmcia_cf_resources[] = { | |
97 | { | |
98 | .start = 0x20310000, /* IO PORT */ | |
99 | .end = 0x20312000, | |
100 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 101 | }, { |
d2d50aa9 | 102 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
103 | .end = 0x20311FFF, |
104 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 105 | }, { |
1394f032 BW |
106 | .start = IRQ_PF4, |
107 | .end = IRQ_PF4, | |
108 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 109 | }, { |
1394f032 BW |
110 | .start = 6, /* Card Detect PF6 */ |
111 | .end = 6, | |
112 | .flags = IORESOURCE_IRQ, | |
113 | }, | |
114 | }; | |
115 | ||
116 | static struct platform_device bfin_pcmcia_cf_device = { | |
117 | .name = "bfin_cf_pcmcia", | |
118 | .id = -1, | |
119 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
120 | .resource = bfin_pcmcia_cf_resources, | |
121 | }; | |
122 | #endif | |
123 | ||
124 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
125 | static struct platform_device rtc_device = { | |
126 | .name = "rtc-bfin", | |
127 | .id = -1, | |
128 | }; | |
129 | #endif | |
130 | ||
131 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
132 | static struct resource smc91x_resources[] = { | |
133 | { | |
134 | .name = "smc91x-regs", | |
135 | .start = 0x20300300, | |
136 | .end = 0x20300300 + 16, | |
137 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 138 | }, { |
c6c4d7bb | 139 | |
1394f032 BW |
140 | .start = IRQ_PF7, |
141 | .end = IRQ_PF7, | |
142 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
143 | }, | |
144 | }; | |
145 | static struct platform_device smc91x_device = { | |
146 | .name = "smc91x", | |
147 | .id = 0, | |
148 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
149 | .resource = smc91x_resources, | |
150 | }; | |
151 | #endif | |
152 | ||
c6c4d7bb BW |
153 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
154 | static struct resource dm9000_resources[] = { | |
155 | [0] = { | |
156 | .start = 0x203FB800, | |
da3854fc | 157 | .end = 0x203FB800 + 1, |
c6c4d7bb BW |
158 | .flags = IORESOURCE_MEM, |
159 | }, | |
160 | [1] = { | |
da3854fc LP |
161 | .start = 0x203FB800 + 4, |
162 | .end = 0x203FB800 + 5, | |
163 | .flags = IORESOURCE_MEM, | |
164 | }, | |
165 | [2] = { | |
c6c4d7bb BW |
166 | .start = IRQ_PF9, |
167 | .end = IRQ_PF9, | |
168 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | |
169 | }, | |
170 | }; | |
171 | ||
172 | static struct platform_device dm9000_device = { | |
173 | .name = "dm9000", | |
174 | .id = -1, | |
175 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
176 | .resource = dm9000_resources, | |
177 | }; | |
178 | #endif | |
179 | ||
1394f032 BW |
180 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) |
181 | static struct resource sl811_hcd_resources[] = { | |
182 | { | |
183 | .start = 0x20340000, | |
184 | .end = 0x20340000, | |
185 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 186 | }, { |
1394f032 BW |
187 | .start = 0x20340004, |
188 | .end = 0x20340004, | |
189 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 190 | }, { |
c6c4d7bb BW |
191 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
192 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
1394f032 BW |
193 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
194 | }, | |
195 | }; | |
196 | ||
197 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
198 | void sl811_port_power(struct device *dev, int is_on) | |
199 | { | |
c6c4d7bb | 200 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); |
acbcd263 | 201 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); |
1394f032 | 202 | |
1394f032 BW |
203 | } |
204 | #endif | |
205 | ||
206 | static struct sl811_platform_data sl811_priv = { | |
207 | .potpg = 10, | |
c6c4d7bb | 208 | .power = 250, /* == 500mA */ |
1394f032 BW |
209 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) |
210 | .port_power = &sl811_port_power, | |
211 | #endif | |
212 | }; | |
213 | ||
214 | static struct platform_device sl811_hcd_device = { | |
215 | .name = "sl811-hcd", | |
216 | .id = 0, | |
217 | .dev = { | |
218 | .platform_data = &sl811_priv, | |
219 | }, | |
220 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
221 | .resource = sl811_hcd_resources, | |
222 | }; | |
1394f032 BW |
223 | #endif |
224 | ||
225 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
226 | static struct resource isp1362_hcd_resources[] = { | |
227 | { | |
228 | .start = 0x20360000, | |
229 | .end = 0x20360000, | |
230 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 231 | }, { |
1394f032 BW |
232 | .start = 0x20360004, |
233 | .end = 0x20360004, | |
234 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 235 | }, { |
c6c4d7bb BW |
236 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
237 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
1394f032 | 238 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
1394f032 BW |
239 | }, |
240 | }; | |
241 | ||
242 | static struct isp1362_platform_data isp1362_priv = { | |
243 | .sel15Kres = 1, | |
244 | .clknotstop = 0, | |
245 | .oc_enable = 0, | |
246 | .int_act_high = 0, | |
247 | .int_edge_triggered = 0, | |
248 | .remote_wakeup_connected = 0, | |
249 | .no_power_switching = 1, | |
250 | .power_switching_mode = 0, | |
251 | }; | |
252 | ||
253 | static struct platform_device isp1362_hcd_device = { | |
254 | .name = "isp1362-hcd", | |
255 | .id = 0, | |
256 | .dev = { | |
257 | .platform_data = &isp1362_priv, | |
258 | }, | |
259 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
260 | .resource = isp1362_hcd_resources, | |
261 | }; | |
262 | #endif | |
263 | ||
264 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
65319628 GY |
265 | static struct platform_device bfin_mii_bus = { |
266 | .name = "bfin_mii_bus", | |
267 | }; | |
268 | ||
1394f032 BW |
269 | static struct platform_device bfin_mac_device = { |
270 | .name = "bfin_mac", | |
65319628 | 271 | .dev.platform_data = &bfin_mii_bus, |
1394f032 BW |
272 | }; |
273 | #endif | |
274 | ||
275 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
276 | static struct resource net2272_bfin_resources[] = { | |
277 | { | |
278 | .start = 0x20300000, | |
279 | .end = 0x20300000 + 0x100, | |
280 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 281 | }, { |
1394f032 BW |
282 | .start = IRQ_PF7, |
283 | .end = IRQ_PF7, | |
284 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
285 | }, | |
286 | }; | |
287 | ||
288 | static struct platform_device net2272_bfin_device = { | |
289 | .name = "net2272", | |
290 | .id = -1, | |
291 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
292 | .resource = net2272_bfin_resources, | |
293 | }; | |
294 | #endif | |
295 | ||
296 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
297 | /* all SPI peripherals info goes here */ | |
298 | ||
c6c4d7bb BW |
299 | #if defined(CONFIG_MTD_M25P80) \ |
300 | || defined(CONFIG_MTD_M25P80_MODULE) | |
1394f032 BW |
301 | static struct mtd_partition bfin_spi_flash_partitions[] = { |
302 | { | |
aa582977 | 303 | .name = "bootloader(spi)", |
1394f032 BW |
304 | .size = 0x00020000, |
305 | .offset = 0, | |
306 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 307 | }, { |
aa582977 | 308 | .name = "linux kernel(spi)", |
1394f032 BW |
309 | .size = 0xe0000, |
310 | .offset = 0x20000 | |
1f83b8f1 | 311 | }, { |
aa582977 | 312 | .name = "file system(spi)", |
1394f032 BW |
313 | .size = 0x700000, |
314 | .offset = 0x00100000, | |
315 | } | |
316 | }; | |
317 | ||
318 | static struct flash_platform_data bfin_spi_flash_data = { | |
319 | .name = "m25p80", | |
320 | .parts = bfin_spi_flash_partitions, | |
321 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
322 | .type = "m25p64", | |
323 | }; | |
324 | ||
325 | /* SPI flash chip (m25p64) */ | |
326 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
327 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
328 | .bits_per_word = 8, | |
329 | }; | |
330 | #endif | |
331 | ||
332 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
333 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
334 | /* SPI ADC chip */ | |
335 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
336 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
337 | .bits_per_word = 16, | |
338 | }; | |
339 | #endif | |
340 | ||
341 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
342 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
343 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
344 | .enable_dma = 0, | |
345 | .bits_per_word = 16, | |
346 | }; | |
347 | #endif | |
348 | ||
349 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
350 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
351 | .enable_dma = 0, | |
352 | .bits_per_word = 16, | |
353 | }; | |
354 | #endif | |
355 | ||
c6c4d7bb BW |
356 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
357 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
358 | .enable_dma = 1, | |
359 | .bits_per_word = 8, | |
360 | }; | |
361 | #endif | |
362 | ||
363 | #if defined(CONFIG_PBX) | |
364 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
365 | .ctl_reg = 0x4, /* send zero */ | |
366 | .enable_dma = 0, | |
367 | .bits_per_word = 8, | |
368 | .cs_change_per_word = 1, | |
369 | }; | |
370 | #endif | |
371 | ||
c6c4d7bb BW |
372 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
373 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | |
374 | .enable_dma = 0, | |
375 | .bits_per_word = 16, | |
376 | }; | |
377 | ||
378 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
379 | .model = 7877, | |
380 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
381 | .x_plate_ohms = 419, | |
382 | .y_plate_ohms = 486, | |
383 | .pressure_max = 1000, | |
384 | .pressure_min = 0, | |
385 | .stopacq_polarity = 1, | |
386 | .first_conversion_delay = 3, | |
387 | .acquisition_time = 1, | |
388 | .averaging = 1, | |
389 | .pen_down_acc_interval = 1, | |
390 | }; | |
391 | #endif | |
392 | ||
1394f032 | 393 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
c6c4d7bb BW |
394 | #if defined(CONFIG_MTD_M25P80) \ |
395 | || defined(CONFIG_MTD_M25P80_MODULE) | |
1394f032 BW |
396 | { |
397 | /* the modalias must be the same as spi device driver name */ | |
398 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
399 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
400 | .bus_num = 0, /* Framework bus number */ |
401 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ | |
1394f032 BW |
402 | .platform_data = &bfin_spi_flash_data, |
403 | .controller_data = &spi_flash_chip_info, | |
404 | .mode = SPI_MODE_3, | |
405 | }, | |
406 | #endif | |
407 | ||
c6c4d7bb BW |
408 | #if defined(CONFIG_SPI_ADC_BF533) \ |
409 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
1394f032 BW |
410 | { |
411 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
412 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 413 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
414 | .chip_select = 1, /* Framework chip select. */ |
415 | .platform_data = NULL, /* No spi_driver specific config */ | |
416 | .controller_data = &spi_adc_chip_info, | |
417 | }, | |
418 | #endif | |
419 | ||
c6c4d7bb BW |
420 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ |
421 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
1394f032 BW |
422 | { |
423 | .modalias = "ad1836-spi", | |
424 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 425 | .bus_num = 0, |
1394f032 BW |
426 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
427 | .controller_data = &ad1836_spi_chip_info, | |
428 | }, | |
429 | #endif | |
1394f032 BW |
430 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) |
431 | { | |
432 | .modalias = "ad9960-spi", | |
433 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 434 | .bus_num = 0, |
1394f032 BW |
435 | .chip_select = 1, |
436 | .controller_data = &ad9960_spi_chip_info, | |
437 | }, | |
438 | #endif | |
c6c4d7bb BW |
439 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
440 | { | |
441 | .modalias = "spi_mmc_dummy", | |
442 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
443 | .bus_num = 0, | |
444 | .chip_select = 0, | |
445 | .platform_data = NULL, | |
446 | .controller_data = &spi_mmc_chip_info, | |
447 | .mode = SPI_MODE_3, | |
448 | }, | |
449 | { | |
450 | .modalias = "spi_mmc", | |
451 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
452 | .bus_num = 0, | |
453 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | |
454 | .platform_data = NULL, | |
455 | .controller_data = &spi_mmc_chip_info, | |
456 | .mode = SPI_MODE_3, | |
457 | }, | |
458 | #endif | |
459 | #if defined(CONFIG_PBX) | |
460 | { | |
461 | .modalias = "fxs-spi", | |
462 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
463 | .bus_num = 0, | |
464 | .chip_select = 8 - CONFIG_J11_JUMPER, | |
465 | .controller_data = &spi_si3xxx_chip_info, | |
466 | .mode = SPI_MODE_3, | |
467 | }, | |
468 | { | |
469 | .modalias = "fxo-spi", | |
470 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
471 | .bus_num = 0, | |
472 | .chip_select = 8 - CONFIG_J19_JUMPER, | |
473 | .controller_data = &spi_si3xxx_chip_info, | |
474 | .mode = SPI_MODE_3, | |
475 | }, | |
476 | #endif | |
c6c4d7bb BW |
477 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
478 | { | |
479 | .modalias = "ad7877", | |
480 | .platform_data = &bfin_ad7877_ts_info, | |
481 | .irq = IRQ_PF6, | |
482 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c7d48966 | 483 | .bus_num = 0, |
c6c4d7bb BW |
484 | .chip_select = 1, |
485 | .controller_data = &spi_ad7877_chip_info, | |
486 | }, | |
487 | #endif | |
1394f032 BW |
488 | }; |
489 | ||
490 | /* SPI controller data */ | |
c6c4d7bb | 491 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
492 | .num_chipselect = 8, |
493 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 494 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
495 | }; |
496 | ||
c6c4d7bb BW |
497 | /* SPI (0) */ |
498 | static struct resource bfin_spi0_resource[] = { | |
499 | [0] = { | |
500 | .start = SPI0_REGBASE, | |
501 | .end = SPI0_REGBASE + 0xFF, | |
502 | .flags = IORESOURCE_MEM, | |
503 | }, | |
504 | [1] = { | |
505 | .start = CH_SPI, | |
506 | .end = CH_SPI, | |
507 | .flags = IORESOURCE_IRQ, | |
508 | }, | |
509 | }; | |
510 | ||
511 | static struct platform_device bfin_spi0_device = { | |
512 | .name = "bfin-spi", | |
513 | .id = 0, /* Bus number */ | |
514 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
515 | .resource = bfin_spi0_resource, | |
1394f032 | 516 | .dev = { |
c6c4d7bb | 517 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
518 | }, |
519 | }; | |
520 | #endif /* spi master and devices */ | |
521 | ||
522 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
523 | static struct platform_device bfin_fb_device = { | |
c6c4d7bb BW |
524 | .name = "bf537-lq035", |
525 | }; | |
526 | #endif | |
527 | ||
528 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | |
529 | static struct platform_device bfin_fb_adv7393_device = { | |
530 | .name = "bfin-adv7393", | |
1394f032 BW |
531 | }; |
532 | #endif | |
533 | ||
534 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
535 | static struct resource bfin_uart_resources[] = { | |
536 | { | |
537 | .start = 0xFFC00400, | |
538 | .end = 0xFFC004FF, | |
539 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 540 | }, { |
1394f032 BW |
541 | .start = 0xFFC02000, |
542 | .end = 0xFFC020FF, | |
543 | .flags = IORESOURCE_MEM, | |
544 | }, | |
545 | }; | |
546 | ||
547 | static struct platform_device bfin_uart_device = { | |
548 | .name = "bfin-uart", | |
549 | .id = 1, | |
550 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
551 | .resource = bfin_uart_resources, | |
552 | }; | |
553 | #endif | |
554 | ||
5be36d22 | 555 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
5be36d22 | 556 | #ifdef CONFIG_BFIN_SIR0 |
42bd8bcb | 557 | static struct resource bfin_sir0_resources[] = { |
5be36d22 GY |
558 | { |
559 | .start = 0xFFC00400, | |
560 | .end = 0xFFC004FF, | |
561 | .flags = IORESOURCE_MEM, | |
562 | }, | |
42bd8bcb GY |
563 | { |
564 | .start = IRQ_UART0_RX, | |
565 | .end = IRQ_UART0_RX+1, | |
566 | .flags = IORESOURCE_IRQ, | |
567 | }, | |
568 | { | |
569 | .start = CH_UART0_RX, | |
570 | .end = CH_UART0_RX+1, | |
571 | .flags = IORESOURCE_DMA, | |
572 | }, | |
573 | }; | |
574 | ||
575 | static struct platform_device bfin_sir0_device = { | |
576 | .name = "bfin_sir", | |
577 | .id = 0, | |
578 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), | |
579 | .resource = bfin_sir0_resources, | |
580 | }; | |
5be36d22 GY |
581 | #endif |
582 | #ifdef CONFIG_BFIN_SIR1 | |
42bd8bcb | 583 | static struct resource bfin_sir1_resources[] = { |
5be36d22 GY |
584 | { |
585 | .start = 0xFFC02000, | |
586 | .end = 0xFFC020FF, | |
587 | .flags = IORESOURCE_MEM, | |
588 | }, | |
42bd8bcb GY |
589 | { |
590 | .start = IRQ_UART1_RX, | |
591 | .end = IRQ_UART1_RX+1, | |
592 | .flags = IORESOURCE_IRQ, | |
593 | }, | |
594 | { | |
595 | .start = CH_UART1_RX, | |
596 | .end = CH_UART1_RX+1, | |
597 | .flags = IORESOURCE_DMA, | |
598 | }, | |
5be36d22 GY |
599 | }; |
600 | ||
42bd8bcb | 601 | static struct platform_device bfin_sir1_device = { |
5be36d22 | 602 | .name = "bfin_sir", |
42bd8bcb GY |
603 | .id = 1, |
604 | .num_resources = ARRAY_SIZE(bfin_sir1_resources), | |
605 | .resource = bfin_sir1_resources, | |
5be36d22 GY |
606 | }; |
607 | #endif | |
42bd8bcb | 608 | #endif |
5be36d22 | 609 | |
c6c4d7bb BW |
610 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
611 | static struct resource bfin_twi0_resource[] = { | |
612 | [0] = { | |
613 | .start = TWI0_REGBASE, | |
614 | .end = TWI0_REGBASE + 0xFF, | |
615 | .flags = IORESOURCE_MEM, | |
616 | }, | |
617 | [1] = { | |
618 | .start = IRQ_TWI, | |
619 | .end = IRQ_TWI, | |
620 | .flags = IORESOURCE_IRQ, | |
621 | }, | |
622 | }; | |
623 | ||
624 | static struct platform_device i2c_bfin_twi_device = { | |
625 | .name = "i2c-bfin-twi", | |
626 | .id = 0, | |
627 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), | |
628 | .resource = bfin_twi0_resource, | |
629 | }; | |
630 | #endif | |
631 | ||
632 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
633 | static struct platform_device bfin_sport0_uart_device = { | |
634 | .name = "bfin-sport-uart", | |
635 | .id = 0, | |
636 | }; | |
637 | ||
638 | static struct platform_device bfin_sport1_uart_device = { | |
639 | .name = "bfin-sport-uart", | |
640 | .id = 1, | |
641 | }; | |
642 | #endif | |
643 | ||
c6c4d7bb | 644 | static struct platform_device *stamp_devices[] __initdata = { |
1394f032 BW |
645 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) |
646 | &bfin_pcmcia_cf_device, | |
647 | #endif | |
648 | ||
c6c4d7bb BW |
649 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
650 | &rtc_device, | |
651 | #endif | |
652 | ||
1394f032 BW |
653 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) |
654 | &sl811_hcd_device, | |
655 | #endif | |
656 | ||
657 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
658 | &isp1362_hcd_device, | |
659 | #endif | |
660 | ||
661 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
662 | &smc91x_device, | |
663 | #endif | |
664 | ||
c6c4d7bb BW |
665 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
666 | &dm9000_device, | |
667 | #endif | |
668 | ||
1394f032 | 669 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
65319628 | 670 | &bfin_mii_bus, |
1394f032 BW |
671 | &bfin_mac_device, |
672 | #endif | |
673 | ||
674 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
675 | &net2272_bfin_device, | |
676 | #endif | |
677 | ||
3f375690 MH |
678 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) |
679 | &bfin_isp1760_device, | |
680 | #endif | |
681 | ||
1394f032 | 682 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
c6c4d7bb | 683 | &bfin_spi0_device, |
1394f032 BW |
684 | #endif |
685 | ||
686 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
687 | &bfin_fb_device, | |
688 | #endif | |
689 | ||
c6c4d7bb BW |
690 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
691 | &bfin_fb_adv7393_device, | |
692 | #endif | |
693 | ||
1394f032 BW |
694 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
695 | &bfin_uart_device, | |
696 | #endif | |
c6c4d7bb | 697 | |
5be36d22 | 698 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
42bd8bcb GY |
699 | #ifdef CONFIG_BFIN_SIR0 |
700 | &bfin_sir0_device, | |
701 | #endif | |
702 | #ifdef CONFIG_BFIN_SIR1 | |
703 | &bfin_sir1_device, | |
704 | #endif | |
5be36d22 GY |
705 | #endif |
706 | ||
c6c4d7bb BW |
707 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
708 | &i2c_bfin_twi_device, | |
709 | #endif | |
710 | ||
711 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
712 | &bfin_sport0_uart_device, | |
713 | &bfin_sport1_uart_device, | |
714 | #endif | |
1394f032 BW |
715 | }; |
716 | ||
7f6678c5 | 717 | static int __init generic_init(void) |
1394f032 | 718 | { |
b85d858b | 719 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
1394f032 BW |
720 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
721 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb BW |
722 | spi_register_board_info(bfin_spi_board_info, |
723 | ARRAY_SIZE(bfin_spi_board_info)); | |
724 | #endif | |
725 | ||
1394f032 BW |
726 | return 0; |
727 | } | |
728 | ||
7f6678c5 | 729 | arch_initcall(generic_init); |
c6c4d7bb BW |
730 | |
731 | void native_machine_restart(char *cmd) | |
732 | { | |
733 | /* workaround reboot hang when booting from SPI */ | |
734 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | |
b52dae31 | 735 | bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); |
c6c4d7bb | 736 | } |
137b1529 | 737 | |
7285846f | 738 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
9862cc52 | 739 | void bfin_get_ether_addr(char *addr) |
137b1529 MF |
740 | { |
741 | random_ether_addr(addr); | |
742 | printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__); | |
743 | } | |
9862cc52 | 744 | EXPORT_SYMBOL(bfin_get_ether_addr); |
7285846f | 745 | #endif |