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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
35 | #include <linux/spi/spi.h> | |
36 | #include <linux/spi/flash.h> | |
37 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
38 | #include <linux/usb_isp1362.h> | |
39 | #endif | |
1f83b8f1 | 40 | #include <linux/irq.h> |
c6c4d7bb | 41 | #include <asm/dma.h> |
1394f032 | 42 | #include <asm/bfin5xx_spi.h> |
27f5d75a | 43 | #include <linux/usb/sl811.h> |
1394f032 BW |
44 | |
45 | #include <linux/spi/ad7877.h> | |
46 | ||
47 | /* | |
48 | * Name the Board for the /proc/cpuinfo | |
49 | */ | |
50 | char *bfin_board_name = "PNAV-1.0"; | |
51 | ||
52 | /* | |
53 | * Driver needs to know address, irq and flag pin. | |
54 | */ | |
55 | ||
56 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
57 | static struct resource bfin_pcmcia_cf_resources[] = { | |
58 | { | |
59 | .start = 0x20310000, /* IO PORT */ | |
60 | .end = 0x20312000, | |
61 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 62 | }, { |
d2d50aa9 | 63 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
64 | .end = 0x20311FFF, |
65 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 66 | }, { |
1394f032 BW |
67 | .start = IRQ_PF4, |
68 | .end = IRQ_PF4, | |
69 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 70 | }, { |
1394f032 BW |
71 | .start = 6, /* Card Detect PF6 */ |
72 | .end = 6, | |
73 | .flags = IORESOURCE_IRQ, | |
74 | }, | |
75 | }; | |
76 | ||
77 | static struct platform_device bfin_pcmcia_cf_device = { | |
78 | .name = "bfin_cf_pcmcia", | |
79 | .id = -1, | |
80 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
81 | .resource = bfin_pcmcia_cf_resources, | |
82 | }; | |
83 | #endif | |
84 | ||
85 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
86 | static struct platform_device rtc_device = { | |
87 | .name = "rtc-bfin", | |
88 | .id = -1, | |
89 | }; | |
90 | #endif | |
91 | ||
92 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
93 | static struct resource smc91x_resources[] = { | |
94 | { | |
95 | .name = "smc91x-regs", | |
96 | .start = 0x20300300, | |
97 | .end = 0x20300300 + 16, | |
98 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 99 | }, { |
1394f032 BW |
100 | |
101 | .start = IRQ_PF7, | |
102 | .end = IRQ_PF7, | |
103 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
104 | }, | |
105 | }; | |
106 | static struct platform_device smc91x_device = { | |
107 | .name = "smc91x", | |
108 | .id = 0, | |
109 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
110 | .resource = smc91x_resources, | |
111 | }; | |
112 | #endif | |
113 | ||
114 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
115 | static struct resource sl811_hcd_resources[] = { | |
116 | { | |
117 | .start = 0x20340000, | |
118 | .end = 0x20340000, | |
119 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 120 | }, { |
1394f032 BW |
121 | .start = 0x20340004, |
122 | .end = 0x20340004, | |
123 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 124 | }, { |
1394f032 BW |
125 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
126 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
127 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
128 | }, | |
129 | }; | |
130 | ||
131 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
132 | void sl811_port_power(struct device *dev, int is_on) | |
133 | { | |
c6c4d7bb BW |
134 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); |
135 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS); | |
1394f032 BW |
136 | |
137 | if (is_on) | |
c6c4d7bb | 138 | gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1); |
1394f032 | 139 | else |
c6c4d7bb | 140 | gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0); |
1394f032 BW |
141 | } |
142 | #endif | |
143 | ||
144 | static struct sl811_platform_data sl811_priv = { | |
145 | .potpg = 10, | |
146 | .power = 250, /* == 500mA */ | |
147 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
148 | .port_power = &sl811_port_power, | |
149 | #endif | |
150 | }; | |
151 | ||
152 | static struct platform_device sl811_hcd_device = { | |
153 | .name = "sl811-hcd", | |
154 | .id = 0, | |
155 | .dev = { | |
156 | .platform_data = &sl811_priv, | |
157 | }, | |
158 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
159 | .resource = sl811_hcd_resources, | |
160 | }; | |
161 | #endif | |
162 | ||
163 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
164 | static struct resource isp1362_hcd_resources[] = { | |
165 | { | |
166 | .start = 0x20360000, | |
167 | .end = 0x20360000, | |
168 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 169 | }, { |
1394f032 BW |
170 | .start = 0x20360004, |
171 | .end = 0x20360004, | |
172 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 173 | }, { |
1394f032 BW |
174 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
175 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
176 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
177 | }, | |
178 | }; | |
179 | ||
180 | static struct isp1362_platform_data isp1362_priv = { | |
181 | .sel15Kres = 1, | |
182 | .clknotstop = 0, | |
183 | .oc_enable = 0, | |
184 | .int_act_high = 0, | |
185 | .int_edge_triggered = 0, | |
186 | .remote_wakeup_connected = 0, | |
187 | .no_power_switching = 1, | |
188 | .power_switching_mode = 0, | |
189 | }; | |
190 | ||
191 | static struct platform_device isp1362_hcd_device = { | |
192 | .name = "isp1362-hcd", | |
193 | .id = 0, | |
194 | .dev = { | |
195 | .platform_data = &isp1362_priv, | |
196 | }, | |
197 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
198 | .resource = isp1362_hcd_resources, | |
199 | }; | |
200 | #endif | |
201 | ||
202 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
203 | static struct platform_device bfin_mac_device = { | |
204 | .name = "bfin_mac", | |
205 | }; | |
206 | #endif | |
207 | ||
208 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
209 | static struct resource net2272_bfin_resources[] = { | |
210 | { | |
211 | .start = 0x20300000, | |
212 | .end = 0x20300000 + 0x100, | |
213 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 214 | }, { |
1394f032 BW |
215 | .start = IRQ_PF7, |
216 | .end = IRQ_PF7, | |
217 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
218 | }, | |
219 | }; | |
220 | ||
221 | static struct platform_device net2272_bfin_device = { | |
222 | .name = "net2272", | |
223 | .id = -1, | |
224 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
225 | .resource = net2272_bfin_resources, | |
226 | }; | |
227 | #endif | |
228 | ||
229 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
230 | /* all SPI peripherals info goes here */ | |
231 | ||
232 | #if defined(CONFIG_MTD_M25P80) \ | |
233 | || defined(CONFIG_MTD_M25P80_MODULE) | |
234 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
235 | { | |
236 | .name = "bootloader", | |
237 | .size = 0x00020000, | |
238 | .offset = 0, | |
239 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 240 | }, { |
1394f032 BW |
241 | .name = "kernel", |
242 | .size = 0xe0000, | |
243 | .offset = 0x20000 | |
1f83b8f1 | 244 | }, { |
1394f032 BW |
245 | .name = "file system", |
246 | .size = 0x700000, | |
247 | .offset = 0x00100000, | |
248 | } | |
249 | }; | |
250 | ||
251 | static struct flash_platform_data bfin_spi_flash_data = { | |
252 | .name = "m25p80", | |
253 | .parts = bfin_spi_flash_partitions, | |
254 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
255 | .type = "m25p64", | |
256 | }; | |
257 | ||
258 | /* SPI flash chip (m25p64) */ | |
259 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
260 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
261 | .bits_per_word = 8, | |
262 | }; | |
263 | #endif | |
264 | ||
265 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
266 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
267 | /* SPI ADC chip */ | |
268 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
269 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
270 | .bits_per_word = 16, | |
271 | }; | |
272 | #endif | |
273 | ||
274 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
275 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
276 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
277 | .enable_dma = 0, | |
278 | .bits_per_word = 16, | |
279 | }; | |
280 | #endif | |
281 | ||
282 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
283 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
284 | .enable_dma = 0, | |
285 | .bits_per_word = 16, | |
286 | }; | |
287 | #endif | |
288 | ||
289 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
290 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
291 | .enable_dma = 1, | |
292 | .bits_per_word = 8, | |
293 | }; | |
294 | #endif | |
295 | ||
1394f032 BW |
296 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
297 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | |
298 | .cs_change_per_word = 1, | |
299 | .enable_dma = 0, | |
300 | .bits_per_word = 16, | |
301 | }; | |
302 | ||
303 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
304 | .model = 7877, | |
305 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
306 | .x_plate_ohms = 419, | |
307 | .y_plate_ohms = 486, | |
308 | .pressure_max = 1000, | |
309 | .pressure_min = 0, | |
310 | .stopacq_polarity = 1, | |
311 | .first_conversion_delay = 3, | |
312 | .acquisition_time = 1, | |
313 | .averaging = 1, | |
314 | .pen_down_acc_interval = 1, | |
315 | }; | |
316 | #endif | |
317 | ||
318 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | |
319 | #if defined(CONFIG_MTD_M25P80) \ | |
320 | || defined(CONFIG_MTD_M25P80_MODULE) | |
321 | { | |
322 | /* the modalias must be the same as spi device driver name */ | |
323 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
324 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 325 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
326 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
327 | .platform_data = &bfin_spi_flash_data, | |
328 | .controller_data = &spi_flash_chip_info, | |
329 | .mode = SPI_MODE_3, | |
330 | }, | |
331 | #endif | |
332 | ||
333 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
334 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
335 | { | |
336 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
337 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 338 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
339 | .chip_select = 1, /* Framework chip select. */ |
340 | .platform_data = NULL, /* No spi_driver specific config */ | |
341 | .controller_data = &spi_adc_chip_info, | |
342 | }, | |
343 | #endif | |
344 | ||
345 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
346 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
347 | { | |
348 | .modalias = "ad1836-spi", | |
349 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 350 | .bus_num = 0, |
1394f032 BW |
351 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
352 | .controller_data = &ad1836_spi_chip_info, | |
353 | }, | |
354 | #endif | |
355 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
356 | { | |
357 | .modalias = "ad9960-spi", | |
358 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 359 | .bus_num = 0, |
1394f032 BW |
360 | .chip_select = 1, |
361 | .controller_data = &ad9960_spi_chip_info, | |
362 | }, | |
363 | #endif | |
364 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
365 | { | |
366 | .modalias = "spi_mmc_dummy", | |
367 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 368 | .bus_num = 0, |
1394f032 BW |
369 | .chip_select = 7, |
370 | .platform_data = NULL, | |
371 | .controller_data = &spi_mmc_chip_info, | |
372 | .mode = SPI_MODE_3, | |
373 | }, | |
374 | { | |
375 | .modalias = "spi_mmc", | |
376 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 377 | .bus_num = 0, |
1394f032 BW |
378 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
379 | .platform_data = NULL, | |
380 | .controller_data = &spi_mmc_chip_info, | |
381 | .mode = SPI_MODE_3, | |
382 | }, | |
383 | #endif | |
1394f032 BW |
384 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
385 | { | |
386 | .modalias = "ad7877", | |
387 | .platform_data = &bfin_ad7877_ts_info, | |
388 | .irq = IRQ_PF2, | |
389 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
390 | .bus_num = 1, | |
391 | .chip_select = 5, | |
392 | .controller_data = &spi_ad7877_chip_info, | |
393 | }, | |
394 | #endif | |
395 | ||
396 | }; | |
397 | ||
c6c4d7bb BW |
398 | /* SPI (0) */ |
399 | static struct resource bfin_spi0_resource[] = { | |
400 | [0] = { | |
401 | .start = SPI0_REGBASE, | |
402 | .end = SPI0_REGBASE + 0xFF, | |
403 | .flags = IORESOURCE_MEM, | |
404 | }, | |
405 | [1] = { | |
406 | .start = CH_SPI, | |
407 | .end = CH_SPI, | |
408 | .flags = IORESOURCE_IRQ, | |
409 | } | |
410 | }; | |
411 | ||
1394f032 | 412 | /* SPI controller data */ |
c6c4d7bb | 413 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
414 | .num_chipselect = 8, |
415 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
416 | }; | |
417 | ||
c6c4d7bb BW |
418 | static struct platform_device bfin_spi0_device = { |
419 | .name = "bfin-spi", | |
420 | .id = 0, /* Bus number */ | |
421 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
422 | .resource = bfin_spi0_resource, | |
1394f032 | 423 | .dev = { |
c6c4d7bb | 424 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
425 | }, |
426 | }; | |
427 | #endif /* spi master and devices */ | |
428 | ||
429 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
430 | static struct platform_device bfin_fb_device = { | |
c6c4d7bb | 431 | .name = "bf537-lq035", |
1394f032 BW |
432 | }; |
433 | #endif | |
434 | ||
435 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
436 | static struct resource bfin_uart_resources[] = { | |
437 | { | |
438 | .start = 0xFFC00400, | |
439 | .end = 0xFFC004FF, | |
440 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 441 | }, { |
1394f032 BW |
442 | .start = 0xFFC02000, |
443 | .end = 0xFFC020FF, | |
444 | .flags = IORESOURCE_MEM, | |
445 | }, | |
446 | }; | |
447 | ||
448 | static struct platform_device bfin_uart_device = { | |
449 | .name = "bfin-uart", | |
450 | .id = 1, | |
451 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
452 | .resource = bfin_uart_resources, | |
453 | }; | |
454 | #endif | |
455 | ||
456 | ||
457 | static struct platform_device *stamp_devices[] __initdata = { | |
458 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
459 | &bfin_pcmcia_cf_device, | |
460 | #endif | |
461 | ||
462 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
463 | &rtc_device, | |
464 | #endif | |
465 | ||
466 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
467 | &sl811_hcd_device, | |
468 | #endif | |
469 | ||
470 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
471 | &isp1362_hcd_device, | |
472 | #endif | |
473 | ||
474 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
475 | &smc91x_device, | |
476 | #endif | |
477 | ||
478 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
479 | &bfin_mac_device, | |
480 | #endif | |
481 | ||
482 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
483 | &net2272_bfin_device, | |
484 | #endif | |
485 | ||
486 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 487 | &bfin_spi0_device, |
1394f032 BW |
488 | #endif |
489 | ||
490 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
491 | &bfin_fb_device, | |
492 | #endif | |
493 | ||
494 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
495 | &bfin_uart_device, | |
496 | #endif | |
497 | }; | |
498 | ||
499 | static int __init stamp_init(void) | |
500 | { | |
501 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
502 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | |
503 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
504 | spi_register_board_info(bfin_spi_board_info, | |
505 | ARRAY_SIZE(bfin_spi_board_info)); | |
506 | #endif | |
507 | return 0; | |
508 | } | |
509 | ||
510 | arch_initcall(stamp_init); |