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Blackfin: bf537-stamp: fix irq decl for AD7142
[deliverable/linux.git] / arch / blackfin / mach-bf537 / boards / stamp.c
CommitLineData
1394f032
BW		 1/*
2 * File: arch/blackfin/mach-bf537/boards/stamp.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
fc68911e 32#include <linux/kernel.h>
1394f032
BW		 33#include <linux/platform_device.h>
34#include <linux/mtd/mtd.h>
fc68911e 35#include <linux/mtd/nand.h>
1394f032 36#include <linux/mtd/partitions.h>
fc68911e 37#include <linux/mtd/plat-ram.h>
de8c43f2 38#include <linux/mtd/physmap.h>
1394f032
BW		 39#include <linux/spi/spi.h>
40#include <linux/spi/flash.h>
41#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 42#include <linux/usb/isp1362.h>
1394f032 43#endif
0a87e3e9 44#include <linux/ata_platform.h>
1394f032
BW		 45#include <linux/irq.h>
46#include <linux/interrupt.h>
81d9c7f2 47#include <linux/i2c.h>
27f5d75a 48#include <linux/usb/sl811.h>
f79ea4cb 49#include <linux/spi/mmc_spi.h>
c6c4d7bb 50#include <asm/dma.h>
1f83b8f1 51#include <asm/bfin5xx_spi.h>
c6c4d7bb 52#include <asm/reboot.h>
5d448dd5 53#include <asm/portmux.h>
14b03204 54#include <asm/dpmc.h>
1394f032
BW		 55
56/*
57 * Name the Board for the /proc/cpuinfo
58 */
fe85cad2 59const char bfin_board_name[] = "ADI BF537-STAMP";
1394f032
BW		 60
61/*
62 * Driver needs to know address, irq and flag pin.
63 */
64
1394f032 65#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 66#include <linux/usb/isp1760.h>
67static struct resource bfin_isp1760_resources[] = {
1394f032 68 [0] = {
3f375690
MH		 69 .start = 0x203C0000,
70 .end = 0x203C0000 + 0x000fffff,
1394f032
BW		 71 .flags = IORESOURCE_MEM,
72 },
73 [1] = {
3f375690
MH		 74 .start = IRQ_PF7,
75 .end = IRQ_PF7,
6a6be3d1 76 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1394f032
BW		 77 },
78};
79
3f375690
MH		 80static struct isp1760_platform_data isp1760_priv = {
81 .is_isp1761 = 0,
3f375690
MH		 82 .bus_width_16 = 1,
83 .port1_otg = 0,
84 .analog_oc = 0,
85 .dack_polarity_high = 0,
86 .dreq_polarity_high = 0,
1394f032
BW		 87};
88
3f375690
MH		 89static struct platform_device bfin_isp1760_device = {
90 .name = "isp1760-hcd",
91 .id = 0,
92 .dev = {
93 .platform_data = &isp1760_priv,
94 },
95 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
96 .resource = bfin_isp1760_resources,
1394f032 97};
1394f032
BW		 98#endif
99
2463ef22
MH		 100#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
101#include <linux/input.h>
102#include <linux/gpio_keys.h>
103
104static struct gpio_keys_button bfin_gpio_keys_table[] = {
105 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
106 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
107 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
108 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
109};
110
111static struct gpio_keys_platform_data bfin_gpio_keys_data = {
112 .buttons = bfin_gpio_keys_table,
113 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
114};
115
116static struct platform_device bfin_device_gpiokeys = {
117 .name = "gpio-keys",
118 .dev = {
119 .platform_data = &bfin_gpio_keys_data,
120 },
121};
122#endif
123
cad2ab65
MF		 124static struct resource bfin_gpios_resources = {
125 .start = 0,
126 .end = MAX_BLACKFIN_GPIOS - 1,
127 .flags = IORESOURCE_IRQ,
128};
129
130static struct platform_device bfin_gpios_device = {
131 .name = "simple-gpio",
132 .id = -1,
133 .num_resources = 1,
134 .resource = &bfin_gpios_resources,
135};
136
1394f032
BW		 137#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
138static struct resource bfin_pcmcia_cf_resources[] = {
139 {
140 .start = 0x20310000, /* IO PORT */
141 .end = 0x20312000,
142 .flags = IORESOURCE_MEM,
1f83b8f1 143 }, {
d2d50aa9 144 .start = 0x20311000, /* Attribute Memory */
1394f032
BW		 145 .end = 0x20311FFF,
146 .flags = IORESOURCE_MEM,
1f83b8f1 147 }, {
1394f032
BW		 148 .start = IRQ_PF4,
149 .end = IRQ_PF4,
150 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 151 }, {
1394f032
BW		 152 .start = 6, /* Card Detect PF6 */
153 .end = 6,
154 .flags = IORESOURCE_IRQ,
155 },
156};
157
158static struct platform_device bfin_pcmcia_cf_device = {
159 .name = "bfin_cf_pcmcia",
160 .id = -1,
161 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
162 .resource = bfin_pcmcia_cf_resources,
163};
164#endif
165
166#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
167static struct platform_device rtc_device = {
168 .name = "rtc-bfin",
169 .id = -1,
170};
171#endif
172
173#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
174static struct resource smc91x_resources[] = {
175 {
176 .name = "smc91x-regs",
177 .start = 0x20300300,
178 .end = 0x20300300 + 16,
179 .flags = IORESOURCE_MEM,
1f83b8f1 180 }, {
1394f032
BW		 181
182 .start = IRQ_PF7,
183 .end = IRQ_PF7,
184 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
185 },
186};
187static struct platform_device smc91x_device = {
188 .name = "smc91x",
189 .id = 0,
190 .num_resources = ARRAY_SIZE(smc91x_resources),
191 .resource = smc91x_resources,
192};
193#endif
194
f40d24d9
AL		 195#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
196static struct resource dm9000_resources[] = {
197 [0] = {
198 .start = 0x203FB800,
199 .end = 0x203FB800 + 8,
200 .flags = IORESOURCE_MEM,
201 },
202 [1] = {
203 .start = IRQ_PF9,
204 .end = IRQ_PF9,
205 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
206 },
207};
208
209static struct platform_device dm9000_device = {
210 .name = "dm9000",
211 .id = -1,
212 .num_resources = ARRAY_SIZE(dm9000_resources),
213 .resource = dm9000_resources,
214};
215#endif
216
561cc18b
MH		 217#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
218static struct resource ax88180_resources[] = {
219 [0] = {
220 .start = 0x20300000,
221 .end = 0x20300000 + 0x8000,
222 .flags = IORESOURCE_MEM,
223 },
224 [1] = {
225 .start = IRQ_PF7,
226 .end = IRQ_PF7,
227 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
228 },
229};
230
231static struct platform_device ax88180_device = {
232 .name = "ax88180",
233 .id = -1,
234 .num_resources = ARRAY_SIZE(ax88180_resources),
235 .resource = ax88180_resources,
236};
237#endif
238
1394f032
BW		 239#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
240static struct resource sl811_hcd_resources[] = {
241 {
242 .start = 0x20340000,
243 .end = 0x20340000,
244 .flags = IORESOURCE_MEM,
1f83b8f1 245 }, {
1394f032
BW		 246 .start = 0x20340004,
247 .end = 0x20340004,
248 .flags = IORESOURCE_MEM,
1f83b8f1 249 }, {
1394f032
BW		 250 .start = CONFIG_USB_SL811_BFIN_IRQ,
251 .end = CONFIG_USB_SL811_BFIN_IRQ,
252 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
253 },
254};
255
256#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
257void sl811_port_power(struct device *dev, int is_on)
258{
c6c4d7bb 259 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 260 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032
BW		 261}
262#endif
263
264static struct sl811_platform_data sl811_priv = {
265 .potpg = 10,
266 .power = 250, /* == 500mA */
267#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
268 .port_power = &sl811_port_power,
269#endif
270};
271
272static struct platform_device sl811_hcd_device = {
273 .name = "sl811-hcd",
274 .id = 0,
275 .dev = {
276 .platform_data = &sl811_priv,
277 },
278 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
279 .resource = sl811_hcd_resources,
280};
281#endif
282
283#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
284static struct resource isp1362_hcd_resources[] = {
285 {
286 .start = 0x20360000,
287 .end = 0x20360000,
288 .flags = IORESOURCE_MEM,
1f83b8f1 289 }, {
1394f032
BW		 290 .start = 0x20360004,
291 .end = 0x20360004,
292 .flags = IORESOURCE_MEM,
1f83b8f1 293 }, {
1394f032
BW		 294 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
295 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
296 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
297 },
298};
299
300static struct isp1362_platform_data isp1362_priv = {
301 .sel15Kres = 1,
302 .clknotstop = 0,
303 .oc_enable = 0,
304 .int_act_high = 0,
305 .int_edge_triggered = 0,
306 .remote_wakeup_connected = 0,
307 .no_power_switching = 1,
308 .power_switching_mode = 0,
309};
310
311static struct platform_device isp1362_hcd_device = {
312 .name = "isp1362-hcd",
313 .id = 0,
314 .dev = {
315 .platform_data = &isp1362_priv,
316 },
317 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
318 .resource = isp1362_hcd_resources,
319};
320#endif
321
322#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 323static struct platform_device bfin_mii_bus = {
324 .name = "bfin_mii_bus",
325};
326
1394f032
BW		 327static struct platform_device bfin_mac_device = {
328 .name = "bfin_mac",
65319628 329 .dev.platform_data = &bfin_mii_bus,
1394f032
BW		 330};
331#endif
332
333#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
334static struct resource net2272_bfin_resources[] = {
335 {
336 .start = 0x20300000,
337 .end = 0x20300000 + 0x100,
338 .flags = IORESOURCE_MEM,
1f83b8f1 339 }, {
1394f032
BW		 340 .start = IRQ_PF7,
341 .end = IRQ_PF7,
342 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
343 },
344};
345
346static struct platform_device net2272_bfin_device = {
347 .name = "net2272",
348 .id = -1,
349 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
350 .resource = net2272_bfin_resources,
351};
352#endif
353
fc68911e
MF		 354#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
355#ifdef CONFIG_MTD_PARTITIONS
356const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
357
358static struct mtd_partition bfin_plat_nand_partitions[] = {
359 {
aa582977 360 .name = "linux kernel(nand)",
fc68911e
MF		 361 .size = 0x400000,
362 .offset = 0,
363 }, {
aa582977 364 .name = "file system(nand)",
fc68911e
MF		 365 .size = MTDPART_SIZ_FULL,
366 .offset = MTDPART_OFS_APPEND,
367 },
368};
369#endif
370
371#define BFIN_NAND_PLAT_CLE 2
372#define BFIN_NAND_PLAT_ALE 1
373static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
374{
375 struct nand_chip *this = mtd->priv;
376
377 if (cmd == NAND_CMD_NONE)
378 return;
379
380 if (ctrl & NAND_CLE)
381 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
382 else
383 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
384}
385
386#define BFIN_NAND_PLAT_READY GPIO_PF3
387static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
388{
389 return gpio_get_value(BFIN_NAND_PLAT_READY);
390}
391
392static struct platform_nand_data bfin_plat_nand_data = {
393 .chip = {
394 .chip_delay = 30,
395#ifdef CONFIG_MTD_PARTITIONS
396 .part_probe_types = part_probes,
397 .partitions = bfin_plat_nand_partitions,
398 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
399#endif
400 },
401 .ctrl = {
402 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
403 .dev_ready = bfin_plat_nand_dev_ready,
404 },
405};
406
407#define MAX(x, y) (x > y ? x : y)
408static struct resource bfin_plat_nand_resources = {
409 .start = 0x20212000,
410 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
411 .flags = IORESOURCE_IO,
412};
413
414static struct platform_device bfin_async_nand_device = {
415 .name = "gen_nand",
416 .id = -1,
417 .num_resources = 1,
418 .resource = &bfin_plat_nand_resources,
419 .dev = {
420 .platform_data = &bfin_plat_nand_data,
421 },
422};
423
424static void bfin_plat_nand_init(void)
425{
426 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
427}
428#else
429static void bfin_plat_nand_init(void) {}
430#endif
431
793dc27b 432#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2
MF		 433static struct mtd_partition stamp_partitions[] = {
434 {
aa582977 435 .name = "bootloader(nor)",
edf05641 436 .size = 0x40000,
de8c43f2
MF		 437 .offset = 0,
438 }, {
aa582977 439 .name = "linux kernel(nor)",
6ecb5b6d 440 .size = 0x180000,
de8c43f2
MF		 441 .offset = MTDPART_OFS_APPEND,
442 }, {
aa582977 443 .name = "file system(nor)",
6ecb5b6d 444 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
de8c43f2
MF		 445 .offset = MTDPART_OFS_APPEND,
446 }, {
aa582977 447 .name = "MAC Address(nor)",
de8c43f2
MF		 448 .size = MTDPART_SIZ_FULL,
449 .offset = 0x3F0000,
450 .mask_flags = MTD_WRITEABLE,
451 }
452};
453
454static struct physmap_flash_data stamp_flash_data = {
455 .width = 2,
456 .parts = stamp_partitions,
457 .nr_parts = ARRAY_SIZE(stamp_partitions),
458};
459
460static struct resource stamp_flash_resource = {
461 .start = 0x20000000,
462 .end = 0x203fffff,
463 .flags = IORESOURCE_MEM,
464};
465
466static struct platform_device stamp_flash_device = {
467 .name = "physmap-flash",
468 .id = 0,
469 .dev = {
470 .platform_data = &stamp_flash_data,
471 },
472 .num_resources = 1,
473 .resource = &stamp_flash_resource,
474};
793dc27b 475#endif
de8c43f2 476
1394f032
BW		 477#if defined(CONFIG_MTD_M25P80) \
478 || defined(CONFIG_MTD_M25P80_MODULE)
479static struct mtd_partition bfin_spi_flash_partitions[] = {
480 {
aa582977 481 .name = "bootloader(spi)",
edf05641 482 .size = 0x00040000,
1394f032
BW		 483 .offset = 0,
484 .mask_flags = MTD_CAP_ROM
1f83b8f1 485 }, {
aa582977 486 .name = "linux kernel(spi)",
6ecb5b6d 487 .size = 0x180000,
edf05641 488 .offset = MTDPART_OFS_APPEND,
1f83b8f1 489 }, {
aa582977 490 .name = "file system(spi)",
edf05641
MF		 491 .size = MTDPART_SIZ_FULL,
492 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 493 }
494};
495
496static struct flash_platform_data bfin_spi_flash_data = {
497 .name = "m25p80",
498 .parts = bfin_spi_flash_partitions,
499 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
88a8078b 500 /* .type = "m25p64", */
1394f032
BW		 501};
502
503/* SPI flash chip (m25p64) */
504static struct bfin5xx_spi_chip spi_flash_chip_info = {
505 .enable_dma = 0, /* use dma transfer with this chip*/
506 .bits_per_word = 8,
507};
508#endif
509
a261eec0
MF		 510#if defined(CONFIG_BFIN_SPI_ADC) \
511 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 512/* SPI ADC chip */
513static struct bfin5xx_spi_chip spi_adc_chip_info = {
514 .enable_dma = 1, /* use dma transfer with this chip*/
515 .bits_per_word = 16,
516};
517#endif
518
519#if defined(CONFIG_SND_BLACKFIN_AD1836) \
520 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
521static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
522 .enable_dma = 0,
523 .bits_per_word = 16,
524};
525#endif
526
527#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
528static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
529 .enable_dma = 0,
530 .bits_per_word = 16,
531};
532#endif
533
f79ea4cb
YL		 534#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
535#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
536
537static int bfin_mmc_spi_init(struct device *dev,
538 irqreturn_t (*detect_int)(int, void *), void *data)
539{
540 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
541 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
542}
543
544static void bfin_mmc_spi_exit(struct device *dev, void *data)
545{
546 free_irq(MMC_SPI_CARD_DETECT_INT, data);
547}
548
549static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
550 .init = bfin_mmc_spi_init,
551 .exit = bfin_mmc_spi_exit,
552 .detect_delay = 100, /* msecs */
553};
554
555static struct bfin5xx_spi_chip mmc_spi_chip_info = {
556 .enable_dma = 0,
557 .bits_per_word = 8,
558};
559#endif
560
1394f032
BW		 561#if defined(CONFIG_PBX)
562static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
563 .ctl_reg = 0x4, /* send zero */
564 .enable_dma = 0,
565 .bits_per_word = 8,
566 .cs_change_per_word = 1,
567};
568#endif
569
1394f032 570#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
46aa04f9 571#include <linux/spi/ad7877.h>
1394f032 572static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032
BW		 573 .enable_dma = 0,
574 .bits_per_word = 16,
575};
576
577static const struct ad7877_platform_data bfin_ad7877_ts_info = {
578 .model = 7877,
579 .vref_delay_usecs = 50, /* internal, no capacitor */
580 .x_plate_ohms = 419,
581 .y_plate_ohms = 486,
582 .pressure_max = 1000,
583 .pressure_min = 0,
584 .stopacq_polarity = 1,
585 .first_conversion_delay = 3,
586 .acquisition_time = 1,
587 .averaging = 1,
588 .pen_down_acc_interval = 1,
589};
590#endif
591
46aa04f9
MH		 592#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
593#include <linux/spi/ad7879.h>
46aa04f9
MH		 594static const struct ad7879_platform_data bfin_ad7879_ts_info = {
595 .model = 7879, /* Model = AD7879 */
596 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
597 .pressure_max = 10000,
598 .pressure_min = 0,
599 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
600 .acquisition_time = 1, /* 4us acquisition time per sample */
601 .median = 2, /* do 8 measurements */
602 .averaging = 1, /* take the average of 4 middle samples */
603 .pen_down_acc_interval = 255, /* 9.4 ms */
604 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
605 .gpio_default = 1, /* During initialization set GPIO = HIGH */
606};
607#endif
608
ffc4d8bc
MH		 609#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
610#include <linux/input.h>
611#include <linux/spi/adxl34x.h>
612static const struct adxl34x_platform_data adxl34x_info = {
613 .x_axis_offset = 0,
614 .y_axis_offset = 0,
615 .z_axis_offset = 0,
616 .tap_threshold = 0x31,
617 .tap_duration = 0x10,
618 .tap_latency = 0x60,
619 .tap_window = 0xF0,
620 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
621 .act_axis_control = 0xFF,
622 .activity_threshold = 5,
623 .inactivity_threshold = 3,
624 .inactivity_time = 4,
625 .free_fall_threshold = 0x7,
626 .free_fall_time = 0x20,
627 .data_rate = 0x8,
628 .data_range = ADXL_FULL_RES,
629
630 .ev_type = EV_ABS,
631 .ev_code_x = ABS_X, /* EV_REL */
632 .ev_code_y = ABS_Y, /* EV_REL */
633 .ev_code_z = ABS_Z, /* EV_REL */
634
635 .ev_code_tap_x = BTN_TOUCH, /* EV_KEY */
636 .ev_code_tap_y = BTN_TOUCH, /* EV_KEY */
637 .ev_code_tap_z = BTN_TOUCH, /* EV_KEY */
638
639/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
640/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
641 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
642 .fifo_mode = ADXL_FIFO_STREAM,
643};
644#endif
645
f5150155
MH		 646#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
647static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
648 .enable_dma = 0,
649 .bits_per_word = 16,
650};
651#endif
652
6e668936
MH		 653#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
654static struct bfin5xx_spi_chip spidev_chip_info = {
655 .enable_dma = 0,
656 .bits_per_word = 8,
657};
658#endif
659
2043f3f7
MH		 660#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
661static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
662 .enable_dma = 0,
663 .bits_per_word = 8,
664};
665#endif
666
85a192e9
MH		 667#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
668static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
669 .enable_dma = 1,
670 .bits_per_word = 8,
671 .cs_gpio = GPIO_PF10,
672};
673#endif
674
8e9d5c7d
MH		 675#if defined(CONFIG_MTD_DATAFLASH) \
676 || defined(CONFIG_MTD_DATAFLASH_MODULE)
ceac2651
MH		 677
678static struct mtd_partition bfin_spi_dataflash_partitions[] = {
679 {
680 .name = "bootloader(spi)",
681 .size = 0x00040000,
682 .offset = 0,
683 .mask_flags = MTD_CAP_ROM
684 }, {
685 .name = "linux kernel(spi)",
6ecb5b6d 686 .size = 0x180000,
ceac2651
MH		 687 .offset = MTDPART_OFS_APPEND,
688 }, {
689 .name = "file system(spi)",
690 .size = MTDPART_SIZ_FULL,
691 .offset = MTDPART_OFS_APPEND,
692 }
693};
694
695static struct flash_platform_data bfin_spi_dataflash_data = {
696 .name = "SPI Dataflash",
697 .parts = bfin_spi_dataflash_partitions,
698 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
699};
700
8e9d5c7d
MH		 701/* DataFlash chip */
702static struct bfin5xx_spi_chip data_flash_chip_info = {
703 .enable_dma = 0, /* use dma transfer with this chip*/
704 .bits_per_word = 8,
705};
706#endif
707
1394f032
BW		 708static struct spi_board_info bfin_spi_board_info[] __initdata = {
709#if defined(CONFIG_MTD_M25P80) \
710 || defined(CONFIG_MTD_M25P80_MODULE)
711 {
712 /* the modalias must be the same as spi device driver name */
713 .modalias = "m25p80", /* Name of spi_driver for this device */
714 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 715 .bus_num = 0, /* Framework bus number */
1394f032
BW		 716 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
717 .platform_data = &bfin_spi_flash_data,
718 .controller_data = &spi_flash_chip_info,
719 .mode = SPI_MODE_3,
720 },
721#endif
8e9d5c7d
MH		 722#if defined(CONFIG_MTD_DATAFLASH) \
723 || defined(CONFIG_MTD_DATAFLASH_MODULE)
724 { /* DataFlash chip */
725 .modalias = "mtd_dataflash",
ceac2651 726 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
8e9d5c7d
MH		 727 .bus_num = 0, /* Framework bus number */
728 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
ceac2651 729 .platform_data = &bfin_spi_dataflash_data,
8e9d5c7d
MH		 730 .controller_data = &data_flash_chip_info,
731 .mode = SPI_MODE_3,
732 },
733#endif
a261eec0
MF		 734#if defined(CONFIG_BFIN_SPI_ADC) \
735 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 736 {
737 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
738 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 739 .bus_num = 0, /* Framework bus number */
1394f032
BW		 740 .chip_select = 1, /* Framework chip select. */
741 .platform_data = NULL, /* No spi_driver specific config */
742 .controller_data = &spi_adc_chip_info,
743 },
744#endif
745
746#if defined(CONFIG_SND_BLACKFIN_AD1836) \
747 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
748 {
749 .modalias = "ad1836-spi",
750 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 751 .bus_num = 0,
1394f032
BW		 752 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
753 .controller_data = &ad1836_spi_chip_info,
754 },
755#endif
756#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
757 {
758 .modalias = "ad9960-spi",
759 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 760 .bus_num = 0,
1394f032
BW		 761 .chip_select = 1,
762 .controller_data = &ad9960_spi_chip_info,
763 },
764#endif
f79ea4cb
YL		 765#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
766 {
767 .modalias = "mmc_spi",
768 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
769 .bus_num = 0,
770 .chip_select = 4,
771 .platform_data = &bfin_mmc_spi_pdata,
772 .controller_data = &mmc_spi_chip_info,
773 .mode = SPI_MODE_3,
774 },
775#endif
1394f032
BW		 776#if defined(CONFIG_PBX)
777 {
1f83b8f1
MF		 778 .modalias = "fxs-spi",
779 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb
BW		 780 .bus_num = 0,
781 .chip_select = 8 - CONFIG_J11_JUMPER,
1f83b8f1 782 .controller_data = &spi_si3xxx_chip_info,
1394f032
BW		 783 .mode = SPI_MODE_3,
784 },
785 {
1f83b8f1
MF		 786 .modalias = "fxo-spi",
787 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb
BW		 788 .bus_num = 0,
789 .chip_select = 8 - CONFIG_J19_JUMPER,
1f83b8f1 790 .controller_data = &spi_si3xxx_chip_info,
1394f032
BW		 791 .mode = SPI_MODE_3,
792 },
793#endif
1394f032
BW		 794#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
795 {
796 .modalias = "ad7877",
797 .platform_data = &bfin_ad7877_ts_info,
798 .irq = IRQ_PF6,
799 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 800 .bus_num = 0,
1394f032
BW		 801 .chip_select = 1,
802 .controller_data = &spi_ad7877_chip_info,
803 },
804#endif
f5150155 805#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
46aa04f9
MH		 806 {
807 .modalias = "ad7879",
808 .platform_data = &bfin_ad7879_ts_info,
809 .irq = IRQ_PF7,
810 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
811 .bus_num = 0,
812 .chip_select = 1,
813 .controller_data = &spi_ad7879_chip_info,
814 .mode = SPI_CPHA | SPI_CPOL,
815 },
816#endif
6e668936
MH		 817#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
818 {
819 .modalias = "spidev",
820 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
821 .bus_num = 0,
822 .chip_select = 1,
823 .controller_data = &spidev_chip_info,
824 },
825#endif
2043f3f7
MH		 826#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
827 {
828 .modalias = "bfin-lq035q1-spi",
829 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
830 .bus_num = 0,
46aa04f9 831 .chip_select = 2,
2043f3f7
MH		 832 .controller_data = &lq035q1_spi_chip_info,
833 .mode = SPI_CPHA | SPI_CPOL,
834 },
835#endif
85a192e9
MH		 836#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
837 {
838 .modalias = "enc28j60",
839 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
840 .irq = IRQ_PF6,
841 .bus_num = 0,
842 .chip_select = 0, /* GPIO controlled SSEL */
843 .controller_data = &enc28j60_spi_chip_info,
844 .mode = SPI_MODE_0,
845 },
846#endif
1394f032
BW		 847};
848
5bda2723 849#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1394f032 850/* SPI controller data */
c6c4d7bb 851static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 852 .num_chipselect = 8,
853 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 854 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 855};
856
c6c4d7bb
BW		 857/* SPI (0) */
858static struct resource bfin_spi0_resource[] = {
859 [0] = {
860 .start = SPI0_REGBASE,
861 .end = SPI0_REGBASE + 0xFF,
862 .flags = IORESOURCE_MEM,
863 },
864 [1] = {
865 .start = CH_SPI,
866 .end = CH_SPI,
867 .flags = IORESOURCE_IRQ,
868 },
869};
870
871static struct platform_device bfin_spi0_device = {
872 .name = "bfin-spi",
873 .id = 0, /* Bus number */
874 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
875 .resource = bfin_spi0_resource,
1394f032 876 .dev = {
c6c4d7bb 877 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 878 },
879};
880#endif /* spi master and devices */
881
1e9aa955
CC		 882#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
883
884/* SPORT SPI controller data */
885static struct bfin5xx_spi_master bfin_sport_spi0_info = {
886 .num_chipselect = 1, /* master only supports one device */
887 .enable_dma = 0, /* master don't support DMA */
888 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
889 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
890};
891
892static struct resource bfin_sport_spi0_resource[] = {
893 [0] = {
894 .start = SPORT0_TCR1,
895 .end = SPORT0_TCR1 + 0xFF,
896 .flags = IORESOURCE_MEM,
897 },
898 [1] = {
899 .start = IRQ_SPORT0_ERROR,
900 .end = IRQ_SPORT0_ERROR,
901 .flags = IORESOURCE_IRQ,
902 },
903};
904
905static struct platform_device bfin_sport_spi0_device = {
906 .name = "bfin-sport-spi",
907 .id = 1, /* Bus number */
908 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
909 .resource = bfin_sport_spi0_resource,
910 .dev = {
911 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
912 },
913};
914
915static struct bfin5xx_spi_master bfin_sport_spi1_info = {
916 .num_chipselect = 1, /* master only supports one device */
917 .enable_dma = 0, /* master don't support DMA */
918 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
919 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
920};
921
922static struct resource bfin_sport_spi1_resource[] = {
923 [0] = {
924 .start = SPORT1_TCR1,
925 .end = SPORT1_TCR1 + 0xFF,
926 .flags = IORESOURCE_MEM,
927 },
928 [1] = {
929 .start = IRQ_SPORT1_ERROR,
930 .end = IRQ_SPORT1_ERROR,
931 .flags = IORESOURCE_IRQ,
932 },
933};
934
935static struct platform_device bfin_sport_spi1_device = {
936 .name = "bfin-sport-spi",
937 .id = 2, /* Bus number */
938 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
939 .resource = bfin_sport_spi1_resource,
940 .dev = {
941 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
942 },
943};
944
945#endif /* sport spi master and devices */
946
1394f032
BW		 947#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
948static struct platform_device bfin_fb_device = {
c6c4d7bb
BW		 949 .name = "bf537-lq035",
950};
951#endif
952
953#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
954static struct platform_device bfin_fb_adv7393_device = {
955 .name = "bfin-adv7393",
1394f032
BW		 956};
957#endif
958
2043f3f7
MH		 959#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
960#include <asm/bfin-lq035q1.h>
961
962static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
963 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
46aa04f9 964 .use_bl = 0, /* let something else control the LCD Blacklight */
2043f3f7
MH		 965 .gpio_bl = GPIO_PF7,
966};
967
968static struct resource bfin_lq035q1_resources[] = {
969 {
970 .start = IRQ_PPI_ERROR,
971 .end = IRQ_PPI_ERROR,
972 .flags = IORESOURCE_IRQ,
973 },
974};
975
976static struct platform_device bfin_lq035q1_device = {
977 .name = "bfin-lq035q1",
978 .id = -1,
979 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
980 .resource = bfin_lq035q1_resources,
981 .dev = {
982 .platform_data = &bfin_lq035q1_data,
983 },
984};
985#endif
986
1394f032
BW		 987#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
988static struct resource bfin_uart_resources[] = {
233b28a9 989#ifdef CONFIG_SERIAL_BFIN_UART0
1394f032
BW		 990 {
991 .start = 0xFFC00400,
992 .end = 0xFFC004FF,
993 .flags = IORESOURCE_MEM,
233b28a9
SZ		 994 },
995#endif
996#ifdef CONFIG_SERIAL_BFIN_UART1
997 {
1394f032
BW		 998 .start = 0xFFC02000,
999 .end = 0xFFC020FF,
1000 .flags = IORESOURCE_MEM,
1001 },
233b28a9 1002#endif
1394f032
BW		 1003};
1004
1005static struct platform_device bfin_uart_device = {
1006 .name = "bfin-uart",
1007 .id = 1,
1008 .num_resources = ARRAY_SIZE(bfin_uart_resources),
1009 .resource = bfin_uart_resources,
1010};
1011#endif
1012
5be36d22 1013#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 1014#ifdef CONFIG_BFIN_SIR0
42bd8bcb 1015static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 1016 {
1017 .start = 0xFFC00400,
1018 .end = 0xFFC004FF,
1019 .flags = IORESOURCE_MEM,
1020 },
42bd8bcb
GY		 1021 {
1022 .start = IRQ_UART0_RX,
1023 .end = IRQ_UART0_RX+1,
1024 .flags = IORESOURCE_IRQ,
1025 },
1026 {
1027 .start = CH_UART0_RX,
1028 .end = CH_UART0_RX+1,
1029 .flags = IORESOURCE_DMA,
1030 },
1031};
1032
1033static struct platform_device bfin_sir0_device = {
1034 .name = "bfin_sir",
1035 .id = 0,
1036 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1037 .resource = bfin_sir0_resources,
1038};
5be36d22
GY		 1039#endif
1040#ifdef CONFIG_BFIN_SIR1
42bd8bcb 1041static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 1042 {
1043 .start = 0xFFC02000,
1044 .end = 0xFFC020FF,
1045 .flags = IORESOURCE_MEM,
1046 },
42bd8bcb
GY		 1047 {
1048 .start = IRQ_UART1_RX,
1049 .end = IRQ_UART1_RX+1,
1050 .flags = IORESOURCE_IRQ,
1051 },
1052 {
1053 .start = CH_UART1_RX,
1054 .end = CH_UART1_RX+1,
1055 .flags = IORESOURCE_DMA,
1056 },
5be36d22
GY		 1057};
1058
42bd8bcb 1059static struct platform_device bfin_sir1_device = {
5be36d22 1060 .name = "bfin_sir",
42bd8bcb
GY		 1061 .id = 1,
1062 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1063 .resource = bfin_sir1_resources,
5be36d22
GY		 1064};
1065#endif
42bd8bcb 1066#endif
5be36d22 1067
1394f032 1068#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW		 1069static struct resource bfin_twi0_resource[] = {
1070 [0] = {
1071 .start = TWI0_REGBASE,
1072 .end = TWI0_REGBASE,
1073 .flags = IORESOURCE_MEM,
1074 },
1075 [1] = {
1076 .start = IRQ_TWI,
1077 .end = IRQ_TWI,
1078 .flags = IORESOURCE_IRQ,
1079 },
1080};
1081
1394f032
BW		 1082static struct platform_device i2c_bfin_twi_device = {
1083 .name = "i2c-bfin-twi",
1084 .id = 0,
c6c4d7bb
BW		 1085 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1086 .resource = bfin_twi0_resource,
1394f032
BW		 1087};
1088#endif
1089
51ed9ad7
MH		 1090#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1091#include <linux/input.h>
1092#include <linux/i2c/adp5588_keys.h>
1093static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1094 [0] = KEY_GRAVE,
1095 [1] = KEY_1,
1096 [2] = KEY_2,
1097 [3] = KEY_3,
1098 [4] = KEY_4,
1099 [5] = KEY_5,
1100 [6] = KEY_6,
1101 [7] = KEY_7,
1102 [8] = KEY_8,
1103 [9] = KEY_9,
1104 [10] = KEY_0,
1105 [11] = KEY_MINUS,
1106 [12] = KEY_EQUAL,
1107 [13] = KEY_BACKSLASH,
1108 [15] = KEY_KP0,
1109 [16] = KEY_Q,
1110 [17] = KEY_W,
1111 [18] = KEY_E,
1112 [19] = KEY_R,
1113 [20] = KEY_T,
1114 [21] = KEY_Y,
1115 [22] = KEY_U,
1116 [23] = KEY_I,
1117 [24] = KEY_O,
1118 [25] = KEY_P,
1119 [26] = KEY_LEFTBRACE,
1120 [27] = KEY_RIGHTBRACE,
1121 [29] = KEY_KP1,
1122 [30] = KEY_KP2,
1123 [31] = KEY_KP3,
1124 [32] = KEY_A,
1125 [33] = KEY_S,
1126 [34] = KEY_D,
1127 [35] = KEY_F,
1128 [36] = KEY_G,
1129 [37] = KEY_H,
1130 [38] = KEY_J,
1131 [39] = KEY_K,
1132 [40] = KEY_L,
1133 [41] = KEY_SEMICOLON,
1134 [42] = KEY_APOSTROPHE,
1135 [43] = KEY_BACKSLASH,
1136 [45] = KEY_KP4,
1137 [46] = KEY_KP5,
1138 [47] = KEY_KP6,
1139 [48] = KEY_102ND,
1140 [49] = KEY_Z,
1141 [50] = KEY_X,
1142 [51] = KEY_C,
1143 [52] = KEY_V,
1144 [53] = KEY_B,
1145 [54] = KEY_N,
1146 [55] = KEY_M,
1147 [56] = KEY_COMMA,
1148 [57] = KEY_DOT,
1149 [58] = KEY_SLASH,
1150 [60] = KEY_KPDOT,
1151 [61] = KEY_KP7,
1152 [62] = KEY_KP8,
1153 [63] = KEY_KP9,
1154 [64] = KEY_SPACE,
1155 [65] = KEY_BACKSPACE,
1156 [66] = KEY_TAB,
1157 [67] = KEY_KPENTER,
1158 [68] = KEY_ENTER,
1159 [69] = KEY_ESC,
1160 [70] = KEY_DELETE,
1161 [74] = KEY_KPMINUS,
1162 [76] = KEY_UP,
1163 [77] = KEY_DOWN,
1164 [78] = KEY_RIGHT,
1165 [79] = KEY_LEFT,
1166};
1167
1168static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1169 .rows = 8,
1170 .cols = 10,
1171 .keymap = adp5588_keymap,
1172 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1173 .repeat = 0,
1174};
1175#endif
1176
3ea57218
MH		 1177#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1178#include <linux/mfd/adp5520.h>
1179
1180 /*
1181 * ADP5520/5501 Backlight Data
1182 */
1183
1184static struct adp5520_backlight_platfrom_data adp5520_backlight_data = {
1185 .fade_in = FADE_T_1200ms,
1186 .fade_out = FADE_T_1200ms,
1187 .fade_led_law = BL_LAW_LINEAR,
1188 .en_ambl_sens = 1,
1189 .abml_filt = BL_AMBL_FILT_640ms,
1190 .l1_daylight_max = BL_CUR_mA(15),
1191 .l1_daylight_dim = BL_CUR_mA(0),
1192 .l2_office_max = BL_CUR_mA(7),
1193 .l2_office_dim = BL_CUR_mA(0),
1194 .l3_dark_max = BL_CUR_mA(3),
1195 .l3_dark_dim = BL_CUR_mA(0),
1196 .l2_trip = L2_COMP_CURR_uA(700),
1197 .l2_hyst = L2_COMP_CURR_uA(50),
1198 .l3_trip = L3_COMP_CURR_uA(80),
1199 .l3_hyst = L3_COMP_CURR_uA(20),
1200};
1201
1202 /*
1203 * ADP5520/5501 LEDs Data
1204 */
1205
1206#include <linux/leds.h>
1207
1208static struct led_info adp5520_leds[] = {
1209 {
1210 .name = "adp5520-led1",
1211 .default_trigger = "none",
1212 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | LED_OFFT_600ms,
1213 },
1214#ifdef ADP5520_EN_ALL_LEDS
1215 {
1216 .name = "adp5520-led2",
1217 .default_trigger = "none",
1218 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1219 },
1220 {
1221 .name = "adp5520-led3",
1222 .default_trigger = "none",
1223 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1224 },
1225#endif
1226};
1227
1228static struct adp5520_leds_platfrom_data adp5520_leds_data = {
1229 .num_leds = ARRAY_SIZE(adp5520_leds),
1230 .leds = adp5520_leds,
1231 .fade_in = FADE_T_600ms,
1232 .fade_out = FADE_T_600ms,
1233 .led_on_time = LED_ONT_600ms,
1234};
1235
1236 /*
1237 * ADP5520 GPIO Data
1238 */
1239
1240static struct adp5520_gpio_platfrom_data adp5520_gpio_data = {
1241 .gpio_start = 50,
1242 .gpio_en_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
1243 .gpio_pullup_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
1244};
1245
1246 /*
1247 * ADP5520 Keypad Data
1248 */
1249
1250#include <linux/input.h>
1251static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1252 [KEY(0, 0)] = KEY_GRAVE,
1253 [KEY(0, 1)] = KEY_1,
1254 [KEY(0, 2)] = KEY_2,
1255 [KEY(0, 3)] = KEY_3,
1256 [KEY(1, 0)] = KEY_4,
1257 [KEY(1, 1)] = KEY_5,
1258 [KEY(1, 2)] = KEY_6,
1259 [KEY(1, 3)] = KEY_7,
1260 [KEY(2, 0)] = KEY_8,
1261 [KEY(2, 1)] = KEY_9,
1262 [KEY(2, 2)] = KEY_0,
1263 [KEY(2, 3)] = KEY_MINUS,
1264 [KEY(3, 0)] = KEY_EQUAL,
1265 [KEY(3, 1)] = KEY_BACKSLASH,
1266 [KEY(3, 2)] = KEY_BACKSPACE,
1267 [KEY(3, 3)] = KEY_ENTER,
1268};
1269
1270static struct adp5520_keys_platfrom_data adp5520_keys_data = {
1271 .rows_en_mask = ROW_R3 | ROW_R2 | ROW_R1 | ROW_R0,
1272 .cols_en_mask = COL_C3 | COL_C2 | COL_C1 | COL_C0,
1273 .keymap = adp5520_keymap,
1274 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1275 .repeat = 0,
1276};
1277
1278 /*
1279 * ADP5520/5501 Multifuction Device Init Data
1280 */
1281
1282static struct adp5520_subdev_info adp5520_subdevs[] = {
1283 {
1284 .name = "adp5520-backlight",
1285 .id = ID_ADP5520,
1286 .platform_data = &adp5520_backlight_data,
1287 },
1288 {
1289 .name = "adp5520-led",
1290 .id = ID_ADP5520,
1291 .platform_data = &adp5520_leds_data,
1292 },
1293 {
1294 .name = "adp5520-gpio",
1295 .id = ID_ADP5520,
1296 .platform_data = &adp5520_gpio_data,
1297 },
1298 {
1299 .name = "adp5520-keys",
1300 .id = ID_ADP5520,
1301 .platform_data = &adp5520_keys_data,
1302 },
1303};
1304
1305static struct adp5520_platform_data adp5520_pdev_data = {
1306 .num_subdevs = ARRAY_SIZE(adp5520_subdevs),
1307 .subdevs = adp5520_subdevs,
1308};
1309
1310#endif
1311
81d9c7f2
BW		 1312static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
1313#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
1314 {
1315 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
4c94c3e0 1316 .irq = IRQ_PG5,
81d9c7f2
BW		 1317 },
1318#endif
ebd58333 1319#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 1320 {
1321 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 1322 },
1323#endif
1324#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
1325 {
1326 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
f5150155
MH		 1327 .irq = IRQ_PG6,
1328 },
1329#endif
1330#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1331 {
1332 I2C_BOARD_INFO("ad7879", 0x2F),
1333 .irq = IRQ_PG5,
1334 .platform_data = (void *)&bfin_ad7879_ts_info,
81d9c7f2
BW		 1335 },
1336#endif
51ed9ad7
MH		 1337#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1338 {
1339 I2C_BOARD_INFO("adp5588-keys", 0x34),
1340 .irq = IRQ_PG0,
1341 .platform_data = (void *)&adp5588_kpad_data,
1342 },
1343#endif
3ea57218
MH		 1344#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1345 {
1346 I2C_BOARD_INFO("pmic-adp5520", 0x32),
4f84b6e0 1347 .irq = IRQ_PG0,
3ea57218
MH		 1348 .platform_data = (void *)&adp5520_pdev_data,
1349 },
1350#endif
ffc4d8bc
MH		 1351#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1352 {
1353 I2C_BOARD_INFO("adxl34x", 0x53),
1354 .irq = IRQ_PG3,
1355 .platform_data = (void *)&adxl34x_info,
1356 },
1357#endif
81d9c7f2 1358};
81d9c7f2 1359
1394f032
BW		 1360#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1361static struct platform_device bfin_sport0_uart_device = {
1362 .name = "bfin-sport-uart",
1363 .id = 0,
1364};
1365
1366static struct platform_device bfin_sport1_uart_device = {
1367 .name = "bfin-sport-uart",
1368 .id = 1,
1369};
1370#endif
1371
c6c4d7bb 1372#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2c8beb2c
MH		 1373#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1374/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
c6c4d7bb 1375
2c8beb2c
MH		 1376#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1377#define PATA_INT IRQ_PF5
c6c4d7bb
BW		 1378static struct pata_platform_info bfin_pata_platform_data = {
1379 .ioport_shift = 1,
64e5c512 1380 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW		 1381};
1382
1383static struct resource bfin_pata_resources[] = {
1384 {
1385 .start = 0x20314020,
1386 .end = 0x2031403F,
1387 .flags = IORESOURCE_MEM,
1388 },
1389 {
1390 .start = 0x2031401C,
1391 .end = 0x2031401F,
1392 .flags = IORESOURCE_MEM,
1393 },
1394 {
1395 .start = PATA_INT,
1396 .end = PATA_INT,
1397 .flags = IORESOURCE_IRQ,
1398 },
1399};
2c8beb2c
MH		 1400#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
1401static struct pata_platform_info bfin_pata_platform_data = {
1402 .ioport_shift = 0,
1403};
648882d9
MH		 1404/* CompactFlash Storage Card Memory Mapped Adressing
1405 * /REG = A11 = 1
1406 */
2c8beb2c
MH		 1407static struct resource bfin_pata_resources[] = {
1408 {
648882d9
MH		 1409 .start = 0x20211800,
1410 .end = 0x20211807,
2c8beb2c
MH		 1411 .flags = IORESOURCE_MEM,
1412 },
1413 {
648882d9
MH		 1414 .start = 0x2021180E, /* Device Ctl */
1415 .end = 0x2021180E,
2c8beb2c
MH		 1416 .flags = IORESOURCE_MEM,
1417 },
1418};
1419#endif
c6c4d7bb
BW		 1420
1421static struct platform_device bfin_pata_device = {
1422 .name = "pata_platform",
1423 .id = -1,
1424 .num_resources = ARRAY_SIZE(bfin_pata_resources),
1425 .resource = bfin_pata_resources,
1426 .dev = {
1427 .platform_data = &bfin_pata_platform_data,
1428 }
1429};
1430#endif
1431
14b03204
MH		 1432static const unsigned int cclk_vlev_datasheet[] =
1433{
1434 VRPAIR(VLEV_085, 250000000),
1435 VRPAIR(VLEV_090, 376000000),
1436 VRPAIR(VLEV_095, 426000000),
1437 VRPAIR(VLEV_100, 426000000),
1438 VRPAIR(VLEV_105, 476000000),
1439 VRPAIR(VLEV_110, 476000000),
1440 VRPAIR(VLEV_115, 476000000),
1441 VRPAIR(VLEV_120, 500000000),
1442 VRPAIR(VLEV_125, 533000000),
1443 VRPAIR(VLEV_130, 600000000),
1444};
1445
1446static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1447 .tuple_tab = cclk_vlev_datasheet,
1448 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1449 .vr_settling_time = 25 /* us */,
1450};
1451
1452static struct platform_device bfin_dpmc = {
1453 .name = "bfin dpmc",
1454 .dev = {
1455 .platform_data = &bfin_dmpc_vreg_data,
1456 },
1457};
1458
1394f032 1459static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1460
1461 &bfin_dpmc,
1462
1394f032
BW		 1463#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1464 &bfin_pcmcia_cf_device,
1465#endif
1466
1467#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1468 &rtc_device,
1469#endif
1470
1471#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
1472 &sl811_hcd_device,
1473#endif
1474
1475#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
1476 &isp1362_hcd_device,
1477#endif
1478
3f375690
MH		 1479#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1480 &bfin_isp1760_device,
1481#endif
1482
1394f032
BW		 1483#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1484 &smc91x_device,
1485#endif
1486
f40d24d9
AL		 1487#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1488 &dm9000_device,
1489#endif
1490
561cc18b
MH		 1491#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
1492 &ax88180_device,
1493#endif
1494
1394f032 1495#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1496 &bfin_mii_bus,
1394f032
BW		 1497 &bfin_mac_device,
1498#endif
1499
1500#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1501 &net2272_bfin_device,
1502#endif
1503
1504#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 1505 &bfin_spi0_device,
1394f032
BW		 1506#endif
1507
1e9aa955
CC		 1508#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1509 &bfin_sport_spi0_device,
1510 &bfin_sport_spi1_device,
1511#endif
1512
1394f032
BW		 1513#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1514 &bfin_fb_device,
1515#endif
1516
2043f3f7
MH		 1517#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1518 &bfin_lq035q1_device,
1519#endif
1520
c6c4d7bb
BW		 1521#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1522 &bfin_fb_adv7393_device,
1523#endif
1524
1394f032
BW		 1525#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1526 &bfin_uart_device,
1527#endif
1528
5be36d22 1529#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1530#ifdef CONFIG_BFIN_SIR0
1531 &bfin_sir0_device,
1532#endif
1533#ifdef CONFIG_BFIN_SIR1
1534 &bfin_sir1_device,
1535#endif
5be36d22
GY		 1536#endif
1537
1394f032
BW		 1538#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1539 &i2c_bfin_twi_device,
1540#endif
1541
1542#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1543 &bfin_sport0_uart_device,
1544 &bfin_sport1_uart_device,
1545#endif
c6c4d7bb
BW		 1546
1547#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1548 &bfin_pata_device,
1549#endif
2463ef22
MH		 1550
1551#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1552 &bfin_device_gpiokeys,
1553#endif
cad2ab65
MF		 1554
1555 &bfin_gpios_device,
793dc27b 1556
fc68911e
MF		 1557#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
1558 &bfin_async_nand_device,
1559#endif
1560
793dc27b 1561#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 1562 &stamp_flash_device,
793dc27b 1563#endif
1394f032
BW		 1564};
1565
1566static int __init stamp_init(void)
1567{
b85d858b 1568 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2
BW		 1569 i2c_register_board_info(0, bfin_i2c_board_info,
1570 ARRAY_SIZE(bfin_i2c_board_info));
fc68911e 1571 bfin_plat_nand_init();
1394f032 1572 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1573 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 1574
648882d9
MH		 1575#if (defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)) \
1576 && defined(PATA_INT)
c6c4d7bb
BW		 1577 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
1578#endif
81d9c7f2 1579
1394f032
BW		 1580 return 0;
1581}
1582
1583arch_initcall(stamp_init);
c6c4d7bb
BW		 1584
1585void native_machine_restart(char *cmd)
1586{
1587 /* workaround reboot hang when booting from SPI */
1588 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1589 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
c6c4d7bb 1590}
137b1529
MF		 1591
1592/*
1593 * Currently the MAC address is saved in Flash by U-Boot
1594 */
1595#define FLASH_MAC 0x203f0000
9862cc52 1596void bfin_get_ether_addr(char *addr)
137b1529
MF		 1597{
1598 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
1599 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
1600}
9862cc52 1601EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
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