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Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux...
[deliverable/linux.git] / arch / blackfin / mach-bf537 / boards / tcm_bf537.c
CommitLineData
b9da3b92
MF		 1/*
2 * File: arch/blackfin/mach-bf537/boards/tcm_bf537.c
3 * Based on: arch/blackfin/mach-bf533/boards/cm_bf537.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created: 2005
7 * Description: Board description file
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/etherdevice.h>
33#include <linux/platform_device.h>
34#include <linux/mtd/mtd.h>
35#include <linux/mtd/partitions.h>
36#include <linux/mtd/physmap.h>
37#include <linux/spi/spi.h>
38#include <linux/spi/flash.h>
39#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
40#include <linux/usb/isp1362.h>
41#endif
42#include <linux/ata_platform.h>
43#include <linux/irq.h>
44#include <asm/dma.h>
45#include <asm/bfin5xx_spi.h>
46#include <asm/portmux.h>
47#include <asm/dpmc.h>
9c21453e 48#include <linux/spi/mmc_spi.h>
b9da3b92
MF		 49
50/*
51 * Name the Board for the /proc/cpuinfo
52 */
53const char bfin_board_name[] = "Bluetechnix TCM BF537";
54
55#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
56/* all SPI peripherals info goes here */
57
58#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
59static struct mtd_partition bfin_spi_flash_partitions[] = {
60 {
61 .name = "bootloader(spi)",
62 .size = 0x00020000,
63 .offset = 0,
64 .mask_flags = MTD_CAP_ROM
65 }, {
66 .name = "linux kernel(spi)",
67 .size = 0xe0000,
68 .offset = 0x20000
69 }, {
70 .name = "file system(spi)",
71 .size = 0x700000,
72 .offset = 0x00100000,
73 }
74};
75
76static struct flash_platform_data bfin_spi_flash_data = {
77 .name = "m25p80",
78 .parts = bfin_spi_flash_partitions,
79 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
80 .type = "m25p64",
81};
82
83/* SPI flash chip (m25p64) */
84static struct bfin5xx_spi_chip spi_flash_chip_info = {
85 .enable_dma = 0, /* use dma transfer with this chip*/
86 .bits_per_word = 8,
87};
88#endif
89
a261eec0 90#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
b9da3b92
MF		 91/* SPI ADC chip */
92static struct bfin5xx_spi_chip spi_adc_chip_info = {
93 .enable_dma = 1, /* use dma transfer with this chip*/
94 .bits_per_word = 16,
95};
96#endif
97
98#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
99static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
100 .enable_dma = 0,
101 .bits_per_word = 16,
102};
103#endif
104
f3f704d3
MH		 105#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
106static struct bfin5xx_spi_chip mmc_spi_chip_info = {
107 .enable_dma = 0,
b9da3b92
MF		 108 .bits_per_word = 8,
109};
110#endif
111
112static struct spi_board_info bfin_spi_board_info[] __initdata = {
113#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
114 {
115 /* the modalias must be the same as spi device driver name */
116 .modalias = "m25p80", /* Name of spi_driver for this device */
117 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
118 .bus_num = 0, /* Framework bus number */
119 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
120 .platform_data = &bfin_spi_flash_data,
121 .controller_data = &spi_flash_chip_info,
122 .mode = SPI_MODE_3,
123 },
124#endif
125
a261eec0 126#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
b9da3b92
MF		 127 {
128 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
129 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
130 .bus_num = 0, /* Framework bus number */
131 .chip_select = 1, /* Framework chip select. */
132 .platform_data = NULL, /* No spi_driver specific config */
133 .controller_data = &spi_adc_chip_info,
134 },
135#endif
136
137#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
138 {
dac98174 139 .modalias = "ad1836",
b9da3b92
MF		 140 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
141 .bus_num = 0,
142 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
143 .controller_data = &ad1836_spi_chip_info,
144 },
145#endif
146
f3f704d3 147#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
b9da3b92 148 {
f3f704d3 149 .modalias = "mmc_spi",
b9da3b92
MF		 150 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
151 .bus_num = 0,
9c21453e 152 .chip_select = 1,
f3f704d3 153 .controller_data = &mmc_spi_chip_info,
b9da3b92
MF		 154 .mode = SPI_MODE_3,
155 },
156#endif
157};
158
159/* SPI (0) */
160static struct resource bfin_spi0_resource[] = {
161 [0] = {
162 .start = SPI0_REGBASE,
163 .end = SPI0_REGBASE + 0xFF,
164 .flags = IORESOURCE_MEM,
165 },
166 [1] = {
167 .start = CH_SPI,
168 .end = CH_SPI,
53122693
YL		 169 .flags = IORESOURCE_DMA,
170 },
171 [2] = {
172 .start = IRQ_SPI,
173 .end = IRQ_SPI,
b9da3b92
MF		 174 .flags = IORESOURCE_IRQ,
175 }
176};
177
178/* SPI controller data */
179static struct bfin5xx_spi_master bfin_spi0_info = {
180 .num_chipselect = 8,
181 .enable_dma = 1, /* master has the ability to do dma transfer */
182 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
183};
184
185static struct platform_device bfin_spi0_device = {
186 .name = "bfin-spi",
187 .id = 0, /* Bus number */
188 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
189 .resource = bfin_spi0_resource,
190 .dev = {
191 .platform_data = &bfin_spi0_info, /* Passed to driver */
192 },
193};
194#endif /* spi master and devices */
195
196#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
197static struct platform_device rtc_device = {
198 .name = "rtc-bfin",
199 .id = -1,
200};
201#endif
202
203#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
204static struct platform_device hitachi_fb_device = {
205 .name = "hitachi-tx09",
206};
207#endif
208
209#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 210#include <linux/smc91x.h>
211
212static struct smc91x_platdata smc91x_info = {
213 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
214 .leda = RPC_LED_100_10,
215 .ledb = RPC_LED_TX_RX,
216};
217
b9da3b92
MF		 218static struct resource smc91x_resources[] = {
219 {
220 .start = 0x20200300,
221 .end = 0x20200300 + 16,
222 .flags = IORESOURCE_MEM,
223 }, {
224 .start = IRQ_PF14,
225 .end = IRQ_PF14,
226 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
227 },
228};
229
230static struct platform_device smc91x_device = {
231 .name = "smc91x",
232 .id = 0,
233 .num_resources = ARRAY_SIZE(smc91x_resources),
234 .resource = smc91x_resources,
61f09b5a
MH		 235 .dev = {
236 .platform_data = &smc91x_info,
237 },
b9da3b92
MF		 238};
239#endif
240
241#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
242static struct resource isp1362_hcd_resources[] = {
243 {
244 .start = 0x20308000,
245 .end = 0x20308000,
246 .flags = IORESOURCE_MEM,
247 }, {
248 .start = 0x20308004,
249 .end = 0x20308004,
250 .flags = IORESOURCE_MEM,
251 }, {
252 .start = IRQ_PG15,
253 .end = IRQ_PG15,
254 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
255 },
256};
257
258static struct isp1362_platform_data isp1362_priv = {
259 .sel15Kres = 1,
260 .clknotstop = 0,
261 .oc_enable = 0,
262 .int_act_high = 0,
263 .int_edge_triggered = 0,
264 .remote_wakeup_connected = 0,
265 .no_power_switching = 1,
266 .power_switching_mode = 0,
267};
268
269static struct platform_device isp1362_hcd_device = {
270 .name = "isp1362-hcd",
271 .id = 0,
272 .dev = {
273 .platform_data = &isp1362_priv,
274 },
275 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
276 .resource = isp1362_hcd_resources,
277};
278#endif
279
280#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
281static struct resource net2272_bfin_resources[] = {
282 {
9c21453e
HK		 283 .start = 0x20300000,
284 .end = 0x20300000 + 0x100,
b9da3b92
MF		 285 .flags = IORESOURCE_MEM,
286 }, {
9c21453e
HK		 287 .start = IRQ_PG13,
288 .end = IRQ_PG13,
b9da3b92
MF		 289 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
290 },
291};
292
293static struct platform_device net2272_bfin_device = {
294 .name = "net2272",
295 .id = -1,
296 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
297 .resource = net2272_bfin_resources,
298};
299#endif
300
c97618d3
MF		 301static struct resource bfin_gpios_resources = {
302 .start = 0,
303 .end = MAX_BLACKFIN_GPIOS - 1,
304 .flags = IORESOURCE_IRQ,
305};
306
307static struct platform_device bfin_gpios_device = {
308 .name = "simple-gpio",
309 .id = -1,
310 .num_resources = 1,
311 .resource = &bfin_gpios_resources,
312};
313
b9da3b92
MF		 314#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
315static struct mtd_partition cm_partitions[] = {
316 {
317 .name = "bootloader(nor)",
318 .size = 0x40000,
319 .offset = 0,
320 }, {
321 .name = "linux kernel(nor)",
9c21453e 322 .size = 0x100000,
b9da3b92
MF		 323 .offset = MTDPART_OFS_APPEND,
324 }, {
325 .name = "file system(nor)",
326 .size = MTDPART_SIZ_FULL,
327 .offset = MTDPART_OFS_APPEND,
328 }
329};
330
331static struct physmap_flash_data cm_flash_data = {
332 .width = 2,
333 .parts = cm_partitions,
334 .nr_parts = ARRAY_SIZE(cm_partitions),
335};
336
337static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
338
339static struct resource cm_flash_resource[] = {
340 {
341 .name = "cfi_probe",
342 .start = 0x20000000,
343 .end = 0x201fffff,
344 .flags = IORESOURCE_MEM,
345 }, {
346 .start = (unsigned long)cm_flash_gpios,
347 .end = ARRAY_SIZE(cm_flash_gpios),
348 .flags = IORESOURCE_IRQ,
349 }
350};
351
352static struct platform_device cm_flash_device = {
353 .name = "gpio-addr-flash",
354 .id = 0,
355 .dev = {
356 .platform_data = &cm_flash_data,
357 },
358 .num_resources = ARRAY_SIZE(cm_flash_resource),
359 .resource = cm_flash_resource,
360};
361#endif
362
363#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
364static struct resource bfin_uart_resources[] = {
365 {
366 .start = 0xFFC00400,
367 .end = 0xFFC004FF,
368 .flags = IORESOURCE_MEM,
369 }, {
370 .start = 0xFFC02000,
371 .end = 0xFFC020FF,
372 .flags = IORESOURCE_MEM,
373 },
374};
375
376static struct platform_device bfin_uart_device = {
377 .name = "bfin-uart",
378 .id = 1,
379 .num_resources = ARRAY_SIZE(bfin_uart_resources),
380 .resource = bfin_uart_resources,
381};
382#endif
383
384#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
b9da3b92 385#ifdef CONFIG_BFIN_SIR0
42bd8bcb 386static struct resource bfin_sir0_resources[] = {
b9da3b92
MF		 387 {
388 .start = 0xFFC00400,
389 .end = 0xFFC004FF,
390 .flags = IORESOURCE_MEM,
391 },
42bd8bcb
GY		 392 {
393 .start = IRQ_UART0_RX,
394 .end = IRQ_UART0_RX+1,
395 .flags = IORESOURCE_IRQ,
396 },
397 {
398 .start = CH_UART0_RX,
399 .end = CH_UART0_RX+1,
400 .flags = IORESOURCE_DMA,
401 },
402};
403
404static struct platform_device bfin_sir0_device = {
405 .name = "bfin_sir",
406 .id = 0,
407 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
408 .resource = bfin_sir0_resources,
409};
b9da3b92
MF		 410#endif
411#ifdef CONFIG_BFIN_SIR1
42bd8bcb 412static struct resource bfin_sir1_resources[] = {
b9da3b92
MF		 413 {
414 .start = 0xFFC02000,
415 .end = 0xFFC020FF,
416 .flags = IORESOURCE_MEM,
417 },
42bd8bcb
GY		 418 {
419 .start = IRQ_UART1_RX,
420 .end = IRQ_UART1_RX+1,
421 .flags = IORESOURCE_IRQ,
422 },
423 {
424 .start = CH_UART1_RX,
425 .end = CH_UART1_RX+1,
426 .flags = IORESOURCE_DMA,
427 },
b9da3b92
MF		 428};
429
42bd8bcb 430static struct platform_device bfin_sir1_device = {
b9da3b92 431 .name = "bfin_sir",
42bd8bcb
GY		 432 .id = 1,
433 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
434 .resource = bfin_sir1_resources,
b9da3b92
MF		 435};
436#endif
42bd8bcb 437#endif
b9da3b92
MF		 438
439#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
440static struct resource bfin_twi0_resource[] = {
441 [0] = {
442 .start = TWI0_REGBASE,
443 .end = TWI0_REGBASE,
444 .flags = IORESOURCE_MEM,
445 },
446 [1] = {
447 .start = IRQ_TWI,
448 .end = IRQ_TWI,
449 .flags = IORESOURCE_IRQ,
450 },
451};
452
453static struct platform_device i2c_bfin_twi_device = {
454 .name = "i2c-bfin-twi",
455 .id = 0,
456 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
457 .resource = bfin_twi0_resource,
458};
459#endif
460
461#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
462static struct platform_device bfin_sport0_uart_device = {
463 .name = "bfin-sport-uart",
464 .id = 0,
465};
466
467static struct platform_device bfin_sport1_uart_device = {
468 .name = "bfin-sport-uart",
469 .id = 1,
470};
471#endif
472
473#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 474static struct platform_device bfin_mii_bus = {
475 .name = "bfin_mii_bus",
476};
477
b9da3b92
MF		 478static struct platform_device bfin_mac_device = {
479 .name = "bfin_mac",
65319628 480 .dev.platform_data = &bfin_mii_bus,
b9da3b92
MF		 481};
482#endif
483
484#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
fe5aeb93 485#define PATA_INT IRQ_PF14
b9da3b92
MF		 486
487static struct pata_platform_info bfin_pata_platform_data = {
488 .ioport_shift = 2,
489 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
490};
491
492static struct resource bfin_pata_resources[] = {
493 {
494 .start = 0x2030C000,
495 .end = 0x2030C01F,
496 .flags = IORESOURCE_MEM,
497 },
498 {
499 .start = 0x2030D018,
500 .end = 0x2030D01B,
501 .flags = IORESOURCE_MEM,
502 },
503 {
504 .start = PATA_INT,
505 .end = PATA_INT,
506 .flags = IORESOURCE_IRQ,
507 },
508};
509
510static struct platform_device bfin_pata_device = {
511 .name = "pata_platform",
512 .id = -1,
513 .num_resources = ARRAY_SIZE(bfin_pata_resources),
514 .resource = bfin_pata_resources,
515 .dev = {
516 .platform_data = &bfin_pata_platform_data,
517 }
518};
519#endif
520
521static const unsigned int cclk_vlev_datasheet[] =
522{
523 VRPAIR(VLEV_085, 250000000),
524 VRPAIR(VLEV_090, 376000000),
525 VRPAIR(VLEV_095, 426000000),
526 VRPAIR(VLEV_100, 426000000),
527 VRPAIR(VLEV_105, 476000000),
528 VRPAIR(VLEV_110, 476000000),
529 VRPAIR(VLEV_115, 476000000),
530 VRPAIR(VLEV_120, 500000000),
531 VRPAIR(VLEV_125, 533000000),
532 VRPAIR(VLEV_130, 600000000),
533};
534
535static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
536 .tuple_tab = cclk_vlev_datasheet,
537 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
538 .vr_settling_time = 25 /* us */,
539};
540
541static struct platform_device bfin_dpmc = {
542 .name = "bfin dpmc",
543 .dev = {
544 .platform_data = &bfin_dmpc_vreg_data,
545 },
546};
547
548static struct platform_device *cm_bf537_devices[] __initdata = {
549
550 &bfin_dpmc,
551
552#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
553 &hitachi_fb_device,
554#endif
555
556#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
557 &rtc_device,
558#endif
559
560#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
561 &bfin_uart_device,
562#endif
563
564#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 565#ifdef CONFIG_BFIN_SIR0
566 &bfin_sir0_device,
567#endif
568#ifdef CONFIG_BFIN_SIR1
569 &bfin_sir1_device,
570#endif
b9da3b92
MF		 571#endif
572
573#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
574 &i2c_bfin_twi_device,
575#endif
576
577#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
578 &bfin_sport0_uart_device,
579 &bfin_sport1_uart_device,
580#endif
581
582#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
583 &isp1362_hcd_device,
584#endif
585
586#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
587 &smc91x_device,
588#endif
589
590#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 591 &bfin_mii_bus,
b9da3b92
MF		 592 &bfin_mac_device,
593#endif
594
595#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
596 &net2272_bfin_device,
597#endif
598
599#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
600 &bfin_spi0_device,
601#endif
602
603#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
604 &bfin_pata_device,
605#endif
606
607#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
608 &cm_flash_device,
609#endif
c97618d3
MF		 610
611 &bfin_gpios_device,
b9da3b92
MF		 612};
613
7f6678c5 614static int __init tcm_bf537_init(void)
b9da3b92
MF		 615{
616 printk(KERN_INFO "%s(): registering device resources\n", __func__);
617 platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
618#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
619 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
620#endif
621
622#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
623 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
624#endif
625 return 0;
626}
627
7f6678c5 628arch_initcall(tcm_bf537_init);
b9da3b92
MF		 629
630void bfin_get_ether_addr(char *addr)
631{
632 random_ether_addr(addr);
633 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
634}
635EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
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