[deliverable/linux.git] / arch / blackfin / mach-bf561 / boards / cm_bf561.c

/*
 * File:         arch/blackfin/mach-bf533/boards/cm_bf561.c
 * Based on:     arch/blackfin/mach-bf533/boards/ezkit.c
 * Author:       Aidan Williams <aidan@nicta.com.au> Copyright 2005
 *
 * Created:      2006
 * Description:  Board description file
 *
 * Modified:
 *               Copyright 2004-2006 Analog Devices Inc.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/usb/isp1362.h>
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
#include <asm/dpmc.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "Bluetechnix CM BF561";

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "kernel",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
	.enable_dma = 1,
	.bits_per_word = 8,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836-spi",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif
#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
	{
		.modalias = "ad9960-spi",
		.max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 1,
		.controller_data = &ad9960_spi_chip_info,
	},
#endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
	{
		.modalias = "spi_mmc",
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SPI_MMC_CS_CHAN,
		.platform_data = NULL,
		.controller_data = &spi_mmc_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_IRQ,
	}
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */


#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
static struct platform_device hitachi_fb_device = {
	.name = "hitachi-tx09",
};
#endif


#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)

static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x28000300,
		.end = 0x28000300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF0,
		.end = IRQ_PF0,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};
static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
};
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
static struct resource isp1362_hcd_resources[] = {
	{
		.start = 0x24008000,
		.end = 0x24008000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x24008004,
		.end = 0x24008004,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF47,
		.end = IRQ_PF47,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct isp1362_platform_data isp1362_priv = {
	.sel15Kres = 1,
	.clknotstop = 0,
	.oc_enable = 0,
	.int_act_high = 0,
	.int_edge_triggered = 0,
	.remote_wakeup_connected = 0,
	.no_power_switching = 1,
	.power_switching_mode = 0,
};

static struct platform_device isp1362_hcd_device = {
	.name = "isp1362-hcd",
	.id = 0,
	.dev = {
		.platform_data = &isp1362_priv,
	},
	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	.resource = isp1362_hcd_resources,
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
};

static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
};
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
static struct resource bfin_sir_resources[] = {
#ifdef CONFIG_BFIN_SIR0
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
#endif
};

static struct platform_device bfin_sir_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir_resources),
	.resource = bfin_sir_resources,
};
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
#define PATA_INT	119

static struct pata_platform_info bfin_pata_platform_data = {
	.ioport_shift = 2,
	.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
};

static struct resource bfin_pata_resources[] = {
	{
		.start = 0x2400C000,
		.end = 0x2400C001F,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = 0x2400D018,
		.end = 0x2400D01B,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = PATA_INT,
		.end = PATA_INT,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pata_device = {
	.name = "pata_platform",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	.resource = bfin_pata_resources,
	.dev = {
		.platform_data = &bfin_pata_platform_data,
	}
};
#endif

static const unsigned int cclk_vlev_datasheet[] =
{
	VRPAIR(VLEV_085, 250000000),
	VRPAIR(VLEV_090, 300000000),
	VRPAIR(VLEV_095, 313000000),
	VRPAIR(VLEV_100, 350000000),
	VRPAIR(VLEV_105, 400000000),
	VRPAIR(VLEV_110, 444000000),
	VRPAIR(VLEV_115, 450000000),
	VRPAIR(VLEV_120, 475000000),
	VRPAIR(VLEV_125, 500000000),
	VRPAIR(VLEV_130, 600000000),
};

static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	.tuple_tab = cclk_vlev_datasheet,
	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	.vr_settling_time = 25 /* us */,
};

static struct platform_device bfin_dpmc = {
	.name = "bfin dpmc",
	.dev = {
		.platform_data = &bfin_dmpc_vreg_data,
	},
};

static struct platform_device *cm_bf561_devices[] __initdata = {

	&bfin_dpmc,

#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
	&hitachi_fb_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
	&bfin_sir_device,
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
	&isp1362_hcd_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	&bfin_pata_device,
#endif
};

static int __init cm_bf561_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
#endif
	return 0;
}

arch_initcall(cm_bf561_init);
Commit	Line	Data
1394f032 BW	1	/*
	2	* File: arch/blackfin/mach-bf533/boards/cm_bf561.c
	3	* Based on: arch/blackfin/mach-bf533/boards/ezkit.c
d2d50aa9	4	* Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
1394f032 BW	5	*
	6	* Created: 2006
	7	* Description: Board description file
	8	*
	9	* Modified:
	10	* Copyright 2004-2006 Analog Devices Inc.
	11	*
	12	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	13	*
	14	* This program is free software; you can redistribute it and/or modify
	15	* it under the terms of the GNU General Public License as published by
	16	* the Free Software Foundation; either version 2 of the License, or
	17	* (at your option) any later version.
	18	*
	19	* This program is distributed in the hope that it will be useful,
	20	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	21	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	22	* GNU General Public License for more details.
	23	*
	24	* You should have received a copy of the GNU General Public License
	25	* along with this program; if not, see the file COPYING, or write
	26	* to the Free Software Foundation, Inc.,
	27	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	28	*/
	29
	30	#include <linux/device.h>
	31	#include <linux/platform_device.h>
	32	#include <linux/mtd/mtd.h>
	33	#include <linux/mtd/partitions.h>
	34	#include <linux/spi/spi.h>
	35	#include <linux/spi/flash.h>
f02bcec5	36	#include <linux/usb/isp1362.h>
0a87e3e9	37	#include <linux/ata_platform.h>
1f83b8f1	38	#include <linux/irq.h>
c6c4d7bb	39	#include <asm/dma.h>
1394f032	40	#include <asm/bfin5xx_spi.h>
5d448dd5	41	#include <asm/portmux.h>
14b03204	42	#include <asm/dpmc.h>
1394f032 BW	43
	44	/*
	45	* Name the Board for the /proc/cpuinfo
	46	*/
066954a3	47	const char bfin_board_name[] = "Bluetechnix CM BF561";
1394f032 BW	48
1394f032 BW	49	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
d2d50aa9	50	/* all SPI peripherals info goes here */
1394f032 BW	51
	52	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	53	static struct mtd_partition bfin_spi_flash_partitions[] = {
	54	{
	55	.name = "bootloader",
	56	.size = 0x00020000,
	57	.offset = 0,
	58	.mask_flags = MTD_CAP_ROM
1f83b8f1	59	}, {
1394f032 BW	60	.name = "kernel",
	61	.size = 0xe0000,
	62	.offset = 0x20000
1f83b8f1	63	}, {
1394f032 BW	64	.name = "file system",
	65	.size = 0x700000,
	66	.offset = 0x00100000,
	67	}
	68	};
	69
	70	static struct flash_platform_data bfin_spi_flash_data = {
	71	.name = "m25p80",
	72	.parts = bfin_spi_flash_partitions,
	73	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	74	.type = "m25p64",
	75	};
	76
	77	/* SPI flash chip (m25p64) */
	78	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	79	.enable_dma = 0, /* use dma transfer with this chip*/
	80	.bits_per_word = 8,
	81	};
	82	#endif
	83
	84	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
	85	/* SPI ADC chip */
	86	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	87	.enable_dma = 1, /* use dma transfer with this chip*/
	88	.bits_per_word = 16,
	89	};
	90	#endif
	91
	92	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	93	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	94	.enable_dma = 0,
	95	.bits_per_word = 16,
	96	};
	97	#endif
	98
	99	#if defined(CONFIG_AD9960) \|\| defined(CONFIG_AD9960_MODULE)
	100	static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
	101	.enable_dma = 0,
	102	.bits_per_word = 16,
	103	};
	104	#endif
	105
	106	#if defined(CONFIG_SPI_MMC) \|\| defined(CONFIG_SPI_MMC_MODULE)
	107	static struct bfin5xx_spi_chip spi_mmc_chip_info = {
	108	.enable_dma = 1,
	109	.bits_per_word = 8,
	110	};
	111	#endif
	112
	113	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	114	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	115	{
	116	/* the modalias must be the same as spi device driver name */
	117	.modalias = "m25p80", /* Name of spi_driver for this device */
	118	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	119	.bus_num = 0, /* Framework bus number */
1394f032 BW	120	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	121	.platform_data = &bfin_spi_flash_data,
	122	.controller_data = &spi_flash_chip_info,
	123	.mode = SPI_MODE_3,
	124	},
	125	#endif
	126
	127	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
	128	{
	129	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	130	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	131	.bus_num = 0, /* Framework bus number */
1394f032 BW	132	.chip_select = 1, /* Framework chip select. */
	133	.platform_data = NULL, /* No spi_driver specific config */
	134	.controller_data = &spi_adc_chip_info,
	135	},
	136	#endif
	137
	138	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	139	{
	140	.modalias = "ad1836-spi",
	141	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	142	.bus_num = 0,
1394f032 BW	143	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	144	.controller_data = &ad1836_spi_chip_info,
	145	},
	146	#endif
	147	#if defined(CONFIG_AD9960) \|\| defined(CONFIG_AD9960_MODULE)
	148	{
	149	.modalias = "ad9960-spi",
	150	.max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	151	.bus_num = 0,
1394f032 BW	152	.chip_select = 1,
	153	.controller_data = &ad9960_spi_chip_info,
	154	},
	155	#endif
	156	#if defined(CONFIG_SPI_MMC) \|\| defined(CONFIG_SPI_MMC_MODULE)
	157	{
	158	.modalias = "spi_mmc",
	159	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	160	.bus_num = 0,
1394f032 BW	161	.chip_select = CONFIG_SPI_MMC_CS_CHAN,
	162	.platform_data = NULL,
	163	.controller_data = &spi_mmc_chip_info,
	164	.mode = SPI_MODE_3,
	165	},
	166	#endif
	167	};
	168
c6c4d7bb BW	169	/* SPI (0) */
	170	static struct resource bfin_spi0_resource[] = {
	171	[0] = {
	172	.start = SPI0_REGBASE,
	173	.end = SPI0_REGBASE + 0xFF,
	174	.flags = IORESOURCE_MEM,
	175	},
	176	[1] = {
	177	.start = CH_SPI,
	178	.end = CH_SPI,
	179	.flags = IORESOURCE_IRQ,
	180	}
	181	};
	182
1394f032	183	/* SPI controller data */
c6c4d7bb	184	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	185	.num_chipselect = 8,
1394f032 BW	186	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	187	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	188	};
1394f032 BW	189
c6c4d7bb BW	190	static struct platform_device bfin_spi0_device = {
	191	.name = "bfin-spi",
	192	.id = 0, /* Bus number */
	193	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	194	.resource = bfin_spi0_resource,
1394f032	195	.dev = {
c6c4d7bb	196	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	197	},
	198	};
	199	#endif /* spi master and devices */
	200
	201
0d4a89bb MH	202	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	203	static struct platform_device hitachi_fb_device = {
	204	.name = "hitachi-tx09",
	205	};
	206	#endif
	207
	208
1394f032 BW	209	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	210
	211	static struct resource smc91x_resources[] = {
	212	{
	213	.name = "smc91x-regs",
	214	.start = 0x28000300,
	215	.end = 0x28000300 + 16,
	216	.flags = IORESOURCE_MEM,
1f83b8f1	217	}, {
1394f032 BW	218	.start = IRQ_PF0,
	219	.end = IRQ_PF0,
	220	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	221	},
	222	};
	223	static struct platform_device smc91x_device = {
	224	.name = "smc91x",
	225	.id = 0,
	226	.num_resources = ARRAY_SIZE(smc91x_resources),
	227	.resource = smc91x_resources,
	228	};
	229	#endif
	230
	231	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	232	static struct resource isp1362_hcd_resources[] = {
	233	{
	234	.start = 0x24008000,
	235	.end = 0x24008000,
	236	.flags = IORESOURCE_MEM,
1f83b8f1	237	}, {
1394f032 BW	238	.start = 0x24008004,
	239	.end = 0x24008004,
	240	.flags = IORESOURCE_MEM,
1f83b8f1	241	}, {
1394f032 BW	242	.start = IRQ_PF47,
	243	.end = IRQ_PF47,
	244	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	245	},
	246	};
	247
	248	static struct isp1362_platform_data isp1362_priv = {
	249	.sel15Kres = 1,
	250	.clknotstop = 0,
	251	.oc_enable = 0,
	252	.int_act_high = 0,
	253	.int_edge_triggered = 0,
	254	.remote_wakeup_connected = 0,
	255	.no_power_switching = 1,
	256	.power_switching_mode = 0,
	257	};
	258
	259	static struct platform_device isp1362_hcd_device = {
	260	.name = "isp1362-hcd",
	261	.id = 0,
	262	.dev = {
	263	.platform_data = &isp1362_priv,
	264	},
	265	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	266	.resource = isp1362_hcd_resources,
	267	};
	268	#endif
	269
	270	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	271	static struct resource bfin_uart_resources[] = {
1f83b8f1 MF	272	{
	273	.start = 0xFFC00400,
	274	.end = 0xFFC004FF,
	275	.flags = IORESOURCE_MEM,
	276	},
1394f032 BW	277	};
	278
	279	static struct platform_device bfin_uart_device = {
1f83b8f1 MF	280	.name = "bfin-uart",
	281	.id = 1,
	282	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	283	.resource = bfin_uart_resources,
1394f032 BW	284	};
	285	#endif
	286
5be36d22 GY	287	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
	288	static struct resource bfin_sir_resources[] = {
	289	#ifdef CONFIG_BFIN_SIR0
	290	{
	291	.start = 0xFFC00400,
	292	.end = 0xFFC004FF,
	293	.flags = IORESOURCE_MEM,
	294	},
	295	#endif
	296	};
	297
	298	static struct platform_device bfin_sir_device = {
	299	.name = "bfin_sir",
	300	.id = 0,
	301	.num_resources = ARRAY_SIZE(bfin_sir_resources),
	302	.resource = bfin_sir_resources,
	303	};
	304	#endif
	305
c6c4d7bb BW	306	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	307	#define PATA_INT 119
	308
	309	static struct pata_platform_info bfin_pata_platform_data = {
	310	.ioport_shift = 2,
	311	.irq_type = IRQF_TRIGGER_HIGH \| IRQF_DISABLED,
	312	};
	313
	314	static struct resource bfin_pata_resources[] = {
	315	{
	316	.start = 0x2400C000,
	317	.end = 0x2400C001F,
	318	.flags = IORESOURCE_MEM,
	319	},
	320	{
	321	.start = 0x2400D018,
	322	.end = 0x2400D01B,
	323	.flags = IORESOURCE_MEM,
	324	},
	325	{
	326	.start = PATA_INT,
	327	.end = PATA_INT,
	328	.flags = IORESOURCE_IRQ,
	329	},
	330	};
	331
	332	static struct platform_device bfin_pata_device = {
	333	.name = "pata_platform",
	334	.id = -1,
	335	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	336	.resource = bfin_pata_resources,
	337	.dev = {
	338	.platform_data = &bfin_pata_platform_data,
	339	}
	340	};
	341	#endif
	342
14b03204 MH	343	static const unsigned int cclk_vlev_datasheet[] =
	344	{
	345	VRPAIR(VLEV_085, 250000000),
	346	VRPAIR(VLEV_090, 300000000),
	347	VRPAIR(VLEV_095, 313000000),
	348	VRPAIR(VLEV_100, 350000000),
	349	VRPAIR(VLEV_105, 400000000),
	350	VRPAIR(VLEV_110, 444000000),
	351	VRPAIR(VLEV_115, 450000000),
	352	VRPAIR(VLEV_120, 475000000),
	353	VRPAIR(VLEV_125, 500000000),
	354	VRPAIR(VLEV_130, 600000000),
	355	};
	356
	357	static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	358	.tuple_tab = cclk_vlev_datasheet,
	359	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	360	.vr_settling_time = 25 /* us */,
	361	};
	362
	363	static struct platform_device bfin_dpmc = {
	364	.name = "bfin dpmc",
	365	.dev = {
	366	.platform_data = &bfin_dmpc_vreg_data,
	367	},
	368	};
	369
1394f032 BW	370	static struct platform_device *cm_bf561_devices[] __initdata = {
1394f032 BW	371
14b03204 MH	372	&bfin_dpmc,
14b03204 MH	373
0d4a89bb MH	374	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	375	&hitachi_fb_device,
	376	#endif
	377
1394f032	378	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
1f83b8f1	379	&bfin_uart_device,
1394f032 BW	380	#endif
1394f032 BW	381
5be36d22 GY	382	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
	383	&bfin_sir_device,
	384	#endif
	385
1394f032 BW	386	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	387	&isp1362_hcd_device,
	388	#endif
	389
	390	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	391	&smc91x_device,
	392	#endif
	393
	394	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb	395	&bfin_spi0_device,
1394f032 BW	396	#endif
1394f032 BW	397
c6c4d7bb BW	398	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	399	&bfin_pata_device,
	400	#endif
1394f032 BW	401	};
	402
	403	static int __init cm_bf561_init(void)
	404	{
b85d858b	405	printk(KERN_INFO "%s(): registering device resources\n", __func__);
1394f032 BW	406	platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
	407	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	408	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	409	#endif
c6c4d7bb BW	410
	411	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	412	irq_desc[PATA_INT].status \|= IRQ_NOAUTOEN;
	413	#endif
1394f032 BW	414	return 0;
	415	}
	416
	417	arch_initcall(cm_bf561_init);