[deliverable/linux.git] / arch / blackfin / mach-bf561 / boards / cm_bf561.c

/*
 * File:         arch/blackfin/mach-bf533/boards/cm_bf561.c
 * Based on:     arch/blackfin/mach-bf533/boards/ezkit.c
 * Author:       Aidan Williams <aidan@nicta.com.au> Copyright 2005
 *
 * Created:      2006
 * Description:  Board description file
 *
 * Modified:
 *               Copyright 2004-2006 Analog Devices Inc.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/usb/isp1362.h>
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "Bluetechnix CM BF561";

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "kernel",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
	.enable_dma = 1,
	.bits_per_word = 8,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836-spi",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif
#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
	{
		.modalias = "ad9960-spi",
		.max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 1,
		.controller_data = &ad9960_spi_chip_info,
	},
#endif
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
	{
		.modalias = "spi_mmc",
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SPI_MMC_CS_CHAN,
		.platform_data = NULL,
		.controller_data = &spi_mmc_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_IRQ,
	}
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */


#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
static struct platform_device hitachi_fb_device = {
	.name = "hitachi-tx09",
};
#endif


#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)

static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x28000300,
		.end = 0x28000300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF0,
		.end = IRQ_PF0,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};
static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
};
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
static struct resource isp1362_hcd_resources[] = {
	{
		.start = 0x24008000,
		.end = 0x24008000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x24008004,
		.end = 0x24008004,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF47,
		.end = IRQ_PF47,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct isp1362_platform_data isp1362_priv = {
	.sel15Kres = 1,
	.clknotstop = 0,
	.oc_enable = 0,
	.int_act_high = 0,
	.int_edge_triggered = 0,
	.remote_wakeup_connected = 0,
	.no_power_switching = 1,
	.power_switching_mode = 0,
};

static struct platform_device isp1362_hcd_device = {
	.name = "isp1362-hcd",
	.id = 0,
	.dev = {
		.platform_data = &isp1362_priv,
	},
	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	.resource = isp1362_hcd_resources,
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
};

static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
};
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
#define PATA_INT	119

static struct pata_platform_info bfin_pata_platform_data = {
	.ioport_shift = 2,
	.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
};

static struct resource bfin_pata_resources[] = {
	{
		.start = 0x2400C000,
		.end = 0x2400C001F,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = 0x2400D018,
		.end = 0x2400D01B,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = PATA_INT,
		.end = PATA_INT,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pata_device = {
	.name = "pata_platform",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	.resource = bfin_pata_resources,
	.dev = {
		.platform_data = &bfin_pata_platform_data,
	}
};
#endif

static struct platform_device *cm_bf561_devices[] __initdata = {

#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
	&hitachi_fb_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
	&isp1362_hcd_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	&bfin_pata_device,
#endif
};

static int __init cm_bf561_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
	platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
#endif
	return 0;
}

arch_initcall(cm_bf561_init);
Commit	Line	Data
1394f032 BW	1	/*
	2	* File: arch/blackfin/mach-bf533/boards/cm_bf561.c
	3	* Based on: arch/blackfin/mach-bf533/boards/ezkit.c
d2d50aa9	4	* Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
1394f032 BW	5	*
	6	* Created: 2006
	7	* Description: Board description file
	8	*
	9	* Modified:
	10	* Copyright 2004-2006 Analog Devices Inc.
	11	*
	12	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	13	*
	14	* This program is free software; you can redistribute it and/or modify
	15	* it under the terms of the GNU General Public License as published by
	16	* the Free Software Foundation; either version 2 of the License, or
	17	* (at your option) any later version.
	18	*
	19	* This program is distributed in the hope that it will be useful,
	20	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	21	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	22	* GNU General Public License for more details.
	23	*
	24	* You should have received a copy of the GNU General Public License
	25	* along with this program; if not, see the file COPYING, or write
	26	* to the Free Software Foundation, Inc.,
	27	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	28	*/
	29
	30	#include <linux/device.h>
	31	#include <linux/platform_device.h>
	32	#include <linux/mtd/mtd.h>
	33	#include <linux/mtd/partitions.h>
	34	#include <linux/spi/spi.h>
	35	#include <linux/spi/flash.h>
f02bcec5	36	#include <linux/usb/isp1362.h>
0a87e3e9	37	#include <linux/ata_platform.h>
1f83b8f1	38	#include <linux/irq.h>
c6c4d7bb	39	#include <asm/dma.h>
1394f032	40	#include <asm/bfin5xx_spi.h>
5d448dd5	41	#include <asm/portmux.h>
1394f032 BW	42
	43	/*
	44	* Name the Board for the /proc/cpuinfo
	45	*/
066954a3	46	const char bfin_board_name[] = "Bluetechnix CM BF561";
1394f032 BW	47
1394f032 BW	48	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
d2d50aa9	49	/* all SPI peripherals info goes here */
1394f032 BW	50
	51	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	52	static struct mtd_partition bfin_spi_flash_partitions[] = {
	53	{
	54	.name = "bootloader",
	55	.size = 0x00020000,
	56	.offset = 0,
	57	.mask_flags = MTD_CAP_ROM
1f83b8f1	58	}, {
1394f032 BW	59	.name = "kernel",
	60	.size = 0xe0000,
	61	.offset = 0x20000
1f83b8f1	62	}, {
1394f032 BW	63	.name = "file system",
	64	.size = 0x700000,
	65	.offset = 0x00100000,
	66	}
	67	};
	68
	69	static struct flash_platform_data bfin_spi_flash_data = {
	70	.name = "m25p80",
	71	.parts = bfin_spi_flash_partitions,
	72	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	73	.type = "m25p64",
	74	};
	75
	76	/* SPI flash chip (m25p64) */
	77	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	78	.enable_dma = 0, /* use dma transfer with this chip*/
	79	.bits_per_word = 8,
	80	};
	81	#endif
	82
	83	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
	84	/* SPI ADC chip */
	85	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	86	.enable_dma = 1, /* use dma transfer with this chip*/
	87	.bits_per_word = 16,
	88	};
	89	#endif
	90
	91	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	92	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	93	.enable_dma = 0,
	94	.bits_per_word = 16,
	95	};
	96	#endif
	97
	98	#if defined(CONFIG_AD9960) \|\| defined(CONFIG_AD9960_MODULE)
	99	static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
	100	.enable_dma = 0,
	101	.bits_per_word = 16,
	102	};
	103	#endif
	104
	105	#if defined(CONFIG_SPI_MMC) \|\| defined(CONFIG_SPI_MMC_MODULE)
	106	static struct bfin5xx_spi_chip spi_mmc_chip_info = {
	107	.enable_dma = 1,
	108	.bits_per_word = 8,
	109	};
	110	#endif
	111
	112	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	113	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	114	{
	115	/* the modalias must be the same as spi device driver name */
	116	.modalias = "m25p80", /* Name of spi_driver for this device */
	117	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	118	.bus_num = 0, /* Framework bus number */
1394f032 BW	119	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	120	.platform_data = &bfin_spi_flash_data,
	121	.controller_data = &spi_flash_chip_info,
	122	.mode = SPI_MODE_3,
	123	},
	124	#endif
	125
	126	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
	127	{
	128	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	129	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	130	.bus_num = 0, /* Framework bus number */
1394f032 BW	131	.chip_select = 1, /* Framework chip select. */
	132	.platform_data = NULL, /* No spi_driver specific config */
	133	.controller_data = &spi_adc_chip_info,
	134	},
	135	#endif
	136
	137	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	138	{
	139	.modalias = "ad1836-spi",
	140	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	141	.bus_num = 0,
1394f032 BW	142	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	143	.controller_data = &ad1836_spi_chip_info,
	144	},
	145	#endif
	146	#if defined(CONFIG_AD9960) \|\| defined(CONFIG_AD9960_MODULE)
	147	{
	148	.modalias = "ad9960-spi",
	149	.max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	150	.bus_num = 0,
1394f032 BW	151	.chip_select = 1,
	152	.controller_data = &ad9960_spi_chip_info,
	153	},
	154	#endif
	155	#if defined(CONFIG_SPI_MMC) \|\| defined(CONFIG_SPI_MMC_MODULE)
	156	{
	157	.modalias = "spi_mmc",
	158	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	159	.bus_num = 0,
1394f032 BW	160	.chip_select = CONFIG_SPI_MMC_CS_CHAN,
	161	.platform_data = NULL,
	162	.controller_data = &spi_mmc_chip_info,
	163	.mode = SPI_MODE_3,
	164	},
	165	#endif
	166	};
	167
c6c4d7bb BW	168	/* SPI (0) */
	169	static struct resource bfin_spi0_resource[] = {
	170	[0] = {
	171	.start = SPI0_REGBASE,
	172	.end = SPI0_REGBASE + 0xFF,
	173	.flags = IORESOURCE_MEM,
	174	},
	175	[1] = {
	176	.start = CH_SPI,
	177	.end = CH_SPI,
	178	.flags = IORESOURCE_IRQ,
	179	}
	180	};
	181
1394f032	182	/* SPI controller data */
c6c4d7bb	183	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	184	.num_chipselect = 8,
1394f032 BW	185	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	186	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	187	};
1394f032 BW	188
c6c4d7bb BW	189	static struct platform_device bfin_spi0_device = {
	190	.name = "bfin-spi",
	191	.id = 0, /* Bus number */
	192	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	193	.resource = bfin_spi0_resource,
1394f032	194	.dev = {
c6c4d7bb	195	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	196	},
	197	};
	198	#endif /* spi master and devices */
	199
	200
0d4a89bb MH	201	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	202	static struct platform_device hitachi_fb_device = {
	203	.name = "hitachi-tx09",
	204	};
	205	#endif
	206
	207
1394f032 BW	208	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	209
	210	static struct resource smc91x_resources[] = {
	211	{
	212	.name = "smc91x-regs",
	213	.start = 0x28000300,
	214	.end = 0x28000300 + 16,
	215	.flags = IORESOURCE_MEM,
1f83b8f1	216	}, {
1394f032 BW	217	.start = IRQ_PF0,
	218	.end = IRQ_PF0,
	219	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	220	},
	221	};
	222	static struct platform_device smc91x_device = {
	223	.name = "smc91x",
	224	.id = 0,
	225	.num_resources = ARRAY_SIZE(smc91x_resources),
	226	.resource = smc91x_resources,
	227	};
	228	#endif
	229
	230	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	231	static struct resource isp1362_hcd_resources[] = {
	232	{
	233	.start = 0x24008000,
	234	.end = 0x24008000,
	235	.flags = IORESOURCE_MEM,
1f83b8f1	236	}, {
1394f032 BW	237	.start = 0x24008004,
	238	.end = 0x24008004,
	239	.flags = IORESOURCE_MEM,
1f83b8f1	240	}, {
1394f032 BW	241	.start = IRQ_PF47,
	242	.end = IRQ_PF47,
	243	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	244	},
	245	};
	246
	247	static struct isp1362_platform_data isp1362_priv = {
	248	.sel15Kres = 1,
	249	.clknotstop = 0,
	250	.oc_enable = 0,
	251	.int_act_high = 0,
	252	.int_edge_triggered = 0,
	253	.remote_wakeup_connected = 0,
	254	.no_power_switching = 1,
	255	.power_switching_mode = 0,
	256	};
	257
	258	static struct platform_device isp1362_hcd_device = {
	259	.name = "isp1362-hcd",
	260	.id = 0,
	261	.dev = {
	262	.platform_data = &isp1362_priv,
	263	},
	264	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	265	.resource = isp1362_hcd_resources,
	266	};
	267	#endif
	268
	269	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	270	static struct resource bfin_uart_resources[] = {
1f83b8f1 MF	271	{
	272	.start = 0xFFC00400,
	273	.end = 0xFFC004FF,
	274	.flags = IORESOURCE_MEM,
	275	},
1394f032 BW	276	};
	277
	278	static struct platform_device bfin_uart_device = {
1f83b8f1 MF	279	.name = "bfin-uart",
	280	.id = 1,
	281	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	282	.resource = bfin_uart_resources,
1394f032 BW	283	};
	284	#endif
	285
c6c4d7bb BW	286	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	287	#define PATA_INT 119
	288
	289	static struct pata_platform_info bfin_pata_platform_data = {
	290	.ioport_shift = 2,
	291	.irq_type = IRQF_TRIGGER_HIGH \| IRQF_DISABLED,
	292	};
	293
	294	static struct resource bfin_pata_resources[] = {
	295	{
	296	.start = 0x2400C000,
	297	.end = 0x2400C001F,
	298	.flags = IORESOURCE_MEM,
	299	},
	300	{
	301	.start = 0x2400D018,
	302	.end = 0x2400D01B,
	303	.flags = IORESOURCE_MEM,
	304	},
	305	{
	306	.start = PATA_INT,
	307	.end = PATA_INT,
	308	.flags = IORESOURCE_IRQ,
	309	},
	310	};
	311
	312	static struct platform_device bfin_pata_device = {
	313	.name = "pata_platform",
	314	.id = -1,
	315	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	316	.resource = bfin_pata_resources,
	317	.dev = {
	318	.platform_data = &bfin_pata_platform_data,
	319	}
	320	};
	321	#endif
	322
1394f032 BW	323	static struct platform_device *cm_bf561_devices[] __initdata = {
1394f032 BW	324
0d4a89bb MH	325	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	326	&hitachi_fb_device,
	327	#endif
	328
1394f032	329	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
1f83b8f1	330	&bfin_uart_device,
1394f032 BW	331	#endif
	332
	333	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	334	&isp1362_hcd_device,
	335	#endif
	336
	337	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	338	&smc91x_device,
	339	#endif
	340
	341	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb	342	&bfin_spi0_device,
1394f032 BW	343	#endif
1394f032 BW	344
c6c4d7bb BW	345	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	346	&bfin_pata_device,
	347	#endif
1394f032 BW	348	};
	349
	350	static int __init cm_bf561_init(void)
	351	{
	352	printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
	353	platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
	354	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	355	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	356	#endif
c6c4d7bb BW	357
	358	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	359	irq_desc[PATA_INT].status \|= IRQ_NOAUTOEN;
	360	#endif
1394f032 BW	361	return 0;
	362	}
	363
	364	arch_initcall(cm_bf561_init);