Commit | Line | Data |
---|---|---|
f16295e7 | 1 | /* |
96f1050d | 2 | * Do some checking to make sure things are OK |
f16295e7 | 3 | * |
1ed181f2 | 4 | * Copyright 2007-2010 Analog Devices Inc. |
f16295e7 | 5 | * |
96f1050d | 6 | * Licensed under the GPL-2 or later. |
f16295e7 RG |
7 | */ |
8 | ||
13752046 | 9 | #include <asm/fixed_code.h> |
639f6571 BW |
10 | #include <mach/anomaly.h> |
11 | #include <asm/clocks.h> | |
f16295e7 RG |
12 | |
13 | #ifdef CONFIG_BFIN_KERNEL_CLOCK | |
14 | ||
15 | # if (CONFIG_VCO_HZ > CONFIG_MAX_VCO_HZ) | |
16 | # error "VCO selected is more than maximum value. Please change the VCO multipler" | |
17 | # endif | |
18 | ||
19 | # if (CONFIG_SCLK_HZ > CONFIG_MAX_SCLK_HZ) | |
20 | # error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier" | |
21 | # endif | |
22 | ||
23 | # if (CONFIG_SCLK_HZ < CONFIG_MIN_SCLK_HZ) | |
24 | # error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier" | |
25 | # endif | |
26 | ||
27 | # if (ANOMALY_05000273) && (CONFIG_SCLK_HZ * 2 > CONFIG_CCLK_HZ) | |
28 | # error "ANOMALY 05000273, please make sure CCLK is at least 2x SCLK" | |
29 | # endif | |
30 | ||
31 | # if (CONFIG_SCLK_HZ > CONFIG_CCLK_HZ) && (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ) && (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ) | |
32 | # error "Please select sclk less than cclk" | |
33 | # endif | |
34 | ||
35 | #endif /* CONFIG_BFIN_KERNEL_CLOCK */ | |
13752046 MF |
36 | |
37 | #if CONFIG_BOOT_LOAD < FIXED_CODE_END | |
38 | # error "The kernel load address must be after the fixed code section" | |
39 | #endif | |
40 | ||
41 | #if (CONFIG_BOOT_LOAD & 0x3) | |
42 | # error "The kernel load address must be 4 byte aligned" | |
43 | #endif | |
f7e989ab MF |
44 | |
45 | /* The entire kernel must be able to make a 24bit pcrel call to start of L1 */ | |
46 | #if ((0xffffffff - L1_CODE_START + 1) + CONFIG_BOOT_LOAD) > 0x1000000 | |
47 | # error "The kernel load address is too high; keep it below 10meg for safety" | |
48 | #endif | |
00049522 | 49 | |
1ed181f2 MF |
50 | #if ANOMALY_05000263 && defined(CONFIG_MPU) |
51 | # error the MPU will not function safely while Anomaly 05000263 applies | |
52 | #endif | |
53 | ||
357fd373 MF |
54 | #if ANOMALY_05000448 |
55 | # error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes. | |
00049522 | 56 | #endif |
5ba76675 GY |
57 | |
58 | /* if 220 exists, can not set External Memory WB and L2 not_cached, either External Memory not_cached and L2 WB */ | |
59 | #if ANOMALY_05000220 && \ | |
a2ca78ce | 60 | (defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)) |
5369fba1 | 61 | # error "Anomaly 05000220 does not allow you to use Write Back cache with L2 or External Memory" |
a2ca78ce | 62 | #endif |
74181295 | 63 | |
820b127d | 64 | #if ANOMALY_05000491 && !defined(CONFIG_ICACHE_FLUSH_L1) |
74181295 MF |
65 | # error You need IFLUSH in L1 inst while Anomaly 05000491 applies |
66 | #endif |