fix handling of offsets in cris eeprom.c, get rid of fake on-stack files
[deliverable/linux.git] / arch / cris / arch-v10 / drivers / eeprom.c
CommitLineData
1da177e4
LT
1/*!*****************************************************************************
2*!
0779bf2d
ML
3*! Implements an interface for i2c compatible eeproms to run under Linux.
4*! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustments by
1da177e4
LT
5*! Johan.Adolfsson@axis.com
6*!
7*! Probing results:
8*! 8k or not is detected (the assumes 2k or 16k)
9*! 2k or 16k detected using test reads and writes.
10*!
11*!------------------------------------------------------------------------
12*! HISTORY
13*!
14*! DATE NAME CHANGES
15*! ---- ---- -------
16*! Aug 28 1999 Edgar Iglesias Initial Version
17*! Aug 31 1999 Edgar Iglesias Allow simultaneous users.
18*! Sep 03 1999 Edgar Iglesias Updated probe.
19*! Sep 03 1999 Edgar Iglesias Added bail-out stuff if we get interrupted
20*! in the spin-lock.
21*!
1da177e4
LT
22*! (c) 1999 Axis Communications AB, Lund, Sweden
23*!*****************************************************************************/
24
1da177e4
LT
25#include <linux/kernel.h>
26#include <linux/sched.h>
27#include <linux/fs.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/interrupt.h>
f2b9857e 31#include <linux/smp_lock.h>
7e920426 32#include <linux/wait.h>
1da177e4
LT
33#include <asm/uaccess.h>
34#include "i2c.h"
35
3d6c03fc 36#define D(x)
1da177e4
LT
37
38/* If we should use adaptive timing or not: */
3d6c03fc 39/* #define EEPROM_ADAPTIVE_TIMING */
1da177e4
LT
40
41#define EEPROM_MAJOR_NR 122 /* use a LOCAL/EXPERIMENTAL major for now */
42#define EEPROM_MINOR_NR 0
43
44/* Empirical sane initial value of the delay, the value will be adapted to
45 * what the chip needs when using EEPROM_ADAPTIVE_TIMING.
46 */
47#define INITIAL_WRITEDELAY_US 4000
48#define MAX_WRITEDELAY_US 10000 /* 10 ms according to spec for 2KB EEPROM */
49
50/* This one defines how many times to try when eeprom fails. */
51#define EEPROM_RETRIES 10
52
53#define EEPROM_2KB (2 * 1024)
54/*#define EEPROM_4KB (4 * 1024)*/ /* Exists but not used in Axis products */
55#define EEPROM_8KB (8 * 1024 - 1 ) /* Last byte has write protection bit */
56#define EEPROM_16KB (16 * 1024)
57
58#define i2c_delay(x) udelay(x)
59
60/*
61 * This structure describes the attached eeprom chip.
62 * The values are probed for.
63 */
64
65struct eeprom_type
66{
67 unsigned long size;
68 unsigned long sequential_write_pagesize;
69 unsigned char select_cmd;
70 unsigned long usec_delay_writecycles; /* Min time between write cycles
71 (up to 10ms for some models) */
72 unsigned long usec_delay_step; /* For adaptive algorithm */
73 int adapt_state; /* 1 = To high , 0 = Even, -1 = To low */
74
75 /* this one is to keep the read/write operations atomic */
4f0447b8 76 struct mutex lock;
1da177e4
LT
77 int retry_cnt_addr; /* Used to keep track of number of retries for
78 adaptive timing adjustments */
79 int retry_cnt_read;
80};
81
82static int eeprom_open(struct inode * inode, struct file * file);
83static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig);
84static ssize_t eeprom_read(struct file * file, char * buf, size_t count,
85 loff_t *off);
86static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
87 loff_t *off);
88static int eeprom_close(struct inode * inode, struct file * file);
89
90static int eeprom_address(unsigned long addr);
91static int read_from_eeprom(char * buf, int count);
92static int eeprom_write_buf(loff_t addr, const char * buf, int count);
93static int eeprom_read_buf(loff_t addr, char * buf, int count);
94
95static void eeprom_disable_write_protect(void);
96
97
98static const char eeprom_name[] = "eeprom";
99
100/* chip description */
101static struct eeprom_type eeprom;
102
103/* This is the exported file-operations structure for this device. */
5dfe4c96 104const struct file_operations eeprom_fops =
1da177e4
LT
105{
106 .llseek = eeprom_lseek,
107 .read = eeprom_read,
108 .write = eeprom_write,
109 .open = eeprom_open,
110 .release = eeprom_close
111};
112
113/* eeprom init call. Probes for different eeprom models. */
114
115int __init eeprom_init(void)
116{
4f0447b8 117 mutex_init(&eeprom.lock);
1da177e4
LT
118
119#ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
120#define EETEXT "Found"
121#else
122#define EETEXT "Assuming"
123#endif
124 if (register_chrdev(EEPROM_MAJOR_NR, eeprom_name, &eeprom_fops))
125 {
126 printk(KERN_INFO "%s: unable to get major %d for eeprom device\n",
127 eeprom_name, EEPROM_MAJOR_NR);
128 return -1;
129 }
130
131 printk("EEPROM char device v0.3, (c) 2000 Axis Communications AB\n");
132
133 /*
134 * Note: Most of this probing method was taken from the printserver (5470e)
135 * codebase. It did not contain a way of finding the 16kB chips
136 * (M24128 or variants). The method used here might not work
137 * for all models. If you encounter problems the easiest way
138 * is probably to define your model within #ifdef's, and hard-
139 * code it.
140 */
141
142 eeprom.size = 0;
143 eeprom.usec_delay_writecycles = INITIAL_WRITEDELAY_US;
144 eeprom.usec_delay_step = 128;
145 eeprom.adapt_state = 0;
146
147#ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
148 i2c_start();
149 i2c_outbyte(0x80);
150 if(!i2c_getack())
151 {
152 /* It's not 8k.. */
153 int success = 0;
154 unsigned char buf_2k_start[16];
155
156 /* Im not sure this will work... :) */
157 /* assume 2kB, if failure go for 16kB */
158 /* Test with 16kB settings.. */
159 /* If it's a 2kB EEPROM and we address it outside it's range
160 * it will mirror the address space:
161 * 1. We read two locations (that are mirrored),
162 * if the content differs * it's a 16kB EEPROM.
163 * 2. if it doesn't differ - write different value to one of the locations,
164 * check the other - if content still is the same it's a 2k EEPROM,
165 * restore original data.
166 */
167#define LOC1 8
168#define LOC2 (0x1fb) /*1fb, 3ed, 5df, 7d1 */
169
170 /* 2k settings */
171 i2c_stop();
172 eeprom.size = EEPROM_2KB;
173 eeprom.select_cmd = 0xA0;
174 eeprom.sequential_write_pagesize = 16;
175 if( eeprom_read_buf( 0, buf_2k_start, 16 ) == 16 )
176 {
177 D(printk("2k start: '%16.16s'\n", buf_2k_start));
178 }
179 else
180 {
181 printk(KERN_INFO "%s: Failed to read in 2k mode!\n", eeprom_name);
182 }
183
184 /* 16k settings */
185 eeprom.size = EEPROM_16KB;
186 eeprom.select_cmd = 0xA0;
187 eeprom.sequential_write_pagesize = 64;
188
189 {
190 unsigned char loc1[4], loc2[4], tmp[4];
191 if( eeprom_read_buf(LOC2, loc2, 4) == 4)
192 {
193 if( eeprom_read_buf(LOC1, loc1, 4) == 4)
194 {
195 D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
196 LOC1, loc1, LOC2, loc2));
197#if 0
198 if (memcmp(loc1, loc2, 4) != 0 )
199 {
200 /* It's 16k */
201 printk(KERN_INFO "%s: 16k detected in step 1\n", eeprom_name);
202 eeprom.size = EEPROM_16KB;
203 success = 1;
204 }
205 else
206#endif
207 {
208 /* Do step 2 check */
209 /* Invert value */
210 loc1[0] = ~loc1[0];
211 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
212 {
213 /* If 2k EEPROM this write will actually write 10 bytes
214 * from pos 0
215 */
216 D(printk("1 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
217 LOC1, loc1, LOC2, loc2));
218 if( eeprom_read_buf(LOC1, tmp, 4) == 4)
219 {
220 D(printk("2 loc1: (%i) '%4.4s' tmp '%4.4s'\n",
221 LOC1, loc1, tmp));
222 if (memcmp(loc1, tmp, 4) != 0 )
223 {
224 printk(KERN_INFO "%s: read and write differs! Not 16kB\n",
225 eeprom_name);
226 loc1[0] = ~loc1[0];
227
228 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
229 {
230 success = 1;
231 }
232 else
233 {
234 printk(KERN_INFO "%s: Restore 2k failed during probe,"
235 " EEPROM might be corrupt!\n", eeprom_name);
236
237 }
238 i2c_stop();
239 /* Go to 2k mode and write original data */
240 eeprom.size = EEPROM_2KB;
241 eeprom.select_cmd = 0xA0;
242 eeprom.sequential_write_pagesize = 16;
243 if( eeprom_write_buf(0, buf_2k_start, 16) == 16)
244 {
245 }
246 else
247 {
248 printk(KERN_INFO "%s: Failed to write back 2k start!\n",
249 eeprom_name);
250 }
251
252 eeprom.size = EEPROM_2KB;
253 }
254 }
255
256 if(!success)
257 {
258 if( eeprom_read_buf(LOC2, loc2, 1) == 1)
259 {
260 D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
261 LOC1, loc1, LOC2, loc2));
262 if (memcmp(loc1, loc2, 4) == 0 )
263 {
264 /* Data the same, must be mirrored -> 2k */
265 /* Restore data */
266 printk(KERN_INFO "%s: 2k detected in step 2\n", eeprom_name);
267 loc1[0] = ~loc1[0];
268 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
269 {
270 success = 1;
271 }
272 else
273 {
274 printk(KERN_INFO "%s: Restore 2k failed during probe,"
275 " EEPROM might be corrupt!\n", eeprom_name);
276
277 }
278
279 eeprom.size = EEPROM_2KB;
280 }
281 else
282 {
283 printk(KERN_INFO "%s: 16k detected in step 2\n",
284 eeprom_name);
285 loc1[0] = ~loc1[0];
286 /* Data differs, assume 16k */
287 /* Restore data */
288 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
289 {
290 success = 1;
291 }
292 else
293 {
294 printk(KERN_INFO "%s: Restore 16k failed during probe,"
295 " EEPROM might be corrupt!\n", eeprom_name);
296 }
297
298 eeprom.size = EEPROM_16KB;
299 }
300 }
301 }
302 }
303 } /* read LOC1 */
304 } /* address LOC1 */
305 if (!success)
306 {
307 printk(KERN_INFO "%s: Probing failed!, using 2KB!\n", eeprom_name);
308 eeprom.size = EEPROM_2KB;
309 }
310 } /* read */
311 }
312 }
313 else
314 {
315 i2c_outbyte(0x00);
316 if(!i2c_getack())
317 {
318 /* No 8k */
319 eeprom.size = EEPROM_2KB;
320 }
321 else
322 {
323 i2c_start();
324 i2c_outbyte(0x81);
325 if (!i2c_getack())
326 {
327 eeprom.size = EEPROM_2KB;
328 }
329 else
330 {
331 /* It's a 8kB */
332 i2c_inbyte();
333 eeprom.size = EEPROM_8KB;
334 }
335 }
336 }
337 i2c_stop();
338#elif defined(CONFIG_ETRAX_I2C_EEPROM_16KB)
339 eeprom.size = EEPROM_16KB;
340#elif defined(CONFIG_ETRAX_I2C_EEPROM_8KB)
341 eeprom.size = EEPROM_8KB;
342#elif defined(CONFIG_ETRAX_I2C_EEPROM_2KB)
343 eeprom.size = EEPROM_2KB;
344#endif
345
346 switch(eeprom.size)
347 {
348 case (EEPROM_2KB):
349 printk("%s: " EETEXT " i2c compatible 2kB eeprom.\n", eeprom_name);
350 eeprom.sequential_write_pagesize = 16;
351 eeprom.select_cmd = 0xA0;
352 break;
353 case (EEPROM_8KB):
354 printk("%s: " EETEXT " i2c compatible 8kB eeprom.\n", eeprom_name);
355 eeprom.sequential_write_pagesize = 16;
356 eeprom.select_cmd = 0x80;
357 break;
358 case (EEPROM_16KB):
359 printk("%s: " EETEXT " i2c compatible 16kB eeprom.\n", eeprom_name);
360 eeprom.sequential_write_pagesize = 64;
361 eeprom.select_cmd = 0xA0;
362 break;
363 default:
364 eeprom.size = 0;
365 printk("%s: Did not find a supported eeprom\n", eeprom_name);
366 break;
367 }
368
369
370
371 eeprom_disable_write_protect();
372
373 return 0;
374}
375
376/* Opens the device. */
1da177e4
LT
377static int eeprom_open(struct inode * inode, struct file * file)
378{
f2b9857e 379 cycle_kernel_lock();
32ea086b 380 if(iminor(inode) != EEPROM_MINOR_NR)
1da177e4 381 return -ENXIO;
32ea086b 382 if(imajor(inode) != EEPROM_MAJOR_NR)
1da177e4
LT
383 return -ENXIO;
384
385 if( eeprom.size > 0 )
386 {
387 /* OK */
388 return 0;
389 }
390
391 /* No EEprom found */
392 return -EFAULT;
393}
394
395/* Changes the current file position. */
396
397static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig)
398{
399/*
400 * orig 0: position from begning of eeprom
401 * orig 1: relative from current position
402 * orig 2: position from last eeprom address
403 */
404
405 switch (orig)
406 {
407 case 0:
408 file->f_pos = offset;
409 break;
410 case 1:
411 file->f_pos += offset;
412 break;
413 case 2:
414 file->f_pos = eeprom.size - offset;
415 break;
416 default:
417 return -EINVAL;
418 }
419
420 /* truncate position */
421 if (file->f_pos < 0)
422 {
423 file->f_pos = 0;
424 return(-EOVERFLOW);
425 }
426
427 if (file->f_pos >= eeprom.size)
428 {
429 file->f_pos = eeprom.size - 1;
430 return(-EOVERFLOW);
431 }
432
433 return ( file->f_pos );
434}
435
436/* Reads data from eeprom. */
437
438static int eeprom_read_buf(loff_t addr, char * buf, int count)
439{
82f3952c 440 return eeprom_read(NULL, buf, count, &addr);
1da177e4
LT
441}
442
443
444
445/* Reads data from eeprom. */
446
447static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t *off)
448{
449 int read=0;
82f3952c 450 unsigned long p = *off;
1da177e4
LT
451
452 unsigned char page;
453
454 if(p >= eeprom.size) /* Address i 0 - (size-1) */
455 {
456 return -EFAULT;
457 }
458
4f0447b8 459 if (mutex_lock_interruptible(&eeprom.lock))
7e920426 460 return -EINTR;
1da177e4 461
1da177e4
LT
462 page = (unsigned char) (p >> 8);
463
464 if(!eeprom_address(p))
465 {
466 printk(KERN_INFO "%s: Read failed to address the eeprom: "
467 "0x%08X (%i) page: %i\n", eeprom_name, (int)p, (int)p, page);
468 i2c_stop();
469
470 /* don't forget to wake them up */
4f0447b8 471 mutex_unlock(&eeprom.lock);
1da177e4
LT
472 return -EFAULT;
473 }
474
475 if( (p + count) > eeprom.size)
476 {
477 /* truncate count */
478 count = eeprom.size - p;
479 }
480
481 /* stop dummy write op and initiate the read op */
482 i2c_start();
483
484 /* special case for small eeproms */
485 if(eeprom.size < EEPROM_16KB)
486 {
487 i2c_outbyte( eeprom.select_cmd | 1 | (page << 1) );
488 }
489
490 /* go on with the actual read */
491 read = read_from_eeprom( buf, count);
492
493 if(read > 0)
494 {
82f3952c 495 *off += read;
1da177e4
LT
496 }
497
4f0447b8 498 mutex_unlock(&eeprom.lock);
1da177e4
LT
499 return read;
500}
501
502/* Writes data to eeprom. */
503
504static int eeprom_write_buf(loff_t addr, const char * buf, int count)
505{
82f3952c 506 return eeprom_write(NULL, buf, count, &addr);
1da177e4
LT
507}
508
509
510/* Writes data to eeprom. */
511
512static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
513 loff_t *off)
514{
515 int i, written, restart=1;
516 unsigned long p;
517
518 if (!access_ok(VERIFY_READ, buf, count))
519 {
520 return -EFAULT;
521 }
522
7e920426 523 /* bail out if we get interrupted */
4f0447b8 524 if (mutex_lock_interruptible(&eeprom.lock))
7e920426 525 return -EINTR;
1da177e4
LT
526 for(i = 0; (i < EEPROM_RETRIES) && (restart > 0); i++)
527 {
528 restart = 0;
529 written = 0;
82f3952c 530 p = *off;
1da177e4
LT
531
532
533 while( (written < count) && (p < eeprom.size))
534 {
535 /* address the eeprom */
536 if(!eeprom_address(p))
537 {
538 printk(KERN_INFO "%s: Write failed to address the eeprom: "
539 "0x%08X (%i) \n", eeprom_name, (int)p, (int)p);
540 i2c_stop();
541
542 /* don't forget to wake them up */
4f0447b8 543 mutex_unlock(&eeprom.lock);
1da177e4
LT
544 return -EFAULT;
545 }
546#ifdef EEPROM_ADAPTIVE_TIMING
547 /* Adaptive algorithm to adjust timing */
548 if (eeprom.retry_cnt_addr > 0)
549 {
550 /* To Low now */
551 D(printk(">D=%i d=%i\n",
552 eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
553
554 if (eeprom.usec_delay_step < 4)
555 {
556 eeprom.usec_delay_step++;
557 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
558 }
559 else
560 {
561
562 if (eeprom.adapt_state > 0)
563 {
564 /* To Low before */
565 eeprom.usec_delay_step *= 2;
566 if (eeprom.usec_delay_step > 2)
567 {
568 eeprom.usec_delay_step--;
569 }
570 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
571 }
572 else if (eeprom.adapt_state < 0)
573 {
574 /* To High before (toggle dir) */
575 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
576 if (eeprom.usec_delay_step > 1)
577 {
578 eeprom.usec_delay_step /= 2;
579 eeprom.usec_delay_step--;
580 }
581 }
582 }
583
584 eeprom.adapt_state = 1;
585 }
586 else
587 {
588 /* To High (or good) now */
589 D(printk("<D=%i d=%i\n",
590 eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
591
592 if (eeprom.adapt_state < 0)
593 {
594 /* To High before */
595 if (eeprom.usec_delay_step > 1)
596 {
597 eeprom.usec_delay_step *= 2;
598 eeprom.usec_delay_step--;
599
600 if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
601 {
602 eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
603 }
604 }
605 }
606 else if (eeprom.adapt_state > 0)
607 {
608 /* To Low before (toggle dir) */
609 if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
610 {
611 eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
612 }
613 if (eeprom.usec_delay_step > 1)
614 {
615 eeprom.usec_delay_step /= 2;
616 eeprom.usec_delay_step--;
617 }
618
619 eeprom.adapt_state = -1;
620 }
621
622 if (eeprom.adapt_state > -100)
623 {
624 eeprom.adapt_state--;
625 }
626 else
627 {
628 /* Restart adaption */
629 D(printk("#Restart\n"));
630 eeprom.usec_delay_step++;
631 }
632 }
633#endif /* EEPROM_ADAPTIVE_TIMING */
634 /* write until we hit a page boundary or count */
635 do
636 {
637 i2c_outbyte(buf[written]);
638 if(!i2c_getack())
639 {
640 restart=1;
641 printk(KERN_INFO "%s: write error, retrying. %d\n", eeprom_name, i);
642 i2c_stop();
643 break;
644 }
645 written++;
646 p++;
647 } while( written < count && ( p % eeprom.sequential_write_pagesize ));
648
649 /* end write cycle */
650 i2c_stop();
651 i2c_delay(eeprom.usec_delay_writecycles);
652 } /* while */
653 } /* for */
654
4f0447b8 655 mutex_unlock(&eeprom.lock);
82f3952c 656 if (written == 0 && p >= eeprom.size){
1da177e4
LT
657 return -ENOSPC;
658 }
82f3952c 659 *off = p;
1da177e4
LT
660 return written;
661}
662
663/* Closes the device. */
664
665static int eeprom_close(struct inode * inode, struct file * file)
666{
667 /* do nothing for now */
668 return 0;
669}
670
671/* Sets the current address of the eeprom. */
672
673static int eeprom_address(unsigned long addr)
674{
675 int i;
676 unsigned char page, offset;
677
678 page = (unsigned char) (addr >> 8);
679 offset = (unsigned char) addr;
680
681 for(i = 0; i < EEPROM_RETRIES; i++)
682 {
683 /* start a dummy write for addressing */
684 i2c_start();
685
686 if(eeprom.size == EEPROM_16KB)
687 {
688 i2c_outbyte( eeprom.select_cmd );
689 i2c_getack();
690 i2c_outbyte(page);
691 }
692 else
693 {
694 i2c_outbyte( eeprom.select_cmd | (page << 1) );
695 }
696 if(!i2c_getack())
697 {
698 /* retry */
699 i2c_stop();
700 /* Must have a delay here.. 500 works, >50, 100->works 5th time*/
701 i2c_delay(MAX_WRITEDELAY_US / EEPROM_RETRIES * i);
702 /* The chip needs up to 10 ms from write stop to next start */
703
704 }
705 else
706 {
707 i2c_outbyte(offset);
708
709 if(!i2c_getack())
710 {
711 /* retry */
712 i2c_stop();
713 }
714 else
715 break;
716 }
717 }
718
719
720 eeprom.retry_cnt_addr = i;
721 D(printk("%i\n", eeprom.retry_cnt_addr));
722 if(eeprom.retry_cnt_addr == EEPROM_RETRIES)
723 {
724 /* failed */
725 return 0;
726 }
727 return 1;
728}
729
730/* Reads from current address. */
731
732static int read_from_eeprom(char * buf, int count)
733{
734 int i, read=0;
735
736 for(i = 0; i < EEPROM_RETRIES; i++)
737 {
738 if(eeprom.size == EEPROM_16KB)
739 {
740 i2c_outbyte( eeprom.select_cmd | 1 );
741 }
742
743 if(i2c_getack())
744 {
745 break;
746 }
747 }
748
749 if(i == EEPROM_RETRIES)
750 {
751 printk(KERN_INFO "%s: failed to read from eeprom\n", eeprom_name);
752 i2c_stop();
753
754 return -EFAULT;
755 }
756
757 while( (read < count))
758 {
759 if (put_user(i2c_inbyte(), &buf[read++]))
760 {
761 i2c_stop();
762
763 return -EFAULT;
764 }
765
766 /*
767 * make sure we don't ack last byte or you will get very strange
768 * results!
769 */
770 if(read < count)
771 {
772 i2c_sendack();
773 }
774 }
775
776 /* stop the operation */
777 i2c_stop();
778
779 return read;
780}
781
782/* Disables write protection if applicable. */
783
784#define DBP_SAVE(x)
785#define ax_printf printk
786static void eeprom_disable_write_protect(void)
787{
788 /* Disable write protect */
789 if (eeprom.size == EEPROM_8KB)
790 {
791 /* Step 1 Set WEL = 1 (write 00000010 to address 1FFFh */
792 i2c_start();
793 i2c_outbyte(0xbe);
794 if(!i2c_getack())
795 {
796 DBP_SAVE(ax_printf("Get ack returns false\n"));
797 }
798 i2c_outbyte(0xFF);
799 if(!i2c_getack())
800 {
801 DBP_SAVE(ax_printf("Get ack returns false 2\n"));
802 }
803 i2c_outbyte(0x02);
804 if(!i2c_getack())
805 {
806 DBP_SAVE(ax_printf("Get ack returns false 3\n"));
807 }
808 i2c_stop();
809
810 i2c_delay(1000);
811
812 /* Step 2 Set RWEL = 1 (write 00000110 to address 1FFFh */
813 i2c_start();
814 i2c_outbyte(0xbe);
815 if(!i2c_getack())
816 {
817 DBP_SAVE(ax_printf("Get ack returns false 55\n"));
818 }
819 i2c_outbyte(0xFF);
820 if(!i2c_getack())
821 {
822 DBP_SAVE(ax_printf("Get ack returns false 52\n"));
823 }
824 i2c_outbyte(0x06);
825 if(!i2c_getack())
826 {
827 DBP_SAVE(ax_printf("Get ack returns false 53\n"));
828 }
829 i2c_stop();
830
831 /* Step 3 Set BP1, BP0, and/or WPEN bits (write 00000110 to address 1FFFh */
832 i2c_start();
833 i2c_outbyte(0xbe);
834 if(!i2c_getack())
835 {
836 DBP_SAVE(ax_printf("Get ack returns false 56\n"));
837 }
838 i2c_outbyte(0xFF);
839 if(!i2c_getack())
840 {
841 DBP_SAVE(ax_printf("Get ack returns false 57\n"));
842 }
843 i2c_outbyte(0x06);
844 if(!i2c_getack())
845 {
846 DBP_SAVE(ax_printf("Get ack returns false 58\n"));
847 }
848 i2c_stop();
849
850 /* Write protect disabled */
851 }
852}
853
854module_init(eeprom_init);
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