[deliverable/linux.git] / arch / frv / Kconfig

config FRV
	bool
	default y
	select HAVE_IDE
	select HAVE_ARCH_TRACEHOOK
	select HAVE_PERF_EVENTS
	select HAVE_UID16
	select VIRT_TO_BUS
	select GENERIC_IRQ_SHOW
	select HAVE_DEBUG_BUGVERBOSE
	select ARCH_HAVE_NMI_SAFE_CMPXCHG
	select GENERIC_CPU_DEVICES
	select ARCH_HAS_DEVMEM_IS_ALLOWED
	select ARCH_WANT_IPC_PARSE_VERSION
	select OLD_SIGSUSPEND3
	select OLD_SIGACTION
	select HAVE_DEBUG_STACKOVERFLOW

config ZONE_DMA
	bool
	default y

config RWSEM_GENERIC_SPINLOCK
	bool
	default y

config RWSEM_XCHGADD_ALGORITHM
	bool

config GENERIC_HWEIGHT
	bool
	default y

config GENERIC_CALIBRATE_DELAY
	bool
	default n

config TIME_LOW_RES
	bool
	default y

config QUICKLIST
	bool
	default y

config ARCH_HAS_ILOG2_U32
	bool
	default y

config ARCH_HAS_ILOG2_U64
	bool
	default y

config HZ
	int
	default 1000

source "init/Kconfig"

source "kernel/Kconfig.freezer"


menu "Fujitsu FR-V system setup"

config MMU
	bool "MMU support"
	help
	  This options switches on and off support for the FR-V MMU
	  (effectively switching between vmlinux and uClinux). Not all FR-V
	  CPUs support this. Currently only the FR451 has a sufficiently
	  featured MMU.

config FRV_OUTOFLINE_ATOMIC_OPS
	bool "Out-of-line the FRV atomic operations"
	default n
	help
	  Setting this option causes the FR-V atomic operations to be mostly
	  implemented out-of-line.

	  See Documentation/frv/atomic-ops.txt for more information.

config HIGHMEM
	bool "High memory support"
	depends on MMU
	default y
	help
	  If you wish to use more than 256MB of memory with your MMU based
	  system, you will need to select this option. The kernel can only see
	  the memory between 0xC0000000 and 0xD0000000 directly... everything
	  else must be kmapped.

	  The arch is, however, capable of supporting up to 3GB of SDRAM.

config HIGHPTE
	bool "Allocate page tables in highmem"
	depends on HIGHMEM
	default y
	help
	  The VM uses one page of memory for each page table.  For systems
	  with a lot of RAM, this can be wasteful of precious low memory.
	  Setting this option will put user-space page tables in high memory.

source "mm/Kconfig"

choice
	prompt "uClinux kernel load address"
	depends on !MMU
	default UCPAGE_OFFSET_C0000000
	help
	  This option sets the base address for the uClinux kernel. The kernel
	  will rearrange the SDRAM layout to start at this address, and move
	  itself to start there. It must be greater than 0, and it must be
	  sufficiently less than 0xE0000000 that the SDRAM does not intersect
	  the I/O region.

	  The base address must also be aligned such that the SDRAM controller
	  can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.

config UCPAGE_OFFSET_20000000
       bool "0x20000000"

config UCPAGE_OFFSET_40000000
       bool "0x40000000"

config UCPAGE_OFFSET_60000000
       bool "0x60000000"

config UCPAGE_OFFSET_80000000
       bool "0x80000000"

config UCPAGE_OFFSET_A0000000
       bool "0xA0000000"

config UCPAGE_OFFSET_C0000000
       bool "0xC0000000 (Recommended)"

endchoice

config PAGE_OFFSET
	hex
	default 0x20000000 if UCPAGE_OFFSET_20000000
	default 0x40000000 if UCPAGE_OFFSET_40000000
	default 0x60000000 if UCPAGE_OFFSET_60000000
	default 0x80000000 if UCPAGE_OFFSET_80000000
	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	default 0xC0000000

config PROTECT_KERNEL
	bool "Protect core kernel against userspace"
	depends on !MMU
	default y
	help
	  Selecting this option causes the uClinux kernel to change the
	  permittivity of DAMPR register covering the core kernel image to
	  prevent userspace accessing the underlying memory directly.

choice
	prompt "CPU Caching mode"
	default FRV_DEFL_CACHE_WBACK
	help
	  This option determines the default caching mode for the kernel.

	  Write-Back caching mode involves the all reads and writes causing
	  the affected cacheline to be read into the cache first before being
	  operated upon. Memory is not then updated by a write until the cache
	  is filled and a cacheline needs to be displaced from the cache to
	  make room. Only at that point is it written back.

	  Write-Behind caching is similar to Write-Back caching, except that a
	  write won't fetch a cacheline into the cache if there isn't already
	  one there; it will write directly to memory instead.

	  Write-Through caching only fetches cachelines from memory on a
	  read. Writes always get written directly to memory. If the affected
	  cacheline is also in cache, it will be updated too.

	  The final option is to turn of caching entirely.

	  Note that not all CPUs support Write-Behind caching. If the CPU on
	  which the kernel is running doesn't, it'll fall back to Write-Back
	  caching.

config FRV_DEFL_CACHE_WBACK
	bool "Write-Back"

config FRV_DEFL_CACHE_WBEHIND
	bool "Write-Behind"

config FRV_DEFL_CACHE_WTHRU
	bool "Write-Through"

config FRV_DEFL_CACHE_DISABLED
	bool "Disabled"

endchoice

menu "CPU core support"

config CPU_FR401
	bool "Include FR401 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR401, FR401A and FR403 CPUs

config CPU_FR405
	bool "Include FR405 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR405 CPU

config CPU_FR451
	bool "Include FR451 core support"
	default y
	help
	  This enables support for the FR451 CPU

config CPU_FR451_COMPILE
	bool "Specifically compile for FR451 core"
	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR451 CPU

config CPU_FR551
	bool "Include FR551 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR555 CPU

config CPU_FR551_COMPILE
	bool "Specifically compile for FR551 core"
	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR555 CPU

config FRV_L1_CACHE_SHIFT
	int
	default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
	default "6" if CPU_FR551

endmenu

choice
	prompt "System support"
	default MB93091_VDK

config MB93091_VDK
	bool "MB93091 CPU board with or without motherboard"

config MB93093_PDK
	bool "MB93093 PDK unit"

endchoice

if MB93091_VDK
choice
	prompt "Motherboard support"
	default MB93090_MB00

config MB93090_MB00
	bool "Use the MB93090-MB00 motherboard"
	help
	  Select this option if the MB93091 CPU board is going to be used with
	  a MB93090-MB00 VDK motherboard

config MB93091_NO_MB
	bool "Use standalone"
	help
	  Select this option if the MB93091 CPU board is going to be used
	  without a motherboard

endchoice
endif

config FUJITSU_MB93493
	bool "MB93493 Multimedia chip"
	help
	  Select this option if the MB93493 multimedia chip is going to be
	  used.

choice
	prompt "GP-Relative data support"
	default GPREL_DATA_8
	help
	  This option controls what data, if any, should be placed in the GP
	  relative data sections. Using this means that the compiler can
	  generate accesses to the data using GR16-relative addressing which
	  is faster than absolute instructions and saves space (2 instructions
	  per access).

	  However, the GPREL region is limited in size because the immediate
	  value used in the load and store instructions is limited to a 12-bit
	  signed number.

	  So if the linker starts complaining that accesses to GPREL data are
	  out of range, try changing this option from the default.

	  Note that modules will always be compiled with this feature disabled
	  as the module data will not be in range of the GP base address.

config GPREL_DATA_8
	bool "Put data objects of up to 8 bytes into GP-REL"

config GPREL_DATA_4
	bool "Put data objects of up to 4 bytes into GP-REL"

config GPREL_DATA_NONE
	bool "Don't use GP-REL"

endchoice

config FRV_ONCPU_SERIAL
	bool "Use on-CPU serial ports"
	select SERIAL_8250
	default y

config PCI
	bool "Use PCI"
	depends on MB93090_MB00
	default y
	select GENERIC_PCI_IOMAP
	help
	  Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	  onboard. If you have one of these boards and you wish to use the PCI
	  facilities, say Y here.

config RESERVE_DMA_COHERENT
	bool "Reserve DMA coherent memory"
	depends on PCI && !MMU
	default y
	help
	  Many PCI drivers require access to uncached memory for DMA device
	  communications (such as is done with some Ethernet buffer rings). If
	  a fully featured MMU is available, this can be done through page
	  table settings, but if not, a region has to be set aside and marked
	  with a special DAMPR register.

	  Setting this option causes uClinux to set aside a portion of the
	  available memory for use in this manner. The memory will then be
	  unavailable for normal kernel use.

source "drivers/pci/Kconfig"

source "drivers/pcmcia/Kconfig"

menu "Power management options"

config ARCH_SUSPEND_POSSIBLE
	def_bool y

source kernel/power/Kconfig
endmenu

endmenu


menu "Executable formats"

source "fs/Kconfig.binfmt"

endmenu

source "net/Kconfig"

source "drivers/Kconfig"

source "fs/Kconfig"

source "arch/frv/Kconfig.debug"

source "security/Kconfig"

source "crypto/Kconfig"

source "lib/Kconfig"
Commit	Line	Data
1da177e4 LT	1	config FRV
	2	bool
	3	default y
ec7748b5	4	select HAVE_IDE
4a3b9893	5	select HAVE_ARCH_TRACEHOOK
cdd6c482	6	select HAVE_PERF_EVENTS
af1839eb	7	select HAVE_UID16
4febd95a	8	select VIRT_TO_BUS
3062aa50	9	select GENERIC_IRQ_SHOW
9b2a60c4	10	select HAVE_DEBUG_BUGVERBOSE
df013ffb	11	select ARCH_HAVE_NMI_SAFE_CMPXCHG
9f13a1fd	12	select GENERIC_CPU_DEVICES
21266be9	13	select ARCH_HAS_DEVMEM_IS_ALLOWED
c1d7e01d	14	select ARCH_WANT_IPC_PARSE_VERSION
39e08a9b	15	select OLD_SIGSUSPEND3
177b6703	16	select OLD_SIGACTION
d1a1dc0b	17	select HAVE_DEBUG_STACKOVERFLOW
1da177e4	18
66701b14 CL	19	config ZONE_DMA
	20	bool
	21	default y
	22
1da177e4 LT	23	config RWSEM_GENERIC_SPINLOCK
	24	bool
	25	default y
	26
	27	config RWSEM_XCHGADD_ALGORITHM
	28	bool
	29
1f6d7a93 AM	30	config GENERIC_HWEIGHT
	31	bool
	32	default y
	33
1da177e4 LT	34	config GENERIC_CALIBRATE_DELAY
	35	bool
	36	default n
	37
06027bdd IM	38	config TIME_LOW_RES
	39	bool
	40	default y
	41
8defab33	42	config QUICKLIST
f0d1b0b3 DH	43	bool
	44	default y
	45
8defab33	46	config ARCH_HAS_ILOG2_U32
f0d1b0b3 DH	47	bool
	48	default y
	49
8defab33	50	config ARCH_HAS_ILOG2_U64
81819f0f CL	51	bool
	52	default y
	53
bdc80787 PA	54	config HZ
	55	int
	56	default 1000
	57
1da177e4 LT	58	source "init/Kconfig"
1da177e4 LT	59
dc52ddc0 MH	60	source "kernel/Kconfig.freezer"
dc52ddc0 MH	61
1da177e4 LT	62
	63	menu "Fujitsu FR-V system setup"
	64
	65	config MMU
	66	bool "MMU support"
	67	help
	68	This options switches on and off support for the FR-V MMU
	69	(effectively switching between vmlinux and uClinux). Not all FR-V
	70	CPUs support this. Currently only the FR451 has a sufficiently
	71	featured MMU.
	72
	73	config FRV_OUTOFLINE_ATOMIC_OPS
	74	bool "Out-of-line the FRV atomic operations"
	75	default n
	76	help
	77	Setting this option causes the FR-V atomic operations to be mostly
	78	implemented out-of-line.
	79
0868ff7a	80	See Documentation/frv/atomic-ops.txt for more information.
1da177e4 LT	81
	82	config HIGHMEM
	83	bool "High memory support"
	84	depends on MMU
	85	default y
	86	help
	87	If you wish to use more than 256MB of memory with your MMU based
	88	system, you will need to select this option. The kernel can only see
	89	the memory between 0xC0000000 and 0xD0000000 directly... everything
	90	else must be kmapped.
	91
	92	The arch is, however, capable of supporting up to 3GB of SDRAM.
	93
	94	config HIGHPTE
	95	bool "Allocate page tables in highmem"
	96	depends on HIGHMEM
	97	default y
	98	help
	99	The VM uses one page of memory for each page table. For systems
	100	with a lot of RAM, this can be wasteful of precious low memory.
	101	Setting this option will put user-space page tables in high memory.
	102
3f22ab27 DH	103	source "mm/Kconfig"
3f22ab27 DH	104
1da177e4 LT	105	choice
	106	prompt "uClinux kernel load address"
	107	depends on !MMU
	108	default UCPAGE_OFFSET_C0000000
	109	help
	110	This option sets the base address for the uClinux kernel. The kernel
	111	will rearrange the SDRAM layout to start at this address, and move
	112	itself to start there. It must be greater than 0, and it must be
	113	sufficiently less than 0xE0000000 that the SDRAM does not intersect
	114	the I/O region.
	115
	116	The base address must also be aligned such that the SDRAM controller
	117	can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
	118
	119	config UCPAGE_OFFSET_20000000
	120	bool "0x20000000"
	121
	122	config UCPAGE_OFFSET_40000000
	123	bool "0x40000000"
	124
	125	config UCPAGE_OFFSET_60000000
	126	bool "0x60000000"
	127
	128	config UCPAGE_OFFSET_80000000
	129	bool "0x80000000"
	130
	131	config UCPAGE_OFFSET_A0000000
	132	bool "0xA0000000"
	133
	134	config UCPAGE_OFFSET_C0000000
	135	bool "0xC0000000 (Recommended)"
	136
	137	endchoice
	138
7038220a DH	139	config PAGE_OFFSET
	140	hex
	141	default 0x20000000 if UCPAGE_OFFSET_20000000
	142	default 0x40000000 if UCPAGE_OFFSET_40000000
	143	default 0x60000000 if UCPAGE_OFFSET_60000000
	144	default 0x80000000 if UCPAGE_OFFSET_80000000
	145	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	146	default 0xC0000000
	147
1da177e4 LT	148	config PROTECT_KERNEL
	149	bool "Protect core kernel against userspace"
	150	depends on !MMU
	151	default y
	152	help
	153	Selecting this option causes the uClinux kernel to change the
	154	permittivity of DAMPR register covering the core kernel image to
	155	prevent userspace accessing the underlying memory directly.
	156
	157	choice
	158	prompt "CPU Caching mode"
	159	default FRV_DEFL_CACHE_WBACK
	160	help
	161	This option determines the default caching mode for the kernel.
	162
	163	Write-Back caching mode involves the all reads and writes causing
	164	the affected cacheline to be read into the cache first before being
	165	operated upon. Memory is not then updated by a write until the cache
	166	is filled and a cacheline needs to be displaced from the cache to
	167	make room. Only at that point is it written back.
	168
	169	Write-Behind caching is similar to Write-Back caching, except that a
	170	write won't fetch a cacheline into the cache if there isn't already
	171	one there; it will write directly to memory instead.
	172
	173	Write-Through caching only fetches cachelines from memory on a
	174	read. Writes always get written directly to memory. If the affected
	175	cacheline is also in cache, it will be updated too.
	176
	177	The final option is to turn of caching entirely.
	178
	179	Note that not all CPUs support Write-Behind caching. If the CPU on
	180	which the kernel is running doesn't, it'll fall back to Write-Back
	181	caching.
	182
	183	config FRV_DEFL_CACHE_WBACK
	184	bool "Write-Back"
	185
	186	config FRV_DEFL_CACHE_WBEHIND
	187	bool "Write-Behind"
	188
	189	config FRV_DEFL_CACHE_WTHRU
	190	bool "Write-Through"
	191
	192	config FRV_DEFL_CACHE_DISABLED
	193	bool "Disabled"
	194
	195	endchoice
	196
	197	menu "CPU core support"
	198
	199	config CPU_FR401
	200	bool "Include FR401 core support"
	201	depends on !MMU
	202	default y
	203	help
	204	This enables support for the FR401, FR401A and FR403 CPUs
	205
	206	config CPU_FR405
	207	bool "Include FR405 core support"
	208	depends on !MMU
	209	default y
	210	help
	211	This enables support for the FR405 CPU
212
213	config CPU_FR451
214	bool "Include FR451 core support"
215	default y
216	help
217	This enables support for the FR451 CPU
218
219	config CPU_FR451_COMPILE
220	bool "Specifically compile for FR451 core"
221	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
222	default y
223	help
224	This causes appropriate flags to be passed to the compiler to
225	optimise for the FR451 CPU
226
227	config CPU_FR551
228	bool "Include FR551 core support"
229	depends on !MMU
230	default y
231	help
232	This enables support for the FR555 CPU
233
234	config CPU_FR551_COMPILE
235	bool "Specifically compile for FR551 core"
236	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
237	default y
238	help
239	This causes appropriate flags to be passed to the compiler to
240	optimise for the FR555 CPU
241
242	config FRV_L1_CACHE_SHIFT
243	int
244	default "5" if CPU_FR401 \|\| CPU_FR405 \|\| CPU_FR451
245	default "6" if CPU_FR551
246
247	endmenu
248
249	choice
250	prompt "System support"
251	default MB93091_VDK
252
253	config MB93091_VDK
254	bool "MB93091 CPU board with or without motherboard"
255
256	config MB93093_PDK
257	bool "MB93093 PDK unit"
258
259	endchoice
260
261	if MB93091_VDK
262	choice
263	prompt "Motherboard support"
264	default MB93090_MB00
265
266	config MB93090_MB00
267	bool "Use the MB93090-MB00 motherboard"
268	help
269	Select this option if the MB93091 CPU board is going to be used with
270	a MB93090-MB00 VDK motherboard
271
272	config MB93091_NO_MB
273	bool "Use standalone"
274	help
275	Select this option if the MB93091 CPU board is going to be used
276	without a motherboard
277
278	endchoice
279	endif
280
1bcbba30 DH	281	config FUJITSU_MB93493
	282	bool "MB93493 Multimedia chip"
	283	help
	284	Select this option if the MB93493 multimedia chip is going to be
	285	used.
	286
1da177e4 LT	287	choice
	288	prompt "GP-Relative data support"
	289	default GPREL_DATA_8
	290	help
	291	This option controls what data, if any, should be placed in the GP
	292	relative data sections. Using this means that the compiler can
	293	generate accesses to the data using GR16-relative addressing which
	294	is faster than absolute instructions and saves space (2 instructions
	295	per access).
	296
	297	However, the GPREL region is limited in size because the immediate
	298	value used in the load and store instructions is limited to a 12-bit
	299	signed number.
	300
	301	So if the linker starts complaining that accesses to GPREL data are
	302	out of range, try changing this option from the default.
	303
	304	Note that modules will always be compiled with this feature disabled
	305	as the module data will not be in range of the GP base address.
	306
	307	config GPREL_DATA_8
	308	bool "Put data objects of up to 8 bytes into GP-REL"
	309
	310	config GPREL_DATA_4
	311	bool "Put data objects of up to 4 bytes into GP-REL"
	312
	313	config GPREL_DATA_NONE
	314	bool "Don't use GP-REL"
	315
	316	endchoice
	317
f8aec757 DH	318	config FRV_ONCPU_SERIAL
	319	bool "Use on-CPU serial ports"
	320	select SERIAL_8250
	321	default y
	322
1da177e4 LT	323	config PCI
	324	bool "Use PCI"
	325	depends on MB93090_MB00
	326	default y
53224185	327	select GENERIC_PCI_IOMAP
1da177e4 LT	328	help
	329	Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	330	onboard. If you have one of these boards and you wish to use the PCI
	331	facilities, say Y here.
	332
1da177e4 LT	333	config RESERVE_DMA_COHERENT
	334	bool "Reserve DMA coherent memory"
	335	depends on PCI && !MMU
	336	default y
	337	help
	338	Many PCI drivers require access to uncached memory for DMA device
	339	communications (such as is done with some Ethernet buffer rings). If
	340	a fully featured MMU is available, this can be done through page
	341	table settings, but if not, a region has to be set aside and marked
	342	with a special DAMPR register.
	343
	344	Setting this option causes uClinux to set aside a portion of the
	345	available memory for use in this manner. The memory will then be
	346	unavailable for normal kernel use.
	347
	348	source "drivers/pci/Kconfig"
	349
7a758313	350	source "drivers/pcmcia/Kconfig"
1da177e4	351
1da177e4	352	menu "Power management options"
f4cb5700 JB	353
	354	config ARCH_SUSPEND_POSSIBLE
	355	def_bool y
f4cb5700	356
1da177e4 LT	357	source kernel/power/Kconfig
	358	endmenu
	359
	360	endmenu
	361
	362
	363	menu "Executable formats"
	364
	365	source "fs/Kconfig.binfmt"
	366
	367	endmenu
	368
d5950b43 SR	369	source "net/Kconfig"
d5950b43 SR	370
1da177e4 LT	371	source "drivers/Kconfig"
	372
	373	source "fs/Kconfig"
	374
	375	source "arch/frv/Kconfig.debug"
	376
	377	source "security/Kconfig"
	378
	379	source "crypto/Kconfig"
	380
	381	source "lib/Kconfig"