[deliverable/linux.git] / arch / frv / Kconfig

config FRV
	bool
	default y
	select HAVE_IDE
	select HAVE_ARCH_TRACEHOOK
	select HAVE_IRQ_WORK
	select HAVE_PERF_EVENTS
	select HAVE_UID16
	select HAVE_GENERIC_HARDIRQS
	select GENERIC_IRQ_SHOW
	select HAVE_DEBUG_BUGVERBOSE
	select ARCH_HAVE_NMI_SAFE_CMPXCHG
	select GENERIC_CPU_DEVICES
	select ARCH_WANT_IPC_PARSE_VERSION

config ZONE_DMA
	bool
	default y

config RWSEM_GENERIC_SPINLOCK
	bool
	default y

config RWSEM_XCHGADD_ALGORITHM
	bool

config GENERIC_HWEIGHT
	bool
	default y

config GENERIC_CALIBRATE_DELAY
	bool
	default n

config TIME_LOW_RES
	bool
	default y

config QUICKLIST
	bool
	default y

config ARCH_HAS_ILOG2_U32
	bool
	default y

config ARCH_HAS_ILOG2_U64
	bool
	default y

config HZ
	int
	default 1000

source "init/Kconfig"

source "kernel/Kconfig.freezer"


menu "Fujitsu FR-V system setup"

config MMU
	bool "MMU support"
	help
	  This options switches on and off support for the FR-V MMU
	  (effectively switching between vmlinux and uClinux). Not all FR-V
	  CPUs support this. Currently only the FR451 has a sufficiently
	  featured MMU.

config FRV_OUTOFLINE_ATOMIC_OPS
	bool "Out-of-line the FRV atomic operations"
	default n
	help
	  Setting this option causes the FR-V atomic operations to be mostly
	  implemented out-of-line.

	  See Documentation/frv/atomic-ops.txt for more information.

config HIGHMEM
	bool "High memory support"
	depends on MMU
	default y
	help
	  If you wish to use more than 256MB of memory with your MMU based
	  system, you will need to select this option. The kernel can only see
	  the memory between 0xC0000000 and 0xD0000000 directly... everything
	  else must be kmapped.

	  The arch is, however, capable of supporting up to 3GB of SDRAM.

config HIGHPTE
	bool "Allocate page tables in highmem"
	depends on HIGHMEM
	default y
	help
	  The VM uses one page of memory for each page table.  For systems
	  with a lot of RAM, this can be wasteful of precious low memory.
	  Setting this option will put user-space page tables in high memory.

source "mm/Kconfig"

choice
	prompt "uClinux kernel load address"
	depends on !MMU
	default UCPAGE_OFFSET_C0000000
	help
	  This option sets the base address for the uClinux kernel. The kernel
	  will rearrange the SDRAM layout to start at this address, and move
	  itself to start there. It must be greater than 0, and it must be
	  sufficiently less than 0xE0000000 that the SDRAM does not intersect
	  the I/O region.

	  The base address must also be aligned such that the SDRAM controller
	  can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.

config UCPAGE_OFFSET_20000000
       bool "0x20000000"

config UCPAGE_OFFSET_40000000
       bool "0x40000000"

config UCPAGE_OFFSET_60000000
       bool "0x60000000"

config UCPAGE_OFFSET_80000000
       bool "0x80000000"

config UCPAGE_OFFSET_A0000000
       bool "0xA0000000"

config UCPAGE_OFFSET_C0000000
       bool "0xC0000000 (Recommended)"

endchoice

config PAGE_OFFSET
	hex
	default 0x20000000 if UCPAGE_OFFSET_20000000
	default 0x40000000 if UCPAGE_OFFSET_40000000
	default 0x60000000 if UCPAGE_OFFSET_60000000
	default 0x80000000 if UCPAGE_OFFSET_80000000
	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	default 0xC0000000

config PROTECT_KERNEL
	bool "Protect core kernel against userspace"
	depends on !MMU
	default y
	help
	  Selecting this option causes the uClinux kernel to change the
	  permittivity of DAMPR register covering the core kernel image to
	  prevent userspace accessing the underlying memory directly.

choice
	prompt "CPU Caching mode"
	default FRV_DEFL_CACHE_WBACK
	help
	  This option determines the default caching mode for the kernel.

	  Write-Back caching mode involves the all reads and writes causing
	  the affected cacheline to be read into the cache first before being
	  operated upon. Memory is not then updated by a write until the cache
	  is filled and a cacheline needs to be displaced from the cache to
	  make room. Only at that point is it written back.

	  Write-Behind caching is similar to Write-Back caching, except that a
	  write won't fetch a cacheline into the cache if there isn't already
	  one there; it will write directly to memory instead.

	  Write-Through caching only fetches cachelines from memory on a
	  read. Writes always get written directly to memory. If the affected
	  cacheline is also in cache, it will be updated too.

	  The final option is to turn of caching entirely.

	  Note that not all CPUs support Write-Behind caching. If the CPU on
	  which the kernel is running doesn't, it'll fall back to Write-Back
	  caching.

config FRV_DEFL_CACHE_WBACK
	bool "Write-Back"

config FRV_DEFL_CACHE_WBEHIND
	bool "Write-Behind"

config FRV_DEFL_CACHE_WTHRU
	bool "Write-Through"

config FRV_DEFL_CACHE_DISABLED
	bool "Disabled"

endchoice

menu "CPU core support"

config CPU_FR401
	bool "Include FR401 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR401, FR401A and FR403 CPUs

config CPU_FR405
	bool "Include FR405 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR405 CPU

config CPU_FR451
	bool "Include FR451 core support"
	default y
	help
	  This enables support for the FR451 CPU

config CPU_FR451_COMPILE
	bool "Specifically compile for FR451 core"
	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR451 CPU

config CPU_FR551
	bool "Include FR551 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR555 CPU

config CPU_FR551_COMPILE
	bool "Specifically compile for FR551 core"
	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR555 CPU

config FRV_L1_CACHE_SHIFT
	int
	default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
	default "6" if CPU_FR551

endmenu

choice
	prompt "System support"
	default MB93091_VDK

config MB93091_VDK
	bool "MB93091 CPU board with or without motherboard"

config MB93093_PDK
	bool "MB93093 PDK unit"

endchoice

if MB93091_VDK
choice
	prompt "Motherboard support"
	default MB93090_MB00

config MB93090_MB00
	bool "Use the MB93090-MB00 motherboard"
	help
	  Select this option if the MB93091 CPU board is going to be used with
	  a MB93090-MB00 VDK motherboard

config MB93091_NO_MB
	bool "Use standalone"
	help
	  Select this option if the MB93091 CPU board is going to be used
	  without a motherboard

endchoice
endif

config FUJITSU_MB93493
	bool "MB93493 Multimedia chip"
	help
	  Select this option if the MB93493 multimedia chip is going to be
	  used.

choice
	prompt "GP-Relative data support"
	default GPREL_DATA_8
	help
	  This option controls what data, if any, should be placed in the GP
	  relative data sections. Using this means that the compiler can
	  generate accesses to the data using GR16-relative addressing which
	  is faster than absolute instructions and saves space (2 instructions
	  per access).

	  However, the GPREL region is limited in size because the immediate
	  value used in the load and store instructions is limited to a 12-bit
	  signed number.

	  So if the linker starts complaining that accesses to GPREL data are
	  out of range, try changing this option from the default.

	  Note that modules will always be compiled with this feature disabled
	  as the module data will not be in range of the GP base address.

config GPREL_DATA_8
	bool "Put data objects of up to 8 bytes into GP-REL"

config GPREL_DATA_4
	bool "Put data objects of up to 4 bytes into GP-REL"

config GPREL_DATA_NONE
	bool "Don't use GP-REL"

endchoice

config FRV_ONCPU_SERIAL
	bool "Use on-CPU serial ports"
	select SERIAL_8250
	default y

config PCI
	bool "Use PCI"
	depends on MB93090_MB00
	default y
	select GENERIC_PCI_IOMAP
	help
	  Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	  onboard. If you have one of these boards and you wish to use the PCI
	  facilities, say Y here.

config RESERVE_DMA_COHERENT
	bool "Reserve DMA coherent memory"
	depends on PCI && !MMU
	default y
	help
	  Many PCI drivers require access to uncached memory for DMA device
	  communications (such as is done with some Ethernet buffer rings). If
	  a fully featured MMU is available, this can be done through page
	  table settings, but if not, a region has to be set aside and marked
	  with a special DAMPR register.

	  Setting this option causes uClinux to set aside a portion of the
	  available memory for use in this manner. The memory will then be
	  unavailable for normal kernel use.

source "drivers/pci/Kconfig"

source "drivers/pcmcia/Kconfig"

menu "Power management options"

config ARCH_SUSPEND_POSSIBLE
	def_bool y

source kernel/power/Kconfig
endmenu

endmenu


menu "Executable formats"

source "fs/Kconfig.binfmt"

endmenu

source "net/Kconfig"

source "drivers/Kconfig"

source "fs/Kconfig"

source "arch/frv/Kconfig.debug"

source "security/Kconfig"

source "crypto/Kconfig"

source "lib/Kconfig"
Commit	Line	Data
1da177e4 LT	1	config FRV
	2	bool
	3	default y
ec7748b5	4	select HAVE_IDE
4a3b9893	5	select HAVE_ARCH_TRACEHOOK
e360adbe	6	select HAVE_IRQ_WORK
cdd6c482	7	select HAVE_PERF_EVENTS
af1839eb	8	select HAVE_UID16
f39b02d6	9	select HAVE_GENERIC_HARDIRQS
3062aa50	10	select GENERIC_IRQ_SHOW
9b2a60c4	11	select HAVE_DEBUG_BUGVERBOSE
df013ffb	12	select ARCH_HAVE_NMI_SAFE_CMPXCHG
9f13a1fd	13	select GENERIC_CPU_DEVICES
c1d7e01d	14	select ARCH_WANT_IPC_PARSE_VERSION
1da177e4	15
66701b14 CL	16	config ZONE_DMA
	17	bool
	18	default y
	19
1da177e4 LT	20	config RWSEM_GENERIC_SPINLOCK
	21	bool
	22	default y
	23
	24	config RWSEM_XCHGADD_ALGORITHM
	25	bool
	26
1f6d7a93 AM	27	config GENERIC_HWEIGHT
	28	bool
	29	default y
	30
1da177e4 LT	31	config GENERIC_CALIBRATE_DELAY
	32	bool
	33	default n
	34
06027bdd IM	35	config TIME_LOW_RES
	36	bool
	37	default y
	38
8defab33	39	config QUICKLIST
f0d1b0b3 DH	40	bool
	41	default y
	42
8defab33	43	config ARCH_HAS_ILOG2_U32
f0d1b0b3 DH	44	bool
	45	default y
	46
8defab33	47	config ARCH_HAS_ILOG2_U64
81819f0f CL	48	bool
	49	default y
	50
bdc80787 PA	51	config HZ
	52	int
	53	default 1000
	54
1da177e4 LT	55	source "init/Kconfig"
1da177e4 LT	56
dc52ddc0 MH	57	source "kernel/Kconfig.freezer"
dc52ddc0 MH	58
1da177e4 LT	59
	60	menu "Fujitsu FR-V system setup"
	61
	62	config MMU
	63	bool "MMU support"
	64	help
	65	This options switches on and off support for the FR-V MMU
	66	(effectively switching between vmlinux and uClinux). Not all FR-V
	67	CPUs support this. Currently only the FR451 has a sufficiently
	68	featured MMU.
	69
	70	config FRV_OUTOFLINE_ATOMIC_OPS
	71	bool "Out-of-line the FRV atomic operations"
	72	default n
	73	help
	74	Setting this option causes the FR-V atomic operations to be mostly
	75	implemented out-of-line.
	76
0868ff7a	77	See Documentation/frv/atomic-ops.txt for more information.
1da177e4 LT	78
	79	config HIGHMEM
	80	bool "High memory support"
	81	depends on MMU
	82	default y
	83	help
	84	If you wish to use more than 256MB of memory with your MMU based
	85	system, you will need to select this option. The kernel can only see
	86	the memory between 0xC0000000 and 0xD0000000 directly... everything
	87	else must be kmapped.
	88
	89	The arch is, however, capable of supporting up to 3GB of SDRAM.
	90
	91	config HIGHPTE
	92	bool "Allocate page tables in highmem"
	93	depends on HIGHMEM
	94	default y
	95	help
	96	The VM uses one page of memory for each page table. For systems
	97	with a lot of RAM, this can be wasteful of precious low memory.
	98	Setting this option will put user-space page tables in high memory.
	99
3f22ab27 DH	100	source "mm/Kconfig"
3f22ab27 DH	101
1da177e4 LT	102	choice
	103	prompt "uClinux kernel load address"
	104	depends on !MMU
	105	default UCPAGE_OFFSET_C0000000
	106	help
	107	This option sets the base address for the uClinux kernel. The kernel
	108	will rearrange the SDRAM layout to start at this address, and move
	109	itself to start there. It must be greater than 0, and it must be
	110	sufficiently less than 0xE0000000 that the SDRAM does not intersect
	111	the I/O region.
	112
	113	The base address must also be aligned such that the SDRAM controller
	114	can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
	115
	116	config UCPAGE_OFFSET_20000000
	117	bool "0x20000000"
	118
	119	config UCPAGE_OFFSET_40000000
	120	bool "0x40000000"
	121
	122	config UCPAGE_OFFSET_60000000
	123	bool "0x60000000"
	124
	125	config UCPAGE_OFFSET_80000000
	126	bool "0x80000000"
	127
	128	config UCPAGE_OFFSET_A0000000
	129	bool "0xA0000000"
	130
	131	config UCPAGE_OFFSET_C0000000
	132	bool "0xC0000000 (Recommended)"
	133
	134	endchoice
	135
7038220a DH	136	config PAGE_OFFSET
	137	hex
	138	default 0x20000000 if UCPAGE_OFFSET_20000000
	139	default 0x40000000 if UCPAGE_OFFSET_40000000
	140	default 0x60000000 if UCPAGE_OFFSET_60000000
	141	default 0x80000000 if UCPAGE_OFFSET_80000000
	142	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	143	default 0xC0000000
	144
1da177e4 LT	145	config PROTECT_KERNEL
	146	bool "Protect core kernel against userspace"
	147	depends on !MMU
	148	default y
	149	help
	150	Selecting this option causes the uClinux kernel to change the
	151	permittivity of DAMPR register covering the core kernel image to
	152	prevent userspace accessing the underlying memory directly.
	153
	154	choice
	155	prompt "CPU Caching mode"
	156	default FRV_DEFL_CACHE_WBACK
	157	help
	158	This option determines the default caching mode for the kernel.
	159
	160	Write-Back caching mode involves the all reads and writes causing
	161	the affected cacheline to be read into the cache first before being
	162	operated upon. Memory is not then updated by a write until the cache
	163	is filled and a cacheline needs to be displaced from the cache to
	164	make room. Only at that point is it written back.
	165
	166	Write-Behind caching is similar to Write-Back caching, except that a
	167	write won't fetch a cacheline into the cache if there isn't already
	168	one there; it will write directly to memory instead.
	169
	170	Write-Through caching only fetches cachelines from memory on a
	171	read. Writes always get written directly to memory. If the affected
	172	cacheline is also in cache, it will be updated too.
	173
	174	The final option is to turn of caching entirely.
	175
	176	Note that not all CPUs support Write-Behind caching. If the CPU on
	177	which the kernel is running doesn't, it'll fall back to Write-Back
	178	caching.
	179
	180	config FRV_DEFL_CACHE_WBACK
	181	bool "Write-Back"
	182
	183	config FRV_DEFL_CACHE_WBEHIND
	184	bool "Write-Behind"
	185
	186	config FRV_DEFL_CACHE_WTHRU
	187	bool "Write-Through"
	188
	189	config FRV_DEFL_CACHE_DISABLED
	190	bool "Disabled"
	191
	192	endchoice
	193
	194	menu "CPU core support"
	195
	196	config CPU_FR401
	197	bool "Include FR401 core support"
	198	depends on !MMU
	199	default y
	200	help
	201	This enables support for the FR401, FR401A and FR403 CPUs
	202
	203	config CPU_FR405
	204	bool "Include FR405 core support"
	205	depends on !MMU
	206	default y
	207	help
	208	This enables support for the FR405 CPU
209
210	config CPU_FR451
211	bool "Include FR451 core support"
212	default y
213	help
214	This enables support for the FR451 CPU
215
216	config CPU_FR451_COMPILE
217	bool "Specifically compile for FR451 core"
218	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
219	default y
220	help
221	This causes appropriate flags to be passed to the compiler to
222	optimise for the FR451 CPU
223
224	config CPU_FR551
225	bool "Include FR551 core support"
226	depends on !MMU
227	default y
228	help
229	This enables support for the FR555 CPU
230
231	config CPU_FR551_COMPILE
232	bool "Specifically compile for FR551 core"
233	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
234	default y
235	help
236	This causes appropriate flags to be passed to the compiler to
237	optimise for the FR555 CPU
238
239	config FRV_L1_CACHE_SHIFT
240	int
241	default "5" if CPU_FR401 \|\| CPU_FR405 \|\| CPU_FR451
242	default "6" if CPU_FR551
243
244	endmenu
245
246	choice
247	prompt "System support"
248	default MB93091_VDK
249
250	config MB93091_VDK
251	bool "MB93091 CPU board with or without motherboard"
252
253	config MB93093_PDK
254	bool "MB93093 PDK unit"
255
256	endchoice
257
258	if MB93091_VDK
259	choice
260	prompt "Motherboard support"
261	default MB93090_MB00
262
263	config MB93090_MB00
264	bool "Use the MB93090-MB00 motherboard"
265	help
266	Select this option if the MB93091 CPU board is going to be used with
267	a MB93090-MB00 VDK motherboard
268
269	config MB93091_NO_MB
270	bool "Use standalone"
271	help
272	Select this option if the MB93091 CPU board is going to be used
273	without a motherboard
274
275	endchoice
276	endif
277
1bcbba30 DH	278	config FUJITSU_MB93493
	279	bool "MB93493 Multimedia chip"
	280	help
	281	Select this option if the MB93493 multimedia chip is going to be
	282	used.
	283
1da177e4 LT	284	choice
	285	prompt "GP-Relative data support"
	286	default GPREL_DATA_8
	287	help
	288	This option controls what data, if any, should be placed in the GP
	289	relative data sections. Using this means that the compiler can
	290	generate accesses to the data using GR16-relative addressing which
	291	is faster than absolute instructions and saves space (2 instructions
	292	per access).
	293
	294	However, the GPREL region is limited in size because the immediate
	295	value used in the load and store instructions is limited to a 12-bit
	296	signed number.
	297
	298	So if the linker starts complaining that accesses to GPREL data are
	299	out of range, try changing this option from the default.
	300
	301	Note that modules will always be compiled with this feature disabled
	302	as the module data will not be in range of the GP base address.
	303
	304	config GPREL_DATA_8
	305	bool "Put data objects of up to 8 bytes into GP-REL"
	306
	307	config GPREL_DATA_4
	308	bool "Put data objects of up to 4 bytes into GP-REL"
	309
	310	config GPREL_DATA_NONE
	311	bool "Don't use GP-REL"
	312
	313	endchoice
	314
f8aec757 DH	315	config FRV_ONCPU_SERIAL
	316	bool "Use on-CPU serial ports"
	317	select SERIAL_8250
	318	default y
	319
1da177e4 LT	320	config PCI
	321	bool "Use PCI"
	322	depends on MB93090_MB00
	323	default y
53224185	324	select GENERIC_PCI_IOMAP
1da177e4 LT	325	help
	326	Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	327	onboard. If you have one of these boards and you wish to use the PCI
	328	facilities, say Y here.
	329
1da177e4 LT	330	config RESERVE_DMA_COHERENT
	331	bool "Reserve DMA coherent memory"
	332	depends on PCI && !MMU
	333	default y
	334	help
	335	Many PCI drivers require access to uncached memory for DMA device
	336	communications (such as is done with some Ethernet buffer rings). If
	337	a fully featured MMU is available, this can be done through page
	338	table settings, but if not, a region has to be set aside and marked
	339	with a special DAMPR register.
	340
	341	Setting this option causes uClinux to set aside a portion of the
	342	available memory for use in this manner. The memory will then be
	343	unavailable for normal kernel use.
	344
	345	source "drivers/pci/Kconfig"
	346
7a758313	347	source "drivers/pcmcia/Kconfig"
1da177e4	348
1da177e4	349	menu "Power management options"
f4cb5700 JB	350
	351	config ARCH_SUSPEND_POSSIBLE
	352	def_bool y
f4cb5700	353
1da177e4 LT	354	source kernel/power/Kconfig
	355	endmenu
	356
	357	endmenu
	358
	359
	360	menu "Executable formats"
	361
	362	source "fs/Kconfig.binfmt"
	363
	364	endmenu
	365
d5950b43 SR	366	source "net/Kconfig"
d5950b43 SR	367
1da177e4 LT	368	source "drivers/Kconfig"
	369
	370	source "fs/Kconfig"
	371
	372	source "arch/frv/Kconfig.debug"
	373
	374	source "security/Kconfig"
	375
	376	source "crypto/Kconfig"
	377
	378	source "lib/Kconfig"