[deliverable/linux.git] / arch / frv / kernel / irq-mb93093.c

/* irq-mb93093.c: MB93093 FPGA interrupt handling
 *
 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
 * Written by David Howells (dhowells@redhat.com)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>

#include <asm/io.h>
#include <asm/system.h>
#include <asm/bitops.h>
#include <asm/delay.h>
#include <asm/irq.h>
#include <asm/irc-regs.h>

#define __reg16(ADDR) (*(volatile unsigned short *)(__region_CS2 + (ADDR)))

#define __get_IMR()	({ __reg16(0x0a); })
#define __set_IMR(M)	do { __reg16(0x0a) = (M);  wmb(); } while(0)
#define __get_IFR()	({ __reg16(0x02); })
#define __clr_IFR(M)	do { __reg16(0x02) = ~(M); wmb(); } while(0)

/*
 * off-CPU FPGA PIC operations
 */
static void frv_fpga_enable(unsigned int irq)
{
	uint16_t imr = __get_IMR();

	imr &= ~(1 << (irq - IRQ_BASE_FPGA));

	__set_IMR(imr);
}

static void frv_fpga_disable(unsigned int irq)
{
	uint16_t imr = __get_IMR();

	imr |= 1 << (irq - IRQ_BASE_FPGA);

	__set_IMR(imr);
}

static void frv_fpga_ack(unsigned int irq)
{
	__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
}

static void frv_fpga_end(unsigned int irq)
{
}

static struct irq_chip frv_fpga_pic = {
	.name		= "mb93093",
	.enable		= frv_fpga_enable,
	.disable	= frv_fpga_disable,
	.ack		= frv_fpga_ack,
	.mask		= frv_fpga_disable,
	.unmask		= frv_fpga_enable,
	.end		= frv_fpga_end,
};

/*
 * FPGA PIC interrupt handler
 */
static irqreturn_t fpga_interrupt(int irq, void *_mask, struct pt_regs *regs)
{
	uint16_t imr, mask = (unsigned long) _mask;
	irqreturn_t iret = 0;

	imr = __get_IMR();
	mask = mask & ~imr & __get_IFR();

	/* poll all the triggered IRQs */
	while (mask) {
		int irq;

		asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask));
		irq = 31 - irq;
		mask &= ~(1 << irq);

		if (__do_IRQ(IRQ_BASE_FPGA + irq, regs))
			iret |= IRQ_HANDLED;
	}

	return iret;
}

/*
 * define an interrupt action for each FPGA PIC output
 * - use dev_id to indicate the FPGA PIC input to output mappings
 */
static struct irqaction fpga_irq[1]  = {
	[0] = {
		.handler	= fpga_interrupt,
		.flags		= IRQF_DISABLED,
		.mask		= CPU_MASK_NONE,
		.name		= "fpga.0",
		.dev_id		= (void *) 0x0700UL,
	}
};

/*
 * initialise the motherboard FPGA's PIC
 */
void __init fpga_init(void)
{
	int irq;

	/* all PIC inputs are all set to be edge triggered */
	__set_IMR(0x0700);
	__clr_IFR(0x0000);

	for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++)
		set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq);

	/* the FPGA drives external IRQ input #2 on the CPU PIC */
	setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[0]);
}
Commit	Line	Data
1da177e4 LT	1	/* irq-mb93093.c: MB93093 FPGA interrupt handling
1da177e4 LT	2	*
1bcbba30	3	* Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
1da177e4 LT	4	* Written by David Howells (dhowells@redhat.com)
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
	11
1da177e4 LT	12	#include <linux/ptrace.h>
	13	#include <linux/errno.h>
	14	#include <linux/signal.h>
	15	#include <linux/sched.h>
	16	#include <linux/ioport.h>
	17	#include <linux/interrupt.h>
	18	#include <linux/init.h>
	19	#include <linux/irq.h>
	20
	21	#include <asm/io.h>
	22	#include <asm/system.h>
	23	#include <asm/bitops.h>
	24	#include <asm/delay.h>
	25	#include <asm/irq.h>
	26	#include <asm/irc-regs.h>
1da177e4 LT	27
	28	#define __reg16(ADDR) ((volatile unsigned short )(__region_CS2 + (ADDR)))
	29
	30	#define __get_IMR() ({ __reg16(0x0a); })
	31	#define __set_IMR(M) do { __reg16(0x0a) = (M); wmb(); } while(0)
	32	#define __get_IFR() ({ __reg16(0x02); })
	33	#define __clr_IFR(M) do { __reg16(0x02) = ~(M); wmb(); } while(0)
	34
1da177e4	35	/*
1bcbba30	36	* off-CPU FPGA PIC operations
1da177e4	37	*/
1bcbba30 DH	38	static void frv_fpga_enable(unsigned int irq)
	39	{
	40	uint16_t imr = __get_IMR();
1da177e4	41
1bcbba30	42	imr &= ~(1 << (irq - IRQ_BASE_FPGA));
1da177e4	43
1bcbba30 DH	44	__set_IMR(imr);
1bcbba30 DH	45	}
1da177e4	46
1bcbba30	47	static void frv_fpga_disable(unsigned int irq)
1da177e4 LT	48	{
	49	uint16_t imr = __get_IMR();
	50
1bcbba30	51	imr \|= 1 << (irq - IRQ_BASE_FPGA);
1da177e4 LT	52
	53	__set_IMR(imr);
	54	}
	55
1bcbba30 DH	56	static void frv_fpga_ack(unsigned int irq)
	57	{
	58	__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
	59	}
	60
	61	static void frv_fpga_end(unsigned int irq)
	62	{
	63	}
	64
	65	static struct irq_chip frv_fpga_pic = {
	66	.name = "mb93093",
	67	.enable = frv_fpga_enable,
	68	.disable = frv_fpga_disable,
	69	.ack = frv_fpga_ack,
	70	.mask = frv_fpga_disable,
	71	.unmask = frv_fpga_enable,
	72	.end = frv_fpga_end,
	73	};
	74
	75	/*
	76	* FPGA PIC interrupt handler
	77	*/
	78	static irqreturn_t fpga_interrupt(int irq, void _mask, struct pt_regs regs)
1da177e4	79	{
1bcbba30 DH	80	uint16_t imr, mask = (unsigned long) _mask;
1bcbba30 DH	81	irqreturn_t iret = 0;
1da177e4 LT	82
1da177e4 LT	83	imr = __get_IMR();
1bcbba30 DH	84	mask = mask & ~imr & __get_IFR();
	85
	86	/* poll all the triggered IRQs */
	87	while (mask) {
	88	int irq;
	89
	90	asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask));
	91	irq = 31 - irq;
	92	mask &= ~(1 << irq);
	93
	94	if (__do_IRQ(IRQ_BASE_FPGA + irq, regs))
	95	iret \|= IRQ_HANDLED;
1da177e4	96	}
1bcbba30 DH	97
1bcbba30 DH	98	return iret;
1da177e4 LT	99	}
1da177e4 LT	100
1bcbba30 DH	101	/*
	102	* define an interrupt action for each FPGA PIC output
	103	* - use dev_id to indicate the FPGA PIC input to output mappings
	104	*/
	105	static struct irqaction fpga_irq[1] = {
	106	[0] = {
	107	.handler = fpga_interrupt,
	108	.flags = IRQF_DISABLED,
	109	.mask = CPU_MASK_NONE,
	110	.name = "fpga.0",
	111	.dev_id = (void *) 0x0700UL,
	112	}
	113	};
	114
	115	/*
	116	* initialise the motherboard FPGA's PIC
	117	*/
1da177e4 LT	118	void __init fpga_init(void)
1da177e4 LT	119	{
1bcbba30 DH	120	int irq;
	121
	122	/* all PIC inputs are all set to be edge triggered */
1da177e4 LT	123	__set_IMR(0x0700);
	124	__clr_IFR(0x0000);
	125
1bcbba30 DH	126	for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++)
	127	set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq);
	128
	129	/* the FPGA drives external IRQ input #2 on the CPU PIC */
	130	setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[0]);
1da177e4	131	}