[PATCH] x86-64: Add option to compile for Core2
[deliverable/linux.git] / arch / i386 / Kconfig.cpu
CommitLineData
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1# Put here option for CPU selection and depending optimization
2if !X86_ELAN
3
4choice
5 prompt "Processor family"
6 default M686
7
8config M386
9 bool "386"
1b4ad242 10 depends on !UML
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11 ---help---
12 This is the processor type of your CPU. This information is used for
13 optimizing purposes. In order to compile a kernel that can run on
14 all x86 CPU types (albeit not optimally fast), you can specify
15 "386" here.
16
17 The kernel will not necessarily run on earlier architectures than
18 the one you have chosen, e.g. a Pentium optimized kernel will run on
19 a PPro, but not necessarily on a i486.
20
21 Here are the settings recommended for greatest speed:
22 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
23 486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels
24 will run on a 386 class machine.
25 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
26 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
27 - "586" for generic Pentium CPUs lacking the TSC
28 (time stamp counter) register.
29 - "Pentium-Classic" for the Intel Pentium.
30 - "Pentium-MMX" for the Intel Pentium MMX.
31 - "Pentium-Pro" for the Intel Pentium Pro.
32 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
33 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
34 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
35 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
36 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
37 - "Crusoe" for the Transmeta Crusoe series.
38 - "Efficeon" for the Transmeta Efficeon series.
39 - "Winchip-C6" for original IDT Winchip.
40 - "Winchip-2" for IDT Winchip 2.
41 - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
42 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
f90b8116 43 - "Geode GX/LX" For AMD Geode GX and LX processors.
96d55b88 44 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
48a1204c 45 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
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46
47 If you don't know what to do, choose "386".
48
49config M486
50 bool "486"
51 help
52 Select this for a 486 series processor, either Intel or one of the
53 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
54 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
55 U5S.
56
57config M586
58 bool "586/K5/5x86/6x86/6x86MX"
59 help
60 Select this for an 586 or 686 series processor such as the AMD K5,
61 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
62 assume the RDTSC (Read Time Stamp Counter) instruction.
63
64config M586TSC
65 bool "Pentium-Classic"
66 help
67 Select this for a Pentium Classic processor with the RDTSC (Read
68 Time Stamp Counter) instruction for benchmarking.
69
70config M586MMX
71 bool "Pentium-MMX"
72 help
73 Select this for a Pentium with the MMX graphics/multimedia
74 extended instructions.
75
76config M686
77 bool "Pentium-Pro"
78 help
79 Select this for Intel Pentium Pro chips. This enables the use of
80 Pentium Pro extended instructions, and disables the init-time guard
81 against the f00f bug found in earlier Pentiums.
82
83config MPENTIUMII
84 bool "Pentium-II/Celeron(pre-Coppermine)"
85 help
86 Select this for Intel chips based on the Pentium-II and
87 pre-Coppermine Celeron core. This option enables an unaligned
88 copy optimization, compiles the kernel with optimization flags
89 tailored for the chip, and applies any applicable Pentium Pro
90 optimizations.
91
92config MPENTIUMIII
93 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
94 help
95 Select this for Intel chips based on the Pentium-III and
96 Celeron-Coppermine core. This option enables use of some
97 extended prefetch instructions in addition to the Pentium II
98 extensions.
99
100config MPENTIUMM
101 bool "Pentium M"
102 help
103 Select this for Intel Pentium M (not Pentium-4 M)
104 notebook chips.
105
106config MPENTIUM4
107 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/Xeon"
108 help
109 Select this for Intel Pentium 4 chips. This includes the
110 Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
111 (not Pentium M) chips. This option enables compile flags
112 optimized for the chip, uses the correct cache shift, and
113 applies any applicable Pentium III optimizations.
114
115config MK6
116 bool "K6/K6-II/K6-III"
117 help
118 Select this for an AMD K6-family processor. Enables use of
119 some extended instructions, and passes appropriate optimization
120 flags to GCC.
121
122config MK7
123 bool "Athlon/Duron/K7"
124 help
125 Select this for an AMD Athlon K7-family processor. Enables use of
126 some extended instructions, and passes appropriate optimization
127 flags to GCC.
128
129config MK8
130 bool "Opteron/Athlon64/Hammer/K8"
131 help
132 Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
133 use of some extended instructions, and passes appropriate optimization
134 flags to GCC.
135
136config MCRUSOE
137 bool "Crusoe"
138 help
139 Select this for a Transmeta Crusoe processor. Treats the processor
140 like a 586 with TSC, and sets some GCC optimization flags (like a
141 Pentium Pro with no alignment requirements).
142
143config MEFFICEON
144 bool "Efficeon"
145 help
146 Select this for a Transmeta Efficeon processor.
147
148config MWINCHIPC6
149 bool "Winchip-C6"
150 help
151 Select this for an IDT Winchip C6 chip. Linux and GCC
152 treat this chip as a 586TSC with some extended instructions
153 and alignment requirements.
154
155config MWINCHIP2
156 bool "Winchip-2"
157 help
158 Select this for an IDT Winchip-2. Linux and GCC
159 treat this chip as a 586TSC with some extended instructions
160 and alignment requirements.
161
162config MWINCHIP3D
163 bool "Winchip-2A/Winchip-3"
164 help
165 Select this for an IDT Winchip-2A or 3. Linux and GCC
166 treat this chip as a 586TSC with some extended instructions
167 and alignment reqirements. Also enable out of order memory
168 stores for this CPU, which can increase performance of some
169 operations.
170
171config MGEODEGX1
172 bool "GeodeGX1"
173 help
174 Select this for a Geode GX1 (Cyrix MediaGX) chip.
175
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176config MGEODE_LX
177 bool "Geode GX/LX"
178 help
179 Select this for AMD Geode GX and LX processors.
180
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181config MCYRIXIII
182 bool "CyrixIII/VIA-C3"
183 help
184 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
185 treat this chip as a generic 586. Whilst the CPU is 686 class,
186 it lacks the cmov extension which gcc assumes is present when
187 generating 686 code.
188 Note that Nehemiah (Model 9) and above will not boot with this
189 kernel due to them lacking the 3DNow! instructions used in earlier
190 incarnations of the CPU.
191
192config MVIAC3_2
193 bool "VIA C3-2 (Nehemiah)"
194 help
195 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
196 of SSE and tells gcc to treat the CPU as a 686.
197 Note, this kernel will not boot on older (pre model 9) C3s.
198
199endchoice
200
201config X86_GENERIC
202 bool "Generic x86 support"
203 help
204 Instead of just including optimizations for the selected
205 x86 variant (e.g. PII, Crusoe or Athlon), include some more
206 generic optimizations as well. This will make the kernel
207 perform better on x86 CPUs other than that selected.
208
209 This is really intended for distributors who need more
210 generic optimizations.
211
212endif
213
214#
215# Define implied options from the CPU selection here
216#
217config X86_CMPXCHG
218 bool
219 depends on !M386
220 default y
221
222config X86_XADD
223 bool
224 depends on !M386
225 default y
226
227config X86_L1_CACHE_SHIFT
228 int
229 default "7" if MPENTIUM4 || X86_GENERIC
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230 default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
231 default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
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232 default "6" if MK7 || MK8 || MPENTIUMM
233
234config RWSEM_GENERIC_SPINLOCK
235 bool
236 depends on M386
237 default y
238
239config RWSEM_XCHGADD_ALGORITHM
240 bool
241 depends on !M386
242 default y
243
244config GENERIC_CALIBRATE_DELAY
245 bool
246 default y
247
248config X86_PPRO_FENCE
249 bool
250 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
251 default y
252
253config X86_F00F_BUG
254 bool
255 depends on M586MMX || M586TSC || M586 || M486 || M386
256 default y
257
258config X86_WP_WORKS_OK
259 bool
260 depends on !M386
261 default y
262
263config X86_INVLPG
264 bool
265 depends on !M386
266 default y
267
268config X86_BSWAP
269 bool
270 depends on !M386
271 default y
272
273config X86_POPAD_OK
274 bool
275 depends on !M386
276 default y
277
278config X86_CMPXCHG64
279 bool
280 depends on !M386 && !M486
281 default y
282
283config X86_ALIGNMENT_16
284 bool
285 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
286 default y
287
288config X86_GOOD_APIC
289 bool
290 depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON
291 default y
292
293config X86_INTEL_USERCOPY
294 bool
295 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON
296 default y
297
298config X86_USE_PPRO_CHECKSUM
299 bool
f90b8116 300 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX
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301 default y
302
303config X86_USE_3DNOW
304 bool
1b4ad242 305 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
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306 default y
307
308config X86_OOSTORE
309 bool
310 depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
311 default y
312
313config X86_TSC
314 bool
1c08ca89 315 depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MGEODEGX1 || MGEODE_LX) && !X86_NUMAQ
96d55b88 316 default y
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