Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Do early PCI probing for bug detection when the main PCI subsystem is | |
3 | * not up yet. | |
4 | */ | |
5 | #include <linux/init.h> | |
6 | #include <linux/kernel.h> | |
7 | #include <linux/pci.h> | |
d44647b0 AC |
8 | #include <linux/acpi.h> |
9 | ||
1da177e4 LT |
10 | #include <asm/pci-direct.h> |
11 | #include <asm/acpi.h> | |
f9262c12 | 12 | #include <asm/apic.h> |
b0d0a4ba | 13 | #include <asm/irq.h> |
1da177e4 | 14 | |
d44647b0 AC |
15 | #ifdef CONFIG_ACPI |
16 | ||
17 | static int nvidia_hpet_detected __initdata; | |
18 | ||
ceb6c468 | 19 | static int __init nvidia_hpet_check(struct acpi_table_header *header) |
d44647b0 AC |
20 | { |
21 | nvidia_hpet_detected = 1; | |
22 | return 0; | |
23 | } | |
24 | #endif | |
25 | ||
4be44fcd | 26 | static int __init check_bridge(int vendor, int device) |
1da177e4 | 27 | { |
f9262c12 | 28 | #ifdef CONFIG_ACPI |
d44647b0 AC |
29 | /* According to Nvidia all timer overrides are bogus unless HPET |
30 | is enabled. */ | |
fa18f477 | 31 | if (!acpi_use_timer_override && vendor == PCI_VENDOR_ID_NVIDIA) { |
d44647b0 | 32 | nvidia_hpet_detected = 0; |
ceb6c468 | 33 | acpi_table_parse("HPET", nvidia_hpet_check); |
d44647b0 AC |
34 | if (nvidia_hpet_detected == 0) { |
35 | acpi_skip_timer_override = 1; | |
fa18f477 AK |
36 | printk(KERN_INFO "Nvidia board " |
37 | "detected. Ignoring ACPI " | |
38 | "timer override.\n"); | |
39 | printk(KERN_INFO "If you got timer trouble " | |
40 | "try acpi_use_timer_override\n"); | |
41 | ||
d44647b0 | 42 | } |
1da177e4 | 43 | } |
f9262c12 AK |
44 | #endif |
45 | if (vendor == PCI_VENDOR_ID_ATI && timer_over_8254 == 1) { | |
46 | timer_over_8254 = 0; | |
47 | printk(KERN_INFO "ATI board detected. Disabling timer routing " | |
48 | "over 8254.\n"); | |
49 | } | |
1da177e4 LT |
50 | return 0; |
51 | } | |
4be44fcd | 52 | |
b0d0a4ba SS |
53 | static void check_intel(void) |
54 | { | |
55 | u16 vendor, device; | |
56 | ||
57 | vendor = read_pci_config_16(0, 0, 0, PCI_VENDOR_ID); | |
58 | ||
59 | if (vendor != PCI_VENDOR_ID_INTEL) | |
60 | return; | |
61 | ||
62 | device = read_pci_config_16(0, 0, 0, PCI_DEVICE_ID); | |
63 | #ifdef CONFIG_SMP | |
64 | if (device == PCI_DEVICE_ID_INTEL_E7320_MCH || | |
65 | device == PCI_DEVICE_ID_INTEL_E7520_MCH || | |
66 | device == PCI_DEVICE_ID_INTEL_E7525_MCH) | |
67 | quirk_intel_irqbalance(); | |
68 | #endif | |
69 | } | |
70 | ||
4be44fcd LB |
71 | void __init check_acpi_pci(void) |
72 | { | |
73 | int num, slot, func; | |
1da177e4 LT |
74 | |
75 | /* Assume the machine supports type 1. If not it will | |
0637a70a AK |
76 | always read ffffffff and should not have any side effect. |
77 | Actually a few buggy systems can machine check. Allow the user | |
78 | to disable it by command line option at least -AK */ | |
79 | if (!early_pci_allowed()) | |
80 | return; | |
1da177e4 | 81 | |
b0d0a4ba SS |
82 | check_intel(); |
83 | ||
1da177e4 | 84 | /* Poor man's PCI discovery */ |
4be44fcd LB |
85 | for (num = 0; num < 32; num++) { |
86 | for (slot = 0; slot < 32; slot++) { | |
87 | for (func = 0; func < 8; func++) { | |
1da177e4 LT |
88 | u32 class; |
89 | u32 vendor; | |
4be44fcd | 90 | class = read_pci_config(num, slot, func, |
1da177e4 LT |
91 | PCI_CLASS_REVISION); |
92 | if (class == 0xffffffff) | |
4be44fcd | 93 | break; |
1da177e4 LT |
94 | |
95 | if ((class >> 16) != PCI_CLASS_BRIDGE_PCI) | |
4be44fcd LB |
96 | continue; |
97 | ||
98 | vendor = read_pci_config(num, slot, func, | |
1da177e4 | 99 | PCI_VENDOR_ID); |
4be44fcd LB |
100 | |
101 | if (check_bridge(vendor & 0xffff, vendor >> 16)) | |
102 | return; | |
103 | } | |
104 | ||
1da177e4 LT |
105 | } |
106 | } | |
107 | } |