Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fe27cb35 | 2 | * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $) |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> | |
fe27cb35 | 7 | * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> |
1da177e4 LT |
8 | * |
9 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
24 | * | |
25 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
26 | */ | |
27 | ||
1da177e4 LT |
28 | #include <linux/kernel.h> |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
fe27cb35 VP |
31 | #include <linux/smp.h> |
32 | #include <linux/sched.h> | |
1da177e4 | 33 | #include <linux/cpufreq.h> |
d395bf12 | 34 | #include <linux/compiler.h> |
4e57b681 | 35 | #include <linux/sched.h> /* current */ |
8adcc0c6 | 36 | #include <linux/dmi.h> |
1da177e4 LT |
37 | |
38 | #include <linux/acpi.h> | |
39 | #include <acpi/processor.h> | |
40 | ||
fe27cb35 | 41 | #include <asm/io.h> |
dde9f7ba | 42 | #include <asm/msr.h> |
fe27cb35 VP |
43 | #include <asm/processor.h> |
44 | #include <asm/cpufeature.h> | |
45 | #include <asm/delay.h> | |
46 | #include <asm/uaccess.h> | |
47 | ||
1da177e4 LT |
48 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg) |
49 | ||
50 | MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); | |
51 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); | |
52 | MODULE_LICENSE("GPL"); | |
53 | ||
dde9f7ba VP |
54 | enum { |
55 | UNDEFINED_CAPABLE = 0, | |
56 | SYSTEM_INTEL_MSR_CAPABLE, | |
57 | SYSTEM_IO_CAPABLE, | |
58 | }; | |
59 | ||
60 | #define INTEL_MSR_RANGE (0xffff) | |
61 | ||
fe27cb35 | 62 | struct acpi_cpufreq_data { |
64be7eed VP |
63 | struct acpi_processor_performance *acpi_data; |
64 | struct cpufreq_frequency_table *freq_table; | |
65 | unsigned int resume; | |
66 | unsigned int cpu_feature; | |
1da177e4 LT |
67 | }; |
68 | ||
64be7eed VP |
69 | static struct acpi_cpufreq_data *drv_data[NR_CPUS]; |
70 | static struct acpi_processor_performance *acpi_perf_data[NR_CPUS]; | |
1da177e4 LT |
71 | |
72 | static struct cpufreq_driver acpi_cpufreq_driver; | |
73 | ||
d395bf12 VP |
74 | static unsigned int acpi_pstate_strict; |
75 | ||
dde9f7ba VP |
76 | static int check_est_cpu(unsigned int cpuid) |
77 | { | |
78 | struct cpuinfo_x86 *cpu = &cpu_data[cpuid]; | |
79 | ||
80 | if (cpu->x86_vendor != X86_VENDOR_INTEL || | |
64be7eed | 81 | !cpu_has(cpu, X86_FEATURE_EST)) |
dde9f7ba VP |
82 | return 0; |
83 | ||
84 | return 1; | |
85 | } | |
86 | ||
dde9f7ba | 87 | static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) |
fe27cb35 | 88 | { |
64be7eed VP |
89 | struct acpi_processor_performance *perf; |
90 | int i; | |
fe27cb35 VP |
91 | |
92 | perf = data->acpi_data; | |
93 | ||
94 | for (i = 0; i < perf->state_count; i++) { | |
95 | if (value == perf->states[i].status) | |
96 | return data->freq_table[i].frequency; | |
97 | } | |
98 | return 0; | |
99 | } | |
100 | ||
dde9f7ba VP |
101 | static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data) |
102 | { | |
103 | int i; | |
104 | ||
105 | msr &= INTEL_MSR_RANGE; | |
106 | for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { | |
107 | if (msr == data->freq_table[i].index) | |
108 | return data->freq_table[i].frequency; | |
109 | } | |
110 | return data->freq_table[0].frequency; | |
111 | } | |
112 | ||
dde9f7ba VP |
113 | static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data) |
114 | { | |
115 | switch (data->cpu_feature) { | |
64be7eed | 116 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba | 117 | return extract_msr(val, data); |
64be7eed | 118 | case SYSTEM_IO_CAPABLE: |
dde9f7ba | 119 | return extract_io(val, data); |
64be7eed | 120 | default: |
dde9f7ba VP |
121 | return 0; |
122 | } | |
123 | } | |
124 | ||
fe27cb35 | 125 | static void wrport(u16 port, u8 bit_width, u32 value) |
1da177e4 LT |
126 | { |
127 | if (bit_width <= 8) { | |
128 | outb(value, port); | |
129 | } else if (bit_width <= 16) { | |
130 | outw(value, port); | |
131 | } else if (bit_width <= 32) { | |
132 | outl(value, port); | |
1da177e4 | 133 | } |
1da177e4 LT |
134 | } |
135 | ||
64be7eed | 136 | static void rdport(u16 port, u8 bit_width, u32 * ret) |
1da177e4 LT |
137 | { |
138 | *ret = 0; | |
139 | if (bit_width <= 8) { | |
140 | *ret = inb(port); | |
141 | } else if (bit_width <= 16) { | |
142 | *ret = inw(port); | |
143 | } else if (bit_width <= 32) { | |
144 | *ret = inl(port); | |
1da177e4 | 145 | } |
1da177e4 LT |
146 | } |
147 | ||
dde9f7ba VP |
148 | struct msr_addr { |
149 | u32 reg; | |
150 | }; | |
151 | ||
fe27cb35 VP |
152 | struct io_addr { |
153 | u16 port; | |
154 | u8 bit_width; | |
155 | }; | |
156 | ||
dde9f7ba VP |
157 | typedef union { |
158 | struct msr_addr msr; | |
159 | struct io_addr io; | |
160 | } drv_addr_union; | |
161 | ||
fe27cb35 | 162 | struct drv_cmd { |
dde9f7ba | 163 | unsigned int type; |
fe27cb35 | 164 | cpumask_t mask; |
dde9f7ba | 165 | drv_addr_union addr; |
fe27cb35 VP |
166 | u32 val; |
167 | }; | |
168 | ||
169 | static void do_drv_read(struct drv_cmd *cmd) | |
1da177e4 | 170 | { |
dde9f7ba VP |
171 | u32 h; |
172 | ||
173 | switch (cmd->type) { | |
64be7eed | 174 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba VP |
175 | rdmsr(cmd->addr.msr.reg, cmd->val, h); |
176 | break; | |
64be7eed | 177 | case SYSTEM_IO_CAPABLE: |
dde9f7ba VP |
178 | rdport(cmd->addr.io.port, cmd->addr.io.bit_width, &cmd->val); |
179 | break; | |
64be7eed | 180 | default: |
dde9f7ba VP |
181 | break; |
182 | } | |
fe27cb35 | 183 | } |
1da177e4 | 184 | |
fe27cb35 VP |
185 | static void do_drv_write(struct drv_cmd *cmd) |
186 | { | |
dde9f7ba VP |
187 | u32 h = 0; |
188 | ||
189 | switch (cmd->type) { | |
64be7eed | 190 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba VP |
191 | wrmsr(cmd->addr.msr.reg, cmd->val, h); |
192 | break; | |
64be7eed | 193 | case SYSTEM_IO_CAPABLE: |
dde9f7ba VP |
194 | wrport(cmd->addr.io.port, cmd->addr.io.bit_width, cmd->val); |
195 | break; | |
64be7eed | 196 | default: |
dde9f7ba VP |
197 | break; |
198 | } | |
fe27cb35 | 199 | } |
1da177e4 | 200 | |
fe27cb35 VP |
201 | static inline void drv_read(struct drv_cmd *cmd) |
202 | { | |
64be7eed | 203 | cpumask_t saved_mask = current->cpus_allowed; |
fe27cb35 VP |
204 | cmd->val = 0; |
205 | ||
206 | set_cpus_allowed(current, cmd->mask); | |
207 | do_drv_read(cmd); | |
208 | set_cpus_allowed(current, saved_mask); | |
209 | ||
210 | } | |
211 | ||
212 | static void drv_write(struct drv_cmd *cmd) | |
213 | { | |
64be7eed VP |
214 | cpumask_t saved_mask = current->cpus_allowed; |
215 | unsigned int i; | |
fe27cb35 VP |
216 | |
217 | for_each_cpu_mask(i, cmd->mask) { | |
218 | set_cpus_allowed(current, cpumask_of_cpu(i)); | |
219 | do_drv_write(cmd); | |
1da177e4 LT |
220 | } |
221 | ||
fe27cb35 VP |
222 | set_cpus_allowed(current, saved_mask); |
223 | return; | |
224 | } | |
1da177e4 | 225 | |
fe27cb35 VP |
226 | static u32 get_cur_val(cpumask_t mask) |
227 | { | |
64be7eed VP |
228 | struct acpi_processor_performance *perf; |
229 | struct drv_cmd cmd; | |
1da177e4 | 230 | |
fe27cb35 VP |
231 | if (unlikely(cpus_empty(mask))) |
232 | return 0; | |
1da177e4 | 233 | |
dde9f7ba VP |
234 | switch (drv_data[first_cpu(mask)]->cpu_feature) { |
235 | case SYSTEM_INTEL_MSR_CAPABLE: | |
236 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
237 | cmd.addr.msr.reg = MSR_IA32_PERF_STATUS; | |
238 | break; | |
239 | case SYSTEM_IO_CAPABLE: | |
240 | cmd.type = SYSTEM_IO_CAPABLE; | |
241 | perf = drv_data[first_cpu(mask)]->acpi_data; | |
242 | cmd.addr.io.port = perf->control_register.address; | |
243 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
244 | break; | |
245 | default: | |
246 | return 0; | |
247 | } | |
248 | ||
fe27cb35 | 249 | cmd.mask = mask; |
1da177e4 | 250 | |
fe27cb35 | 251 | drv_read(&cmd); |
1da177e4 | 252 | |
fe27cb35 VP |
253 | dprintk("get_cur_val = %u\n", cmd.val); |
254 | ||
255 | return cmd.val; | |
256 | } | |
1da177e4 | 257 | |
fe27cb35 VP |
258 | static unsigned int get_cur_freq_on_cpu(unsigned int cpu) |
259 | { | |
64be7eed VP |
260 | struct acpi_cpufreq_data *data = drv_data[cpu]; |
261 | unsigned int freq; | |
fe27cb35 VP |
262 | |
263 | dprintk("get_cur_freq_on_cpu (%d)\n", cpu); | |
264 | ||
265 | if (unlikely(data == NULL || | |
64be7eed | 266 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 | 267 | return 0; |
1da177e4 LT |
268 | } |
269 | ||
fe27cb35 VP |
270 | freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data); |
271 | dprintk("cur freq = %u\n", freq); | |
1da177e4 | 272 | |
fe27cb35 | 273 | return freq; |
1da177e4 LT |
274 | } |
275 | ||
fe27cb35 | 276 | static unsigned int check_freqs(cpumask_t mask, unsigned int freq, |
64be7eed | 277 | struct acpi_cpufreq_data *data) |
fe27cb35 | 278 | { |
64be7eed VP |
279 | unsigned int cur_freq; |
280 | unsigned int i; | |
1da177e4 | 281 | |
fe27cb35 VP |
282 | for (i = 0; i < 100; i++) { |
283 | cur_freq = extract_freq(get_cur_val(mask), data); | |
284 | if (cur_freq == freq) | |
285 | return 1; | |
286 | udelay(10); | |
287 | } | |
288 | return 0; | |
289 | } | |
290 | ||
291 | static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |
64be7eed | 292 | unsigned int target_freq, unsigned int relation) |
1da177e4 | 293 | { |
64be7eed VP |
294 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
295 | struct acpi_processor_performance *perf; | |
296 | struct cpufreq_freqs freqs; | |
297 | cpumask_t online_policy_cpus; | |
298 | struct drv_cmd cmd; | |
299 | unsigned int msr; | |
300 | unsigned int next_state = 0; | |
301 | unsigned int next_perf_state = 0; | |
302 | unsigned int i; | |
303 | int result = 0; | |
fe27cb35 VP |
304 | |
305 | dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu); | |
306 | ||
307 | if (unlikely(data == NULL || | |
64be7eed | 308 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 VP |
309 | return -ENODEV; |
310 | } | |
1da177e4 | 311 | |
fe27cb35 | 312 | perf = data->acpi_data; |
1da177e4 | 313 | result = cpufreq_frequency_table_target(policy, |
64be7eed VP |
314 | data->freq_table, |
315 | target_freq, | |
316 | relation, &next_state); | |
09b4d1ee | 317 | if (unlikely(result)) |
fe27cb35 | 318 | return -ENODEV; |
09b4d1ee | 319 | |
7e1f19e5 | 320 | #ifdef CONFIG_HOTPLUG_CPU |
09b4d1ee VP |
321 | /* cpufreq holds the hotplug lock, so we are safe from here on */ |
322 | cpus_and(online_policy_cpus, cpu_online_map, policy->cpus); | |
7e1f19e5 AM |
323 | #else |
324 | online_policy_cpus = policy->cpus; | |
325 | #endif | |
1da177e4 | 326 | |
fe27cb35 | 327 | next_perf_state = data->freq_table[next_state].index; |
7650b281 | 328 | if (perf->state == next_perf_state) { |
fe27cb35 | 329 | if (unlikely(data->resume)) { |
64be7eed VP |
330 | dprintk("Called after resume, resetting to P%d\n", |
331 | next_perf_state); | |
fe27cb35 VP |
332 | data->resume = 0; |
333 | } else { | |
64be7eed VP |
334 | dprintk("Already at target state (P%d)\n", |
335 | next_perf_state); | |
fe27cb35 VP |
336 | return 0; |
337 | } | |
09b4d1ee VP |
338 | } |
339 | ||
64be7eed VP |
340 | switch (data->cpu_feature) { |
341 | case SYSTEM_INTEL_MSR_CAPABLE: | |
342 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
343 | cmd.addr.msr.reg = MSR_IA32_PERF_CTL; | |
344 | msr = | |
345 | (u32) perf->states[next_perf_state]. | |
346 | control & INTEL_MSR_RANGE; | |
347 | cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr; | |
348 | break; | |
349 | case SYSTEM_IO_CAPABLE: | |
350 | cmd.type = SYSTEM_IO_CAPABLE; | |
351 | cmd.addr.io.port = perf->control_register.address; | |
352 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
353 | cmd.val = (u32) perf->states[next_perf_state].control; | |
354 | break; | |
355 | default: | |
356 | return -ENODEV; | |
357 | } | |
09b4d1ee | 358 | |
fe27cb35 | 359 | cpus_clear(cmd.mask); |
09b4d1ee | 360 | |
fe27cb35 VP |
361 | if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY) |
362 | cmd.mask = online_policy_cpus; | |
363 | else | |
364 | cpu_set(policy->cpu, cmd.mask); | |
09b4d1ee | 365 | |
7650b281 VP |
366 | freqs.old = data->freq_table[perf->state].frequency; |
367 | freqs.new = data->freq_table[next_perf_state].frequency; | |
fe27cb35 VP |
368 | for_each_cpu_mask(i, cmd.mask) { |
369 | freqs.cpu = i; | |
370 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
09b4d1ee | 371 | } |
1da177e4 | 372 | |
fe27cb35 | 373 | drv_write(&cmd); |
09b4d1ee | 374 | |
fe27cb35 VP |
375 | if (acpi_pstate_strict) { |
376 | if (!check_freqs(cmd.mask, freqs.new, data)) { | |
377 | dprintk("acpi_cpufreq_target failed (%d)\n", | |
64be7eed | 378 | policy->cpu); |
fe27cb35 | 379 | return -EAGAIN; |
09b4d1ee VP |
380 | } |
381 | } | |
382 | ||
fe27cb35 VP |
383 | for_each_cpu_mask(i, cmd.mask) { |
384 | freqs.cpu = i; | |
385 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
386 | } | |
387 | perf->state = next_perf_state; | |
388 | ||
389 | return result; | |
1da177e4 LT |
390 | } |
391 | ||
64be7eed | 392 | static int acpi_cpufreq_verify(struct cpufreq_policy *policy) |
1da177e4 | 393 | { |
fe27cb35 | 394 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 LT |
395 | |
396 | dprintk("acpi_cpufreq_verify\n"); | |
397 | ||
fe27cb35 | 398 | return cpufreq_frequency_table_verify(policy, data->freq_table); |
1da177e4 LT |
399 | } |
400 | ||
1da177e4 | 401 | static unsigned long |
64be7eed | 402 | acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) |
1da177e4 | 403 | { |
64be7eed | 404 | struct acpi_processor_performance *perf = data->acpi_data; |
09b4d1ee | 405 | |
1da177e4 LT |
406 | if (cpu_khz) { |
407 | /* search the closest match to cpu_khz */ | |
408 | unsigned int i; | |
409 | unsigned long freq; | |
09b4d1ee | 410 | unsigned long freqn = perf->states[0].core_frequency * 1000; |
1da177e4 | 411 | |
09b4d1ee | 412 | for (i = 0; i < (perf->state_count - 1); i++) { |
1da177e4 | 413 | freq = freqn; |
64be7eed | 414 | freqn = perf->states[i + 1].core_frequency * 1000; |
1da177e4 | 415 | if ((2 * cpu_khz) > (freqn + freq)) { |
09b4d1ee | 416 | perf->state = i; |
64be7eed | 417 | return freq; |
1da177e4 LT |
418 | } |
419 | } | |
09b4d1ee | 420 | perf->state = perf->state_count - 1; |
64be7eed | 421 | return freqn; |
09b4d1ee | 422 | } else { |
1da177e4 | 423 | /* assume CPU is at P0... */ |
09b4d1ee VP |
424 | perf->state = 0; |
425 | return perf->states[0].core_frequency * 1000; | |
426 | } | |
1da177e4 LT |
427 | } |
428 | ||
09b4d1ee VP |
429 | /* |
430 | * acpi_cpufreq_early_init - initialize ACPI P-States library | |
431 | * | |
432 | * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) | |
433 | * in order to determine correct frequency and voltage pairings. We can | |
434 | * do _PDC and _PSD and find out the processor dependency for the | |
435 | * actual init that will happen later... | |
436 | */ | |
fe27cb35 | 437 | static int acpi_cpufreq_early_init(void) |
09b4d1ee | 438 | { |
64be7eed VP |
439 | struct acpi_processor_performance *data; |
440 | cpumask_t covered; | |
441 | unsigned int i, j; | |
09b4d1ee VP |
442 | |
443 | dprintk("acpi_cpufreq_early_init\n"); | |
444 | ||
fb1bb34d | 445 | for_each_possible_cpu(i) { |
64be7eed VP |
446 | data = kzalloc(sizeof(struct acpi_processor_performance), |
447 | GFP_KERNEL); | |
09b4d1ee | 448 | if (!data) { |
fe27cb35 | 449 | for_each_cpu_mask(j, covered) { |
09b4d1ee VP |
450 | kfree(acpi_perf_data[j]); |
451 | acpi_perf_data[j] = NULL; | |
452 | } | |
64be7eed | 453 | return -ENOMEM; |
09b4d1ee VP |
454 | } |
455 | acpi_perf_data[i] = data; | |
fe27cb35 | 456 | cpu_set(i, covered); |
09b4d1ee VP |
457 | } |
458 | ||
459 | /* Do initialization in ACPI core */ | |
fe27cb35 VP |
460 | acpi_processor_preregister_performance(acpi_perf_data); |
461 | return 0; | |
09b4d1ee VP |
462 | } |
463 | ||
8adcc0c6 VP |
464 | /* |
465 | * Some BIOSes do SW_ANY coordination internally, either set it up in hw | |
466 | * or do it in BIOS firmware and won't inform about it to OS. If not | |
467 | * detected, this has a side effect of making CPU run at a different speed | |
468 | * than OS intended it to run at. Detect it and handle it cleanly. | |
469 | */ | |
470 | static int bios_with_sw_any_bug; | |
471 | ||
0497c8ca | 472 | static int sw_any_bug_found(struct dmi_system_id *d) |
8adcc0c6 VP |
473 | { |
474 | bios_with_sw_any_bug = 1; | |
475 | return 0; | |
476 | } | |
477 | ||
0497c8ca | 478 | static struct dmi_system_id sw_any_bug_dmi_table[] = { |
8adcc0c6 VP |
479 | { |
480 | .callback = sw_any_bug_found, | |
481 | .ident = "Supermicro Server X6DLP", | |
482 | .matches = { | |
483 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), | |
484 | DMI_MATCH(DMI_BIOS_VERSION, "080010"), | |
485 | DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), | |
486 | }, | |
487 | }, | |
488 | { } | |
489 | }; | |
490 | ||
64be7eed | 491 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) |
1da177e4 | 492 | { |
64be7eed VP |
493 | unsigned int i; |
494 | unsigned int valid_states = 0; | |
495 | unsigned int cpu = policy->cpu; | |
496 | struct acpi_cpufreq_data *data; | |
497 | unsigned int l, h; | |
498 | unsigned int result = 0; | |
499 | struct cpuinfo_x86 *c = &cpu_data[policy->cpu]; | |
500 | struct acpi_processor_performance *perf; | |
1da177e4 | 501 | |
1da177e4 | 502 | dprintk("acpi_cpufreq_cpu_init\n"); |
1da177e4 | 503 | |
09b4d1ee | 504 | if (!acpi_perf_data[cpu]) |
64be7eed | 505 | return -ENODEV; |
09b4d1ee | 506 | |
fe27cb35 | 507 | data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL); |
1da177e4 | 508 | if (!data) |
64be7eed | 509 | return -ENOMEM; |
1da177e4 | 510 | |
09b4d1ee | 511 | data->acpi_data = acpi_perf_data[cpu]; |
fe27cb35 | 512 | drv_data[cpu] = data; |
1da177e4 | 513 | |
fe27cb35 VP |
514 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) { |
515 | acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; | |
516 | } | |
1da177e4 | 517 | |
fe27cb35 | 518 | result = acpi_processor_register_performance(data->acpi_data, cpu); |
1da177e4 LT |
519 | if (result) |
520 | goto err_free; | |
521 | ||
09b4d1ee | 522 | perf = data->acpi_data; |
09b4d1ee | 523 | policy->shared_type = perf->shared_type; |
46f18e3a VP |
524 | /* |
525 | * Will let policy->cpus know about dependency only when software | |
526 | * coordination is required. | |
527 | */ | |
528 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || | |
8adcc0c6 | 529 | policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
46f18e3a | 530 | policy->cpus = perf->shared_cpu_map; |
8adcc0c6 VP |
531 | } |
532 | ||
533 | #ifdef CONFIG_SMP | |
534 | dmi_check_system(sw_any_bug_dmi_table); | |
535 | if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) { | |
536 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; | |
537 | policy->cpus = cpu_core_map[cpu]; | |
538 | } | |
539 | #endif | |
09b4d1ee | 540 | |
1da177e4 | 541 | /* capability check */ |
09b4d1ee | 542 | if (perf->state_count <= 1) { |
1da177e4 LT |
543 | dprintk("No P-States\n"); |
544 | result = -ENODEV; | |
545 | goto err_unreg; | |
546 | } | |
09b4d1ee | 547 | |
fe27cb35 VP |
548 | if (perf->control_register.space_id != perf->status_register.space_id) { |
549 | result = -ENODEV; | |
550 | goto err_unreg; | |
551 | } | |
552 | ||
553 | switch (perf->control_register.space_id) { | |
64be7eed | 554 | case ACPI_ADR_SPACE_SYSTEM_IO: |
fe27cb35 | 555 | dprintk("SYSTEM IO addr space\n"); |
dde9f7ba VP |
556 | data->cpu_feature = SYSTEM_IO_CAPABLE; |
557 | break; | |
64be7eed | 558 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
dde9f7ba VP |
559 | dprintk("HARDWARE addr space\n"); |
560 | if (!check_est_cpu(cpu)) { | |
561 | result = -ENODEV; | |
562 | goto err_unreg; | |
563 | } | |
564 | data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; | |
fe27cb35 | 565 | break; |
64be7eed | 566 | default: |
fe27cb35 | 567 | dprintk("Unknown addr space %d\n", |
64be7eed | 568 | (u32) (perf->control_register.space_id)); |
1da177e4 LT |
569 | result = -ENODEV; |
570 | goto err_unreg; | |
571 | } | |
572 | ||
64be7eed VP |
573 | data->freq_table = |
574 | kmalloc(sizeof(struct cpufreq_frequency_table) * | |
575 | (perf->state_count + 1), GFP_KERNEL); | |
1da177e4 LT |
576 | if (!data->freq_table) { |
577 | result = -ENOMEM; | |
578 | goto err_unreg; | |
579 | } | |
580 | ||
581 | /* detect transition latency */ | |
582 | policy->cpuinfo.transition_latency = 0; | |
64be7eed VP |
583 | for (i = 0; i < perf->state_count; i++) { |
584 | if ((perf->states[i].transition_latency * 1000) > | |
585 | policy->cpuinfo.transition_latency) | |
586 | policy->cpuinfo.transition_latency = | |
587 | perf->states[i].transition_latency * 1000; | |
1da177e4 LT |
588 | } |
589 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | |
590 | ||
1da177e4 | 591 | /* table init */ |
64be7eed VP |
592 | for (i = 0; i < perf->state_count; i++) { |
593 | if (i > 0 && perf->states[i].core_frequency == | |
594 | perf->states[i - 1].core_frequency) | |
fe27cb35 VP |
595 | continue; |
596 | ||
597 | data->freq_table[valid_states].index = i; | |
598 | data->freq_table[valid_states].frequency = | |
64be7eed | 599 | perf->states[i].core_frequency * 1000; |
fe27cb35 | 600 | valid_states++; |
1da177e4 | 601 | } |
fe27cb35 | 602 | data->freq_table[perf->state_count].frequency = CPUFREQ_TABLE_END; |
1da177e4 LT |
603 | |
604 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); | |
605 | if (result) { | |
606 | goto err_freqfree; | |
607 | } | |
608 | ||
dde9f7ba | 609 | switch (data->cpu_feature) { |
64be7eed | 610 | case ACPI_ADR_SPACE_SYSTEM_IO: |
dde9f7ba VP |
611 | /* Current speed is unknown and not detectable by IO port */ |
612 | policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); | |
613 | break; | |
64be7eed | 614 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
7650b281 | 615 | acpi_cpufreq_driver.get = get_cur_freq_on_cpu; |
dde9f7ba VP |
616 | get_cur_freq_on_cpu(cpu); |
617 | break; | |
64be7eed | 618 | default: |
dde9f7ba VP |
619 | break; |
620 | } | |
621 | ||
1da177e4 LT |
622 | /* notify BIOS that we exist */ |
623 | acpi_processor_notify_smm(THIS_MODULE); | |
624 | ||
fe27cb35 | 625 | dprintk("CPU%u - ACPI performance management activated.\n", cpu); |
09b4d1ee | 626 | for (i = 0; i < perf->state_count; i++) |
1da177e4 | 627 | dprintk(" %cP%d: %d MHz, %d mW, %d uS\n", |
64be7eed | 628 | (i == perf->state ? '*' : ' '), i, |
09b4d1ee VP |
629 | (u32) perf->states[i].core_frequency, |
630 | (u32) perf->states[i].power, | |
631 | (u32) perf->states[i].transition_latency); | |
1da177e4 LT |
632 | |
633 | cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu); | |
64be7eed | 634 | |
4b31e774 DB |
635 | /* |
636 | * the first call to ->target() should result in us actually | |
637 | * writing something to the appropriate registers. | |
638 | */ | |
639 | data->resume = 1; | |
64be7eed | 640 | |
fe27cb35 | 641 | return result; |
1da177e4 | 642 | |
64be7eed | 643 | err_freqfree: |
1da177e4 | 644 | kfree(data->freq_table); |
64be7eed | 645 | err_unreg: |
09b4d1ee | 646 | acpi_processor_unregister_performance(perf, cpu); |
64be7eed | 647 | err_free: |
1da177e4 | 648 | kfree(data); |
fe27cb35 | 649 | drv_data[cpu] = NULL; |
1da177e4 | 650 | |
64be7eed | 651 | return result; |
1da177e4 LT |
652 | } |
653 | ||
64be7eed | 654 | static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
1da177e4 | 655 | { |
fe27cb35 | 656 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 | 657 | |
1da177e4 LT |
658 | dprintk("acpi_cpufreq_cpu_exit\n"); |
659 | ||
660 | if (data) { | |
661 | cpufreq_frequency_table_put_attr(policy->cpu); | |
fe27cb35 | 662 | drv_data[policy->cpu] = NULL; |
64be7eed VP |
663 | acpi_processor_unregister_performance(data->acpi_data, |
664 | policy->cpu); | |
1da177e4 LT |
665 | kfree(data); |
666 | } | |
667 | ||
64be7eed | 668 | return 0; |
1da177e4 LT |
669 | } |
670 | ||
64be7eed | 671 | static int acpi_cpufreq_resume(struct cpufreq_policy *policy) |
1da177e4 | 672 | { |
fe27cb35 | 673 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 | 674 | |
1da177e4 LT |
675 | dprintk("acpi_cpufreq_resume\n"); |
676 | ||
677 | data->resume = 1; | |
678 | ||
64be7eed | 679 | return 0; |
1da177e4 LT |
680 | } |
681 | ||
64be7eed | 682 | static struct freq_attr *acpi_cpufreq_attr[] = { |
1da177e4 LT |
683 | &cpufreq_freq_attr_scaling_available_freqs, |
684 | NULL, | |
685 | }; | |
686 | ||
687 | static struct cpufreq_driver acpi_cpufreq_driver = { | |
64be7eed VP |
688 | .verify = acpi_cpufreq_verify, |
689 | .target = acpi_cpufreq_target, | |
64be7eed VP |
690 | .init = acpi_cpufreq_cpu_init, |
691 | .exit = acpi_cpufreq_cpu_exit, | |
692 | .resume = acpi_cpufreq_resume, | |
693 | .name = "acpi-cpufreq", | |
694 | .owner = THIS_MODULE, | |
695 | .attr = acpi_cpufreq_attr, | |
1da177e4 LT |
696 | }; |
697 | ||
64be7eed | 698 | static int __init acpi_cpufreq_init(void) |
1da177e4 | 699 | { |
1da177e4 LT |
700 | dprintk("acpi_cpufreq_init\n"); |
701 | ||
fe27cb35 | 702 | acpi_cpufreq_early_init(); |
09b4d1ee | 703 | |
64be7eed | 704 | return cpufreq_register_driver(&acpi_cpufreq_driver); |
1da177e4 LT |
705 | } |
706 | ||
64be7eed | 707 | static void __exit acpi_cpufreq_exit(void) |
1da177e4 | 708 | { |
64be7eed | 709 | unsigned int i; |
1da177e4 LT |
710 | dprintk("acpi_cpufreq_exit\n"); |
711 | ||
712 | cpufreq_unregister_driver(&acpi_cpufreq_driver); | |
713 | ||
fb1bb34d | 714 | for_each_possible_cpu(i) { |
09b4d1ee VP |
715 | kfree(acpi_perf_data[i]); |
716 | acpi_perf_data[i] = NULL; | |
717 | } | |
1da177e4 LT |
718 | return; |
719 | } | |
720 | ||
d395bf12 | 721 | module_param(acpi_pstate_strict, uint, 0644); |
64be7eed VP |
722 | MODULE_PARM_DESC(acpi_pstate_strict, |
723 | "value 0 or non-zero. non-zero -> strict ACPI checks are performed during frequency changes."); | |
1da177e4 LT |
724 | |
725 | late_initcall(acpi_cpufreq_init); | |
726 | module_exit(acpi_cpufreq_exit); | |
727 | ||
728 | MODULE_ALIAS("acpi"); |