Commit | Line | Data |
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1da177e4 | 1 | /* |
fe27cb35 | 2 | * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $) |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> | |
fe27cb35 | 7 | * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> |
1da177e4 LT |
8 | * |
9 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
24 | * | |
25 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
26 | */ | |
27 | ||
1da177e4 LT |
28 | #include <linux/kernel.h> |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
fe27cb35 VP |
31 | #include <linux/smp.h> |
32 | #include <linux/sched.h> | |
1da177e4 | 33 | #include <linux/cpufreq.h> |
d395bf12 | 34 | #include <linux/compiler.h> |
8adcc0c6 | 35 | #include <linux/dmi.h> |
1da177e4 LT |
36 | |
37 | #include <linux/acpi.h> | |
38 | #include <acpi/processor.h> | |
39 | ||
fe27cb35 | 40 | #include <asm/io.h> |
dde9f7ba | 41 | #include <asm/msr.h> |
fe27cb35 VP |
42 | #include <asm/processor.h> |
43 | #include <asm/cpufeature.h> | |
44 | #include <asm/delay.h> | |
45 | #include <asm/uaccess.h> | |
46 | ||
1da177e4 LT |
47 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg) |
48 | ||
49 | MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); | |
50 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); | |
51 | MODULE_LICENSE("GPL"); | |
52 | ||
dde9f7ba VP |
53 | enum { |
54 | UNDEFINED_CAPABLE = 0, | |
55 | SYSTEM_INTEL_MSR_CAPABLE, | |
56 | SYSTEM_IO_CAPABLE, | |
57 | }; | |
58 | ||
59 | #define INTEL_MSR_RANGE (0xffff) | |
dfde5d62 | 60 | #define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1) |
dde9f7ba | 61 | |
fe27cb35 | 62 | struct acpi_cpufreq_data { |
64be7eed VP |
63 | struct acpi_processor_performance *acpi_data; |
64 | struct cpufreq_frequency_table *freq_table; | |
dfde5d62 | 65 | unsigned int max_freq; |
64be7eed VP |
66 | unsigned int resume; |
67 | unsigned int cpu_feature; | |
1da177e4 LT |
68 | }; |
69 | ||
64be7eed VP |
70 | static struct acpi_cpufreq_data *drv_data[NR_CPUS]; |
71 | static struct acpi_processor_performance *acpi_perf_data[NR_CPUS]; | |
1da177e4 LT |
72 | |
73 | static struct cpufreq_driver acpi_cpufreq_driver; | |
74 | ||
d395bf12 VP |
75 | static unsigned int acpi_pstate_strict; |
76 | ||
dde9f7ba VP |
77 | static int check_est_cpu(unsigned int cpuid) |
78 | { | |
79 | struct cpuinfo_x86 *cpu = &cpu_data[cpuid]; | |
80 | ||
81 | if (cpu->x86_vendor != X86_VENDOR_INTEL || | |
64be7eed | 82 | !cpu_has(cpu, X86_FEATURE_EST)) |
dde9f7ba VP |
83 | return 0; |
84 | ||
85 | return 1; | |
86 | } | |
87 | ||
dde9f7ba | 88 | static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) |
fe27cb35 | 89 | { |
64be7eed VP |
90 | struct acpi_processor_performance *perf; |
91 | int i; | |
fe27cb35 VP |
92 | |
93 | perf = data->acpi_data; | |
94 | ||
95dd7227 | 95 | for (i=0; i<perf->state_count; i++) { |
fe27cb35 VP |
96 | if (value == perf->states[i].status) |
97 | return data->freq_table[i].frequency; | |
98 | } | |
99 | return 0; | |
100 | } | |
101 | ||
dde9f7ba VP |
102 | static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data) |
103 | { | |
104 | int i; | |
a6f6e6e6 | 105 | struct acpi_processor_performance *perf; |
dde9f7ba VP |
106 | |
107 | msr &= INTEL_MSR_RANGE; | |
a6f6e6e6 VP |
108 | perf = data->acpi_data; |
109 | ||
95dd7227 | 110 | for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { |
a6f6e6e6 | 111 | if (msr == perf->states[data->freq_table[i].index].status) |
dde9f7ba VP |
112 | return data->freq_table[i].frequency; |
113 | } | |
114 | return data->freq_table[0].frequency; | |
115 | } | |
116 | ||
dde9f7ba VP |
117 | static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data) |
118 | { | |
119 | switch (data->cpu_feature) { | |
64be7eed | 120 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba | 121 | return extract_msr(val, data); |
64be7eed | 122 | case SYSTEM_IO_CAPABLE: |
dde9f7ba | 123 | return extract_io(val, data); |
64be7eed | 124 | default: |
dde9f7ba VP |
125 | return 0; |
126 | } | |
127 | } | |
128 | ||
dde9f7ba VP |
129 | struct msr_addr { |
130 | u32 reg; | |
131 | }; | |
132 | ||
fe27cb35 VP |
133 | struct io_addr { |
134 | u16 port; | |
135 | u8 bit_width; | |
136 | }; | |
137 | ||
dde9f7ba VP |
138 | typedef union { |
139 | struct msr_addr msr; | |
140 | struct io_addr io; | |
141 | } drv_addr_union; | |
142 | ||
fe27cb35 | 143 | struct drv_cmd { |
dde9f7ba | 144 | unsigned int type; |
fe27cb35 | 145 | cpumask_t mask; |
dde9f7ba | 146 | drv_addr_union addr; |
fe27cb35 VP |
147 | u32 val; |
148 | }; | |
149 | ||
150 | static void do_drv_read(struct drv_cmd *cmd) | |
1da177e4 | 151 | { |
dde9f7ba VP |
152 | u32 h; |
153 | ||
154 | switch (cmd->type) { | |
64be7eed | 155 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba VP |
156 | rdmsr(cmd->addr.msr.reg, cmd->val, h); |
157 | break; | |
64be7eed | 158 | case SYSTEM_IO_CAPABLE: |
4e581ff1 VP |
159 | acpi_os_read_port((acpi_io_address)cmd->addr.io.port, |
160 | &cmd->val, | |
161 | (u32)cmd->addr.io.bit_width); | |
dde9f7ba | 162 | break; |
64be7eed | 163 | default: |
dde9f7ba VP |
164 | break; |
165 | } | |
fe27cb35 | 166 | } |
1da177e4 | 167 | |
fe27cb35 VP |
168 | static void do_drv_write(struct drv_cmd *cmd) |
169 | { | |
dde9f7ba VP |
170 | u32 h = 0; |
171 | ||
172 | switch (cmd->type) { | |
64be7eed | 173 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba VP |
174 | wrmsr(cmd->addr.msr.reg, cmd->val, h); |
175 | break; | |
64be7eed | 176 | case SYSTEM_IO_CAPABLE: |
4e581ff1 VP |
177 | acpi_os_write_port((acpi_io_address)cmd->addr.io.port, |
178 | cmd->val, | |
179 | (u32)cmd->addr.io.bit_width); | |
dde9f7ba | 180 | break; |
64be7eed | 181 | default: |
dde9f7ba VP |
182 | break; |
183 | } | |
fe27cb35 | 184 | } |
1da177e4 | 185 | |
95dd7227 | 186 | static void drv_read(struct drv_cmd *cmd) |
fe27cb35 | 187 | { |
64be7eed | 188 | cpumask_t saved_mask = current->cpus_allowed; |
fe27cb35 VP |
189 | cmd->val = 0; |
190 | ||
191 | set_cpus_allowed(current, cmd->mask); | |
192 | do_drv_read(cmd); | |
193 | set_cpus_allowed(current, saved_mask); | |
fe27cb35 VP |
194 | } |
195 | ||
196 | static void drv_write(struct drv_cmd *cmd) | |
197 | { | |
64be7eed VP |
198 | cpumask_t saved_mask = current->cpus_allowed; |
199 | unsigned int i; | |
fe27cb35 VP |
200 | |
201 | for_each_cpu_mask(i, cmd->mask) { | |
202 | set_cpus_allowed(current, cpumask_of_cpu(i)); | |
203 | do_drv_write(cmd); | |
1da177e4 LT |
204 | } |
205 | ||
fe27cb35 VP |
206 | set_cpus_allowed(current, saved_mask); |
207 | return; | |
208 | } | |
1da177e4 | 209 | |
fe27cb35 VP |
210 | static u32 get_cur_val(cpumask_t mask) |
211 | { | |
64be7eed VP |
212 | struct acpi_processor_performance *perf; |
213 | struct drv_cmd cmd; | |
1da177e4 | 214 | |
fe27cb35 VP |
215 | if (unlikely(cpus_empty(mask))) |
216 | return 0; | |
1da177e4 | 217 | |
dde9f7ba VP |
218 | switch (drv_data[first_cpu(mask)]->cpu_feature) { |
219 | case SYSTEM_INTEL_MSR_CAPABLE: | |
220 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
221 | cmd.addr.msr.reg = MSR_IA32_PERF_STATUS; | |
222 | break; | |
223 | case SYSTEM_IO_CAPABLE: | |
224 | cmd.type = SYSTEM_IO_CAPABLE; | |
225 | perf = drv_data[first_cpu(mask)]->acpi_data; | |
226 | cmd.addr.io.port = perf->control_register.address; | |
227 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
228 | break; | |
229 | default: | |
230 | return 0; | |
231 | } | |
232 | ||
fe27cb35 | 233 | cmd.mask = mask; |
1da177e4 | 234 | |
fe27cb35 | 235 | drv_read(&cmd); |
1da177e4 | 236 | |
fe27cb35 VP |
237 | dprintk("get_cur_val = %u\n", cmd.val); |
238 | ||
239 | return cmd.val; | |
240 | } | |
1da177e4 | 241 | |
dfde5d62 VP |
242 | /* |
243 | * Return the measured active (C0) frequency on this CPU since last call | |
244 | * to this function. | |
245 | * Input: cpu number | |
246 | * Return: Average CPU frequency in terms of max frequency (zero on error) | |
247 | * | |
248 | * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance | |
249 | * over a period of time, while CPU is in C0 state. | |
250 | * IA32_MPERF counts at the rate of max advertised frequency | |
251 | * IA32_APERF counts at the rate of actual CPU frequency | |
252 | * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and | |
253 | * no meaning should be associated with absolute values of these MSRs. | |
254 | */ | |
255 | static unsigned int get_measured_perf(unsigned int cpu) | |
256 | { | |
257 | union { | |
258 | struct { | |
259 | u32 lo; | |
260 | u32 hi; | |
261 | } split; | |
262 | u64 whole; | |
263 | } aperf_cur, mperf_cur; | |
264 | ||
265 | cpumask_t saved_mask; | |
266 | unsigned int perf_percent; | |
267 | unsigned int retval; | |
268 | ||
269 | saved_mask = current->cpus_allowed; | |
270 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | |
271 | if (get_cpu() != cpu) { | |
272 | /* We were not able to run on requested processor */ | |
273 | put_cpu(); | |
274 | return 0; | |
275 | } | |
276 | ||
277 | rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi); | |
278 | rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi); | |
279 | ||
280 | wrmsr(MSR_IA32_APERF, 0,0); | |
281 | wrmsr(MSR_IA32_MPERF, 0,0); | |
282 | ||
283 | #ifdef __i386__ | |
284 | /* | |
285 | * We dont want to do 64 bit divide with 32 bit kernel | |
286 | * Get an approximate value. Return failure in case we cannot get | |
287 | * an approximate value. | |
288 | */ | |
289 | if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) { | |
290 | int shift_count; | |
291 | u32 h; | |
292 | ||
293 | h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi); | |
294 | shift_count = fls(h); | |
295 | ||
296 | aperf_cur.whole >>= shift_count; | |
297 | mperf_cur.whole >>= shift_count; | |
298 | } | |
299 | ||
300 | if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) { | |
301 | int shift_count = 7; | |
302 | aperf_cur.split.lo >>= shift_count; | |
303 | mperf_cur.split.lo >>= shift_count; | |
304 | } | |
305 | ||
95dd7227 | 306 | if (aperf_cur.split.lo && mperf_cur.split.lo) |
dfde5d62 | 307 | perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo; |
95dd7227 | 308 | else |
dfde5d62 | 309 | perf_percent = 0; |
dfde5d62 VP |
310 | |
311 | #else | |
312 | if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) { | |
313 | int shift_count = 7; | |
314 | aperf_cur.whole >>= shift_count; | |
315 | mperf_cur.whole >>= shift_count; | |
316 | } | |
317 | ||
95dd7227 | 318 | if (aperf_cur.whole && mperf_cur.whole) |
dfde5d62 | 319 | perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole; |
95dd7227 | 320 | else |
dfde5d62 | 321 | perf_percent = 0; |
dfde5d62 VP |
322 | |
323 | #endif | |
324 | ||
325 | retval = drv_data[cpu]->max_freq * perf_percent / 100; | |
326 | ||
327 | put_cpu(); | |
328 | set_cpus_allowed(current, saved_mask); | |
329 | ||
330 | dprintk("cpu %d: performance percent %d\n", cpu, perf_percent); | |
331 | return retval; | |
332 | } | |
333 | ||
fe27cb35 VP |
334 | static unsigned int get_cur_freq_on_cpu(unsigned int cpu) |
335 | { | |
64be7eed VP |
336 | struct acpi_cpufreq_data *data = drv_data[cpu]; |
337 | unsigned int freq; | |
fe27cb35 VP |
338 | |
339 | dprintk("get_cur_freq_on_cpu (%d)\n", cpu); | |
340 | ||
341 | if (unlikely(data == NULL || | |
64be7eed | 342 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 | 343 | return 0; |
1da177e4 LT |
344 | } |
345 | ||
fe27cb35 VP |
346 | freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data); |
347 | dprintk("cur freq = %u\n", freq); | |
1da177e4 | 348 | |
fe27cb35 | 349 | return freq; |
1da177e4 LT |
350 | } |
351 | ||
fe27cb35 | 352 | static unsigned int check_freqs(cpumask_t mask, unsigned int freq, |
64be7eed | 353 | struct acpi_cpufreq_data *data) |
fe27cb35 | 354 | { |
64be7eed VP |
355 | unsigned int cur_freq; |
356 | unsigned int i; | |
1da177e4 | 357 | |
95dd7227 | 358 | for (i=0; i<100; i++) { |
fe27cb35 VP |
359 | cur_freq = extract_freq(get_cur_val(mask), data); |
360 | if (cur_freq == freq) | |
361 | return 1; | |
362 | udelay(10); | |
363 | } | |
364 | return 0; | |
365 | } | |
366 | ||
367 | static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |
64be7eed | 368 | unsigned int target_freq, unsigned int relation) |
1da177e4 | 369 | { |
64be7eed VP |
370 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
371 | struct acpi_processor_performance *perf; | |
372 | struct cpufreq_freqs freqs; | |
373 | cpumask_t online_policy_cpus; | |
374 | struct drv_cmd cmd; | |
375 | unsigned int msr; | |
376 | unsigned int next_state = 0; | |
377 | unsigned int next_perf_state = 0; | |
378 | unsigned int i; | |
379 | int result = 0; | |
fe27cb35 VP |
380 | |
381 | dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu); | |
382 | ||
383 | if (unlikely(data == NULL || | |
95dd7227 | 384 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 VP |
385 | return -ENODEV; |
386 | } | |
1da177e4 | 387 | |
fe27cb35 | 388 | perf = data->acpi_data; |
1da177e4 | 389 | result = cpufreq_frequency_table_target(policy, |
64be7eed VP |
390 | data->freq_table, |
391 | target_freq, | |
392 | relation, &next_state); | |
09b4d1ee | 393 | if (unlikely(result)) |
fe27cb35 | 394 | return -ENODEV; |
09b4d1ee | 395 | |
7e1f19e5 | 396 | #ifdef CONFIG_HOTPLUG_CPU |
09b4d1ee VP |
397 | /* cpufreq holds the hotplug lock, so we are safe from here on */ |
398 | cpus_and(online_policy_cpus, cpu_online_map, policy->cpus); | |
7e1f19e5 AM |
399 | #else |
400 | online_policy_cpus = policy->cpus; | |
401 | #endif | |
1da177e4 | 402 | |
fe27cb35 | 403 | next_perf_state = data->freq_table[next_state].index; |
7650b281 | 404 | if (perf->state == next_perf_state) { |
fe27cb35 | 405 | if (unlikely(data->resume)) { |
64be7eed VP |
406 | dprintk("Called after resume, resetting to P%d\n", |
407 | next_perf_state); | |
fe27cb35 VP |
408 | data->resume = 0; |
409 | } else { | |
64be7eed VP |
410 | dprintk("Already at target state (P%d)\n", |
411 | next_perf_state); | |
fe27cb35 VP |
412 | return 0; |
413 | } | |
09b4d1ee VP |
414 | } |
415 | ||
64be7eed VP |
416 | switch (data->cpu_feature) { |
417 | case SYSTEM_INTEL_MSR_CAPABLE: | |
418 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
419 | cmd.addr.msr.reg = MSR_IA32_PERF_CTL; | |
420 | msr = | |
421 | (u32) perf->states[next_perf_state]. | |
422 | control & INTEL_MSR_RANGE; | |
423 | cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr; | |
424 | break; | |
425 | case SYSTEM_IO_CAPABLE: | |
426 | cmd.type = SYSTEM_IO_CAPABLE; | |
427 | cmd.addr.io.port = perf->control_register.address; | |
428 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
429 | cmd.val = (u32) perf->states[next_perf_state].control; | |
430 | break; | |
431 | default: | |
432 | return -ENODEV; | |
433 | } | |
09b4d1ee | 434 | |
fe27cb35 | 435 | cpus_clear(cmd.mask); |
09b4d1ee | 436 | |
fe27cb35 VP |
437 | if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY) |
438 | cmd.mask = online_policy_cpus; | |
439 | else | |
440 | cpu_set(policy->cpu, cmd.mask); | |
09b4d1ee | 441 | |
7650b281 VP |
442 | freqs.old = data->freq_table[perf->state].frequency; |
443 | freqs.new = data->freq_table[next_perf_state].frequency; | |
fe27cb35 VP |
444 | for_each_cpu_mask(i, cmd.mask) { |
445 | freqs.cpu = i; | |
446 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
09b4d1ee | 447 | } |
1da177e4 | 448 | |
fe27cb35 | 449 | drv_write(&cmd); |
09b4d1ee | 450 | |
fe27cb35 VP |
451 | if (acpi_pstate_strict) { |
452 | if (!check_freqs(cmd.mask, freqs.new, data)) { | |
453 | dprintk("acpi_cpufreq_target failed (%d)\n", | |
64be7eed | 454 | policy->cpu); |
fe27cb35 | 455 | return -EAGAIN; |
09b4d1ee VP |
456 | } |
457 | } | |
458 | ||
fe27cb35 VP |
459 | for_each_cpu_mask(i, cmd.mask) { |
460 | freqs.cpu = i; | |
461 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
462 | } | |
463 | perf->state = next_perf_state; | |
464 | ||
465 | return result; | |
1da177e4 LT |
466 | } |
467 | ||
64be7eed | 468 | static int acpi_cpufreq_verify(struct cpufreq_policy *policy) |
1da177e4 | 469 | { |
fe27cb35 | 470 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 LT |
471 | |
472 | dprintk("acpi_cpufreq_verify\n"); | |
473 | ||
fe27cb35 | 474 | return cpufreq_frequency_table_verify(policy, data->freq_table); |
1da177e4 LT |
475 | } |
476 | ||
1da177e4 | 477 | static unsigned long |
64be7eed | 478 | acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) |
1da177e4 | 479 | { |
64be7eed | 480 | struct acpi_processor_performance *perf = data->acpi_data; |
09b4d1ee | 481 | |
1da177e4 LT |
482 | if (cpu_khz) { |
483 | /* search the closest match to cpu_khz */ | |
484 | unsigned int i; | |
485 | unsigned long freq; | |
09b4d1ee | 486 | unsigned long freqn = perf->states[0].core_frequency * 1000; |
1da177e4 | 487 | |
95dd7227 | 488 | for (i=0; i<(perf->state_count-1); i++) { |
1da177e4 | 489 | freq = freqn; |
95dd7227 | 490 | freqn = perf->states[i+1].core_frequency * 1000; |
1da177e4 | 491 | if ((2 * cpu_khz) > (freqn + freq)) { |
09b4d1ee | 492 | perf->state = i; |
64be7eed | 493 | return freq; |
1da177e4 LT |
494 | } |
495 | } | |
95dd7227 | 496 | perf->state = perf->state_count-1; |
64be7eed | 497 | return freqn; |
09b4d1ee | 498 | } else { |
1da177e4 | 499 | /* assume CPU is at P0... */ |
09b4d1ee VP |
500 | perf->state = 0; |
501 | return perf->states[0].core_frequency * 1000; | |
502 | } | |
1da177e4 LT |
503 | } |
504 | ||
09b4d1ee VP |
505 | /* |
506 | * acpi_cpufreq_early_init - initialize ACPI P-States library | |
507 | * | |
508 | * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) | |
509 | * in order to determine correct frequency and voltage pairings. We can | |
510 | * do _PDC and _PSD and find out the processor dependency for the | |
511 | * actual init that will happen later... | |
512 | */ | |
fe27cb35 | 513 | static int acpi_cpufreq_early_init(void) |
09b4d1ee | 514 | { |
64be7eed VP |
515 | struct acpi_processor_performance *data; |
516 | cpumask_t covered; | |
517 | unsigned int i, j; | |
09b4d1ee VP |
518 | |
519 | dprintk("acpi_cpufreq_early_init\n"); | |
520 | ||
fb1bb34d | 521 | for_each_possible_cpu(i) { |
64be7eed VP |
522 | data = kzalloc(sizeof(struct acpi_processor_performance), |
523 | GFP_KERNEL); | |
09b4d1ee | 524 | if (!data) { |
fe27cb35 | 525 | for_each_cpu_mask(j, covered) { |
09b4d1ee VP |
526 | kfree(acpi_perf_data[j]); |
527 | acpi_perf_data[j] = NULL; | |
528 | } | |
64be7eed | 529 | return -ENOMEM; |
09b4d1ee VP |
530 | } |
531 | acpi_perf_data[i] = data; | |
fe27cb35 | 532 | cpu_set(i, covered); |
09b4d1ee VP |
533 | } |
534 | ||
535 | /* Do initialization in ACPI core */ | |
fe27cb35 VP |
536 | acpi_processor_preregister_performance(acpi_perf_data); |
537 | return 0; | |
09b4d1ee VP |
538 | } |
539 | ||
95625b8f | 540 | #ifdef CONFIG_SMP |
8adcc0c6 VP |
541 | /* |
542 | * Some BIOSes do SW_ANY coordination internally, either set it up in hw | |
543 | * or do it in BIOS firmware and won't inform about it to OS. If not | |
544 | * detected, this has a side effect of making CPU run at a different speed | |
545 | * than OS intended it to run at. Detect it and handle it cleanly. | |
546 | */ | |
547 | static int bios_with_sw_any_bug; | |
548 | ||
0497c8ca | 549 | static int sw_any_bug_found(struct dmi_system_id *d) |
8adcc0c6 VP |
550 | { |
551 | bios_with_sw_any_bug = 1; | |
552 | return 0; | |
553 | } | |
554 | ||
0497c8ca | 555 | static struct dmi_system_id sw_any_bug_dmi_table[] = { |
8adcc0c6 VP |
556 | { |
557 | .callback = sw_any_bug_found, | |
558 | .ident = "Supermicro Server X6DLP", | |
559 | .matches = { | |
560 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), | |
561 | DMI_MATCH(DMI_BIOS_VERSION, "080010"), | |
562 | DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), | |
563 | }, | |
564 | }, | |
565 | { } | |
566 | }; | |
95625b8f | 567 | #endif |
8adcc0c6 | 568 | |
64be7eed | 569 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) |
1da177e4 | 570 | { |
64be7eed VP |
571 | unsigned int i; |
572 | unsigned int valid_states = 0; | |
573 | unsigned int cpu = policy->cpu; | |
574 | struct acpi_cpufreq_data *data; | |
64be7eed VP |
575 | unsigned int result = 0; |
576 | struct cpuinfo_x86 *c = &cpu_data[policy->cpu]; | |
577 | struct acpi_processor_performance *perf; | |
1da177e4 | 578 | |
1da177e4 | 579 | dprintk("acpi_cpufreq_cpu_init\n"); |
1da177e4 | 580 | |
09b4d1ee | 581 | if (!acpi_perf_data[cpu]) |
64be7eed | 582 | return -ENODEV; |
09b4d1ee | 583 | |
fe27cb35 | 584 | data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL); |
1da177e4 | 585 | if (!data) |
64be7eed | 586 | return -ENOMEM; |
1da177e4 | 587 | |
09b4d1ee | 588 | data->acpi_data = acpi_perf_data[cpu]; |
fe27cb35 | 589 | drv_data[cpu] = data; |
1da177e4 | 590 | |
95dd7227 | 591 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) |
fe27cb35 | 592 | acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; |
1da177e4 | 593 | |
fe27cb35 | 594 | result = acpi_processor_register_performance(data->acpi_data, cpu); |
1da177e4 LT |
595 | if (result) |
596 | goto err_free; | |
597 | ||
09b4d1ee | 598 | perf = data->acpi_data; |
09b4d1ee | 599 | policy->shared_type = perf->shared_type; |
95dd7227 | 600 | |
46f18e3a | 601 | /* |
95dd7227 | 602 | * Will let policy->cpus know about dependency only when software |
46f18e3a VP |
603 | * coordination is required. |
604 | */ | |
605 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || | |
8adcc0c6 | 606 | policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
46f18e3a | 607 | policy->cpus = perf->shared_cpu_map; |
8adcc0c6 VP |
608 | } |
609 | ||
610 | #ifdef CONFIG_SMP | |
611 | dmi_check_system(sw_any_bug_dmi_table); | |
612 | if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) { | |
613 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; | |
614 | policy->cpus = cpu_core_map[cpu]; | |
615 | } | |
616 | #endif | |
09b4d1ee | 617 | |
1da177e4 | 618 | /* capability check */ |
09b4d1ee | 619 | if (perf->state_count <= 1) { |
1da177e4 LT |
620 | dprintk("No P-States\n"); |
621 | result = -ENODEV; | |
622 | goto err_unreg; | |
623 | } | |
09b4d1ee | 624 | |
fe27cb35 VP |
625 | if (perf->control_register.space_id != perf->status_register.space_id) { |
626 | result = -ENODEV; | |
627 | goto err_unreg; | |
628 | } | |
629 | ||
630 | switch (perf->control_register.space_id) { | |
64be7eed | 631 | case ACPI_ADR_SPACE_SYSTEM_IO: |
fe27cb35 | 632 | dprintk("SYSTEM IO addr space\n"); |
dde9f7ba VP |
633 | data->cpu_feature = SYSTEM_IO_CAPABLE; |
634 | break; | |
64be7eed | 635 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
dde9f7ba VP |
636 | dprintk("HARDWARE addr space\n"); |
637 | if (!check_est_cpu(cpu)) { | |
638 | result = -ENODEV; | |
639 | goto err_unreg; | |
640 | } | |
641 | data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; | |
fe27cb35 | 642 | break; |
64be7eed | 643 | default: |
fe27cb35 | 644 | dprintk("Unknown addr space %d\n", |
64be7eed | 645 | (u32) (perf->control_register.space_id)); |
1da177e4 LT |
646 | result = -ENODEV; |
647 | goto err_unreg; | |
648 | } | |
649 | ||
95dd7227 DJ |
650 | data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) * |
651 | (perf->state_count+1), GFP_KERNEL); | |
1da177e4 LT |
652 | if (!data->freq_table) { |
653 | result = -ENOMEM; | |
654 | goto err_unreg; | |
655 | } | |
656 | ||
657 | /* detect transition latency */ | |
658 | policy->cpuinfo.transition_latency = 0; | |
95dd7227 | 659 | for (i=0; i<perf->state_count; i++) { |
64be7eed VP |
660 | if ((perf->states[i].transition_latency * 1000) > |
661 | policy->cpuinfo.transition_latency) | |
662 | policy->cpuinfo.transition_latency = | |
663 | perf->states[i].transition_latency * 1000; | |
1da177e4 LT |
664 | } |
665 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | |
666 | ||
dfde5d62 | 667 | data->max_freq = perf->states[0].core_frequency * 1000; |
1da177e4 | 668 | /* table init */ |
95dd7227 DJ |
669 | for (i=0; i<perf->state_count; i++) { |
670 | if (i>0 && perf->states[i].core_frequency == | |
671 | perf->states[i-1].core_frequency) | |
fe27cb35 VP |
672 | continue; |
673 | ||
674 | data->freq_table[valid_states].index = i; | |
675 | data->freq_table[valid_states].frequency = | |
64be7eed | 676 | perf->states[i].core_frequency * 1000; |
fe27cb35 | 677 | valid_states++; |
1da177e4 | 678 | } |
3d4a7ef3 | 679 | data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END; |
1da177e4 LT |
680 | |
681 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); | |
95dd7227 | 682 | if (result) |
1da177e4 | 683 | goto err_freqfree; |
1da177e4 | 684 | |
a507ac4b | 685 | switch (perf->control_register.space_id) { |
64be7eed | 686 | case ACPI_ADR_SPACE_SYSTEM_IO: |
dde9f7ba VP |
687 | /* Current speed is unknown and not detectable by IO port */ |
688 | policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); | |
689 | break; | |
64be7eed | 690 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
7650b281 | 691 | acpi_cpufreq_driver.get = get_cur_freq_on_cpu; |
a507ac4b | 692 | policy->cur = get_cur_freq_on_cpu(cpu); |
dde9f7ba | 693 | break; |
64be7eed | 694 | default: |
dde9f7ba VP |
695 | break; |
696 | } | |
697 | ||
1da177e4 LT |
698 | /* notify BIOS that we exist */ |
699 | acpi_processor_notify_smm(THIS_MODULE); | |
700 | ||
dfde5d62 VP |
701 | /* Check for APERF/MPERF support in hardware */ |
702 | if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) { | |
703 | unsigned int ecx; | |
704 | ecx = cpuid_ecx(6); | |
95dd7227 | 705 | if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY) |
dfde5d62 | 706 | acpi_cpufreq_driver.getavg = get_measured_perf; |
dfde5d62 VP |
707 | } |
708 | ||
fe27cb35 | 709 | dprintk("CPU%u - ACPI performance management activated.\n", cpu); |
09b4d1ee | 710 | for (i = 0; i < perf->state_count; i++) |
1da177e4 | 711 | dprintk(" %cP%d: %d MHz, %d mW, %d uS\n", |
64be7eed | 712 | (i == perf->state ? '*' : ' '), i, |
09b4d1ee VP |
713 | (u32) perf->states[i].core_frequency, |
714 | (u32) perf->states[i].power, | |
715 | (u32) perf->states[i].transition_latency); | |
1da177e4 LT |
716 | |
717 | cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu); | |
64be7eed | 718 | |
4b31e774 DB |
719 | /* |
720 | * the first call to ->target() should result in us actually | |
721 | * writing something to the appropriate registers. | |
722 | */ | |
723 | data->resume = 1; | |
64be7eed | 724 | |
fe27cb35 | 725 | return result; |
1da177e4 | 726 | |
95dd7227 | 727 | err_freqfree: |
1da177e4 | 728 | kfree(data->freq_table); |
95dd7227 | 729 | err_unreg: |
09b4d1ee | 730 | acpi_processor_unregister_performance(perf, cpu); |
95dd7227 | 731 | err_free: |
1da177e4 | 732 | kfree(data); |
fe27cb35 | 733 | drv_data[cpu] = NULL; |
1da177e4 | 734 | |
64be7eed | 735 | return result; |
1da177e4 LT |
736 | } |
737 | ||
64be7eed | 738 | static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
1da177e4 | 739 | { |
fe27cb35 | 740 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 | 741 | |
1da177e4 LT |
742 | dprintk("acpi_cpufreq_cpu_exit\n"); |
743 | ||
744 | if (data) { | |
745 | cpufreq_frequency_table_put_attr(policy->cpu); | |
fe27cb35 | 746 | drv_data[policy->cpu] = NULL; |
64be7eed VP |
747 | acpi_processor_unregister_performance(data->acpi_data, |
748 | policy->cpu); | |
1da177e4 LT |
749 | kfree(data); |
750 | } | |
751 | ||
64be7eed | 752 | return 0; |
1da177e4 LT |
753 | } |
754 | ||
64be7eed | 755 | static int acpi_cpufreq_resume(struct cpufreq_policy *policy) |
1da177e4 | 756 | { |
fe27cb35 | 757 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 | 758 | |
1da177e4 LT |
759 | dprintk("acpi_cpufreq_resume\n"); |
760 | ||
761 | data->resume = 1; | |
762 | ||
64be7eed | 763 | return 0; |
1da177e4 LT |
764 | } |
765 | ||
64be7eed | 766 | static struct freq_attr *acpi_cpufreq_attr[] = { |
1da177e4 LT |
767 | &cpufreq_freq_attr_scaling_available_freqs, |
768 | NULL, | |
769 | }; | |
770 | ||
771 | static struct cpufreq_driver acpi_cpufreq_driver = { | |
64be7eed VP |
772 | .verify = acpi_cpufreq_verify, |
773 | .target = acpi_cpufreq_target, | |
64be7eed VP |
774 | .init = acpi_cpufreq_cpu_init, |
775 | .exit = acpi_cpufreq_cpu_exit, | |
776 | .resume = acpi_cpufreq_resume, | |
777 | .name = "acpi-cpufreq", | |
778 | .owner = THIS_MODULE, | |
779 | .attr = acpi_cpufreq_attr, | |
1da177e4 LT |
780 | }; |
781 | ||
64be7eed | 782 | static int __init acpi_cpufreq_init(void) |
1da177e4 | 783 | { |
1da177e4 LT |
784 | dprintk("acpi_cpufreq_init\n"); |
785 | ||
fe27cb35 | 786 | acpi_cpufreq_early_init(); |
09b4d1ee | 787 | |
64be7eed | 788 | return cpufreq_register_driver(&acpi_cpufreq_driver); |
1da177e4 LT |
789 | } |
790 | ||
64be7eed | 791 | static void __exit acpi_cpufreq_exit(void) |
1da177e4 | 792 | { |
64be7eed | 793 | unsigned int i; |
1da177e4 LT |
794 | dprintk("acpi_cpufreq_exit\n"); |
795 | ||
796 | cpufreq_unregister_driver(&acpi_cpufreq_driver); | |
797 | ||
fb1bb34d | 798 | for_each_possible_cpu(i) { |
09b4d1ee VP |
799 | kfree(acpi_perf_data[i]); |
800 | acpi_perf_data[i] = NULL; | |
801 | } | |
1da177e4 LT |
802 | return; |
803 | } | |
804 | ||
d395bf12 | 805 | module_param(acpi_pstate_strict, uint, 0644); |
64be7eed | 806 | MODULE_PARM_DESC(acpi_pstate_strict, |
95dd7227 DJ |
807 | "value 0 or non-zero. non-zero -> strict ACPI checks are " |
808 | "performed during frequency changes."); | |
1da177e4 LT |
809 | |
810 | late_initcall(acpi_cpufreq_init); | |
811 | module_exit(acpi_cpufreq_exit); | |
812 | ||
813 | MODULE_ALIAS("acpi"); |