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[CPUFREQ] Avoid the ondemand cpufreq governor to use a too high frequency for stats.
[deliverable/linux.git] / arch / i386 / kernel / cpu / cpufreq / powernow-k8.c
CommitLineData
1da177e4 1/*
841e40b3 2 * (c) 2003, 2004, 2005 Advanced Micro Devices, Inc.
1da177e4
LT		 3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
6 *
065b807c 7 * Support : mark.langsdorf@amd.com
1da177e4
LT		 8 *
9 * Based on the powernow-k7.c module written by Dave Jones.
10 * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs
11 * (C) 2004 Dominik Brodowski <linux@brodo.de>
12 * (C) 2004 Pavel Machek <pavel@suse.cz>
13 * Licensed under the terms of the GNU GPL License version 2.
14 * Based upon datasheets & sample CPUs kindly provided by AMD.
15 *
16 * Valuable input gratefully received from Dave Jones, Pavel Machek,
17 * Dominik Brodowski, and others.
065b807c 18 * Originally developed by Paul Devriendt.
1da177e4
LT		 19 * Processor information obtained from Chapter 9 (Power and Thermal Management)
20 * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
21 * Opteron Processors" available for download from www.amd.com
22 *
23 * Tables for specific CPUs can be infrerred from
065b807c 24 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
1da177e4
LT		 25 */
26
27#include <linux/kernel.h>
28#include <linux/smp.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/cpufreq.h>
32#include <linux/slab.h>
33#include <linux/string.h>
065b807c 34#include <linux/cpumask.h>
1da177e4
LT		 35
36#include <asm/msr.h>
37#include <asm/io.h>
38#include <asm/delay.h>
39
40#ifdef CONFIG_X86_POWERNOW_K8_ACPI
41#include <linux/acpi.h>
42#include <acpi/processor.h>
43#endif
44
45#define PFX "powernow-k8: "
46#define BFX PFX "BIOS error: "
841e40b3 47#define VERSION "version 1.50.3"
1da177e4
LT		 48#include "powernow-k8.h"
49
50/* serialize freq changes */
51static DECLARE_MUTEX(fidvid_sem);
52
53static struct powernow_k8_data *powernow_data[NR_CPUS];
54
065b807c
DJ		 55#ifndef CONFIG_SMP
56static cpumask_t cpu_core_map[1];
57#endif
58
1da177e4
LT		 59/* Return a frequency in MHz, given an input fid */
60static u32 find_freq_from_fid(u32 fid)
61{
62 return 800 + (fid * 100);
63}
64
65/* Return a frequency in KHz, given an input fid */
66static u32 find_khz_freq_from_fid(u32 fid)
67{
68 return 1000 * find_freq_from_fid(fid);
69}
70
71/* Return a voltage in miliVolts, given an input vid */
72static u32 find_millivolts_from_vid(struct powernow_k8_data *data, u32 vid)
73{
74 return 1550-vid*25;
75}
76
77/* Return the vco fid for an input fid
78 *
79 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
80 * only from corresponding high fids. This returns "high" fid corresponding to
81 * "low" one.
82 */
83static u32 convert_fid_to_vco_fid(u32 fid)
84{
85 if (fid < HI_FID_TABLE_BOTTOM) {
86 return 8 + (2 * fid);
87 } else {
88 return fid;
89 }
90}
91
92/*
93 * Return 1 if the pending bit is set. Unless we just instructed the processor
94 * to transition to a new state, seeing this bit set is really bad news.
95 */
96static int pending_bit_stuck(void)
97{
98 u32 lo, hi;
99
100 rdmsr(MSR_FIDVID_STATUS, lo, hi);
101 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
102}
103
104/*
105 * Update the global current fid / vid values from the status msr.
106 * Returns 1 on error.
107 */
108static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
109{
110 u32 lo, hi;
111 u32 i = 0;
112
7153d961 113 do {
1da177e4
LT		 114 if (i++ > 0x1000000) {
115 printk(KERN_ERR PFX "detected change pending stuck\n");
116 return 1;
117 }
118 rdmsr(MSR_FIDVID_STATUS, lo, hi);
7153d961 119 } while (lo & MSR_S_LO_CHANGE_PENDING);
1da177e4
LT		 120
121 data->currvid = hi & MSR_S_HI_CURRENT_VID;
122 data->currfid = lo & MSR_S_LO_CURRENT_FID;
123
124 return 0;
125}
126
127/* the isochronous relief time */
128static void count_off_irt(struct powernow_k8_data *data)
129{
130 udelay((1 << data->irt) * 10);
131 return;
132}
133
134/* the voltage stabalization time */
135static void count_off_vst(struct powernow_k8_data *data)
136{
137 udelay(data->vstable * VST_UNITS_20US);
138 return;
139}
140
141/* need to init the control msr to a safe value (for each cpu) */
142static void fidvid_msr_init(void)
143{
144 u32 lo, hi;
145 u8 fid, vid;
146
147 rdmsr(MSR_FIDVID_STATUS, lo, hi);
148 vid = hi & MSR_S_HI_CURRENT_VID;
149 fid = lo & MSR_S_LO_CURRENT_FID;
150 lo = fid | (vid << MSR_C_LO_VID_SHIFT);
151 hi = MSR_C_HI_STP_GNT_BENIGN;
152 dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
153 wrmsr(MSR_FIDVID_CTL, lo, hi);
154}
155
156
157/* write the new fid value along with the other control fields to the msr */
158static int write_new_fid(struct powernow_k8_data *data, u32 fid)
159{
160 u32 lo;
161 u32 savevid = data->currvid;
162
163 if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
164 printk(KERN_ERR PFX "internal error - overflow on fid write\n");
165 return 1;
166 }
167
168 lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
169
170 dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
171 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
172
173 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
174
175 if (query_current_values_with_pending_wait(data))
176 return 1;
177
178 count_off_irt(data);
179
180 if (savevid != data->currvid) {
181 printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n",
182 savevid, data->currvid);
183 return 1;
184 }
185
186 if (fid != data->currfid) {
187 printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
188 data->currfid);
189 return 1;
190 }
191
192 return 0;
193}
194
195/* Write a new vid to the hardware */
196static int write_new_vid(struct powernow_k8_data *data, u32 vid)
197{
198 u32 lo;
199 u32 savefid = data->currfid;
200
201 if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
202 printk(KERN_ERR PFX "internal error - overflow on vid write\n");
203 return 1;
204 }
205
206 lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
207
208 dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
209 vid, lo, STOP_GRANT_5NS);
210
211 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
212
213 if (query_current_values_with_pending_wait(data))
214 return 1;
215
216 if (savefid != data->currfid) {
217 printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n",
218 savefid, data->currfid);
219 return 1;
220 }
221
222 if (vid != data->currvid) {
223 printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid,
224 data->currvid);
225 return 1;
226 }
227
228 return 0;
229}
230
231/*
232 * Reduce the vid by the max of step or reqvid.
233 * Decreasing vid codes represent increasing voltages:
841e40b3 234 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
1da177e4
LT		 235 */
236static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
237{
238 if ((data->currvid - reqvid) > step)
239 reqvid = data->currvid - step;
240
241 if (write_new_vid(data, reqvid))
242 return 1;
243
244 count_off_vst(data);
245
246 return 0;
247}
248
249/* Change the fid and vid, by the 3 phases. */
250static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
251{
252 if (core_voltage_pre_transition(data, reqvid))
253 return 1;
254
255 if (core_frequency_transition(data, reqfid))
256 return 1;
257
258 if (core_voltage_post_transition(data, reqvid))
259 return 1;
260
261 if (query_current_values_with_pending_wait(data))
262 return 1;
263
264 if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
265 printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
266 smp_processor_id(),
267 reqfid, reqvid, data->currfid, data->currvid);
268 return 1;
269 }
270
271 dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
272 smp_processor_id(), data->currfid, data->currvid);
273
274 return 0;
275}
276
277/* Phase 1 - core voltage transition ... setup voltage */
278static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid)
279{
280 u32 rvosteps = data->rvo;
281 u32 savefid = data->currfid;
065b807c 282 u32 maxvid, lo;
1da177e4
LT		 283
284 dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
285 smp_processor_id(),
286 data->currfid, data->currvid, reqvid, data->rvo);
287
065b807c
DJ		 288 rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
289 maxvid = 0x1f & (maxvid >> 16);
290 dprintk("ph1 maxvid=0x%x\n", maxvid);
291 if (reqvid < maxvid) /* lower numbers are higher voltages */
292 reqvid = maxvid;
293
1da177e4
LT		 294 while (data->currvid > reqvid) {
295 dprintk("ph1: curr 0x%x, req vid 0x%x\n",
296 data->currvid, reqvid);
297 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
298 return 1;
299 }
300
065b807c
DJ		 301 while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) {
302 if (data->currvid == maxvid) {
1da177e4
LT		 303 rvosteps = 0;
304 } else {
305 dprintk("ph1: changing vid for rvo, req 0x%x\n",
306 data->currvid - 1);
307 if (decrease_vid_code_by_step(data, data->currvid - 1, 1))
308 return 1;
309 rvosteps--;
310 }
311 }
312
313 if (query_current_values_with_pending_wait(data))
314 return 1;
315
316 if (savefid != data->currfid) {
317 printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid);
318 return 1;
319 }
320
321 dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
322 data->currfid, data->currvid);
323
324 return 0;
325}
326
327/* Phase 2 - core frequency transition */
328static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
329{
330 u32 vcoreqfid, vcocurrfid, vcofiddiff, savevid = data->currvid;
331
332 if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
333 printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n",
334 reqfid, data->currfid);
335 return 1;
336 }
337
338 if (data->currfid == reqfid) {
339 printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid);
340 return 0;
341 }
342
343 dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
344 smp_processor_id(),
345 data->currfid, data->currvid, reqfid);
346
347 vcoreqfid = convert_fid_to_vco_fid(reqfid);
348 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
349 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
350 : vcoreqfid - vcocurrfid;
351
352 while (vcofiddiff > 2) {
353 if (reqfid > data->currfid) {
354 if (data->currfid > LO_FID_TABLE_TOP) {
355 if (write_new_fid(data, data->currfid + 2)) {
356 return 1;
357 }
358 } else {
359 if (write_new_fid
360 (data, 2 + convert_fid_to_vco_fid(data->currfid))) {
361 return 1;
362 }
363 }
364 } else {
365 if (write_new_fid(data, data->currfid - 2))
366 return 1;
367 }
368
369 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
370 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
371 : vcoreqfid - vcocurrfid;
372 }
373
374 if (write_new_fid(data, reqfid))
375 return 1;
376
377 if (query_current_values_with_pending_wait(data))
378 return 1;
379
380 if (data->currfid != reqfid) {
381 printk(KERN_ERR PFX
382 "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
383 data->currfid, reqfid);
384 return 1;
385 }
386
387 if (savevid != data->currvid) {
388 printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
389 savevid, data->currvid);
390 return 1;
391 }
392
393 dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
394 data->currfid, data->currvid);
395
396 return 0;
397}
398
399/* Phase 3 - core voltage transition flow ... jump to the final vid. */
400static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid)
401{
402 u32 savefid = data->currfid;
403 u32 savereqvid = reqvid;
404
405 dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
406 smp_processor_id(),
407 data->currfid, data->currvid);
408
409 if (reqvid != data->currvid) {
410 if (write_new_vid(data, reqvid))
411 return 1;
412
413 if (savefid != data->currfid) {
414 printk(KERN_ERR PFX
415 "ph3: bad fid change, save 0x%x, curr 0x%x\n",
416 savefid, data->currfid);
417 return 1;
418 }
419
420 if (data->currvid != reqvid) {
421 printk(KERN_ERR PFX
422 "ph3: failed vid transition\n, req 0x%x, curr 0x%x",
423 reqvid, data->currvid);
424 return 1;
425 }
426 }
427
428 if (query_current_values_with_pending_wait(data))
429 return 1;
430
431 if (savereqvid != data->currvid) {
432 dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
433 return 1;
434 }
435
436 if (savefid != data->currfid) {
437 dprintk("ph3 failed, currfid changed 0x%x\n",
438 data->currfid);
439 return 1;
440 }
441
442 dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
443 data->currfid, data->currvid);
444
445 return 0;
446}
447
448static int check_supported_cpu(unsigned int cpu)
449{
450 cpumask_t oldmask = CPU_MASK_ALL;
451 u32 eax, ebx, ecx, edx;
452 unsigned int rc = 0;
453
454 oldmask = current->cpus_allowed;
455 set_cpus_allowed(current, cpumask_of_cpu(cpu));
456 schedule();
457
458 if (smp_processor_id() != cpu) {
459 printk(KERN_ERR "limiting to cpu %u failed\n", cpu);
460 goto out;
461 }
462
463 if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
464 goto out;
465
466 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
467 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
468 ((eax & CPUID_XFAM) != CPUID_XFAM_K8) ||
841e40b3 469 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_F)) {
1da177e4
LT		 470 printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
471 goto out;
472 }
473
474 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
475 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
476 printk(KERN_INFO PFX
477 "No frequency change capabilities detected\n");
478 goto out;
479 }
480
481 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
482 if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
483 printk(KERN_INFO PFX "Power state transitions not supported\n");
484 goto out;
485 }
486
487 rc = 1;
488
489out:
490 set_cpus_allowed(current, oldmask);
491 schedule();
492 return rc;
493
494}
495
496static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
497{
498 unsigned int j;
499 u8 lastfid = 0xff;
500
501 for (j = 0; j < data->numps; j++) {
502 if (pst[j].vid > LEAST_VID) {
503 printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid);
504 return -EINVAL;
505 }
506 if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */
507 printk(KERN_ERR BFX "0 vid exceeded with pstate %d\n", j);
508 return -ENODEV;
509 }
510 if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */
511 printk(KERN_ERR BFX "maxvid exceeded with pstate %d\n", j);
512 return -ENODEV;
513 }
514 if ((pst[j].fid > MAX_FID)
515 || (pst[j].fid & 1)
516 || (j && (pst[j].fid < HI_FID_TABLE_BOTTOM))) {
517 /* Only first fid is allowed to be in "low" range */
518 printk(KERN_ERR PFX "two low fids - %d : 0x%x\n", j, pst[j].fid);
519 return -EINVAL;
520 }
521 if (pst[j].fid < lastfid)
522 lastfid = pst[j].fid;
523 }
524 if (lastfid & 1) {
525 printk(KERN_ERR PFX "lastfid invalid\n");
526 return -EINVAL;
527 }
528 if (lastfid > LO_FID_TABLE_TOP)
529 printk(KERN_INFO PFX "first fid not from lo freq table\n");
530
531 return 0;
532}
533
534static void print_basics(struct powernow_k8_data *data)
535{
536 int j;
537 for (j = 0; j < data->numps; j++) {
538 if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID)
539 printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x (%d mV)\n", j,
540 data->powernow_table[j].index & 0xff,
541 data->powernow_table[j].frequency/1000,
542 data->powernow_table[j].index >> 8,
543 find_millivolts_from_vid(data, data->powernow_table[j].index >> 8));
544 }
545 if (data->batps)
546 printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
547}
548
549static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
550{
551 struct cpufreq_frequency_table *powernow_table;
552 unsigned int j;
553
554 if (data->batps) { /* use ACPI support to get full speed on mains power */
555 printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps);
556 data->numps = data->batps;
557 }
558
559 for ( j=1; j<data->numps; j++ ) {
560 if (pst[j-1].fid >= pst[j].fid) {
561 printk(KERN_ERR PFX "PST out of sequence\n");
562 return -EINVAL;
563 }
564 }
565
566 if (data->numps < 2) {
567 printk(KERN_ERR PFX "no p states to transition\n");
568 return -ENODEV;
569 }
570
571 if (check_pst_table(data, pst, maxvid))
572 return -EINVAL;
573
574 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
575 * (data->numps + 1)), GFP_KERNEL);
576 if (!powernow_table) {
577 printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
578 return -ENOMEM;
579 }
580
581 for (j = 0; j < data->numps; j++) {
582 powernow_table[j].index = pst[j].fid; /* lower 8 bits */
583 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
584 powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid);
585 }
586 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
587 powernow_table[data->numps].index = 0;
588
589 if (query_current_values_with_pending_wait(data)) {
590 kfree(powernow_table);
591 return -EIO;
592 }
593
594 dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
595 data->powernow_table = powernow_table;
596 print_basics(data);
597
598 for (j = 0; j < data->numps; j++)
599 if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid))
600 return 0;
601
602 dprintk("currfid/vid do not match PST, ignoring\n");
603 return 0;
604}
605
606/* Find and validate the PSB/PST table in BIOS. */
607static int find_psb_table(struct powernow_k8_data *data)
608{
609 struct psb_s *psb;
610 unsigned int i;
611 u32 mvs;
612 u8 maxvid;
613 u32 cpst = 0;
614 u32 thiscpuid;
615
616 for (i = 0xc0000; i < 0xffff0; i += 0x10) {
617 /* Scan BIOS looking for the signature. */
618 /* It can not be at ffff0 - it is too big. */
619
620 psb = phys_to_virt(i);
621 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
622 continue;
623
624 dprintk("found PSB header at 0x%p\n", psb);
625
626 dprintk("table vers: 0x%x\n", psb->tableversion);
627 if (psb->tableversion != PSB_VERSION_1_4) {
628 printk(KERN_INFO BFX "PSB table is not v1.4\n");
629 return -ENODEV;
630 }
631
632 dprintk("flags: 0x%x\n", psb->flags1);
633 if (psb->flags1) {
634 printk(KERN_ERR BFX "unknown flags\n");
635 return -ENODEV;
636 }
637
638 data->vstable = psb->vstable;
639 dprintk("voltage stabilization time: %d(*20us)\n", data->vstable);
640
641 dprintk("flags2: 0x%x\n", psb->flags2);
642 data->rvo = psb->flags2 & 3;
643 data->irt = ((psb->flags2) >> 2) & 3;
644 mvs = ((psb->flags2) >> 4) & 3;
645 data->vidmvs = 1 << mvs;
646 data->batps = ((psb->flags2) >> 6) & 3;
647
648 dprintk("ramp voltage offset: %d\n", data->rvo);
649 dprintk("isochronous relief time: %d\n", data->irt);
650 dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
651
652 dprintk("numpst: 0x%x\n", psb->num_tables);
653 cpst = psb->num_tables;
654 if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){
655 thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
656 if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) {
657 cpst = 1;
658 }
659 }
660 if (cpst != 1) {
661 printk(KERN_ERR BFX "numpst must be 1\n");
662 return -ENODEV;
663 }
664
665 data->plllock = psb->plllocktime;
666 dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
667 dprintk("maxfid: 0x%x\n", psb->maxfid);
668 dprintk("maxvid: 0x%x\n", psb->maxvid);
669 maxvid = psb->maxvid;
670
671 data->numps = psb->numps;
672 dprintk("numpstates: 0x%x\n", data->numps);
673 return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid);
674 }
675 /*
676 * If you see this message, complain to BIOS manufacturer. If
677 * he tells you "we do not support Linux" or some similar
678 * nonsense, remember that Windows 2000 uses the same legacy
679 * mechanism that the old Linux PSB driver uses. Tell them it
680 * is broken with Windows 2000.
681 *
682 * The reference to the AMD documentation is chapter 9 in the
683 * BIOS and Kernel Developer's Guide, which is available on
684 * www.amd.com
685 */
065b807c 686 printk(KERN_INFO PFX "BIOS error - no PSB or ACPI _PSS objects\n");
1da177e4
LT		 687 return -ENODEV;
688}
689
690#ifdef CONFIG_X86_POWERNOW_K8_ACPI
691static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
692{
693 if (!data->acpi_data.state_count)
694 return;
695
696 data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
697 data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
841e40b3 698 data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
1da177e4
LT		 699 data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
700 data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
701 data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
702}
703
704static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
705{
706 int i;
707 int cntlofreq = 0;
708 struct cpufreq_frequency_table *powernow_table;
709
710 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
065b807c 711 dprintk("register performance failed: bad ACPI data\n");
1da177e4
LT		 712 return -EIO;
713 }
714
715 /* verify the data contained in the ACPI structures */
716 if (data->acpi_data.state_count <= 1) {
717 dprintk("No ACPI P-States\n");
718 goto err_out;
719 }
720
721 if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
722 (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
723 dprintk("Invalid control/status registers (%x - %x)\n",
724 data->acpi_data.control_register.space_id,
725 data->acpi_data.status_register.space_id);
726 goto err_out;
727 }
728
729 /* fill in data->powernow_table */
730 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
731 * (data->acpi_data.state_count + 1)), GFP_KERNEL);
732 if (!powernow_table) {
733 dprintk("powernow_table memory alloc failure\n");
734 goto err_out;
735 }
736
737 for (i = 0; i < data->acpi_data.state_count; i++) {
094ce7fd
DJ		 738 u32 fid;
739 u32 vid;
740
741 if (data->exttype) {
742 fid = data->acpi_data.states[i].status & FID_MASK;
743 vid = (data->acpi_data.states[i].status >> VID_SHIFT) & VID_MASK;
841e40b3 744 } else {
094ce7fd
DJ		 745 fid = data->acpi_data.states[i].control & FID_MASK;
746 vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
841e40b3 747 }
1da177e4
LT		 748
749 dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
750
751 powernow_table[i].index = fid; /* lower 8 bits */
752 powernow_table[i].index |= (vid << 8); /* upper 8 bits */
753 powernow_table[i].frequency = find_khz_freq_from_fid(fid);
754
755 /* verify frequency is OK */
756 if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
757 (powernow_table[i].frequency < (MIN_FREQ * 1000))) {
758 dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
759 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
760 continue;
761 }
762
763 /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
841e40b3 764 if (vid == VID_OFF) {
1da177e4
LT		 765 dprintk("invalid vid %u, ignoring\n", vid);
766 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
767 continue;
768 }
769
065b807c
DJ		 770 /* verify only 1 entry from the lo frequency table */
771 if (fid < HI_FID_TABLE_BOTTOM) {
772 if (cntlofreq) {
773 /* if both entries are the same, ignore this
774 * one...
775 */
776 if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
777 (powernow_table[i].index != powernow_table[cntlofreq].index)) {
778 printk(KERN_ERR PFX "Too many lo freq table entries\n");
779 goto err_out_mem;
780 }
781
782 dprintk("double low frequency table entry, ignoring it.\n");
783 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
784 continue;
785 } else
786 cntlofreq = i;
1da177e4
LT		 787 }
788
789 if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
790 printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
791 powernow_table[i].frequency,
792 (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
793 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
794 continue;
795 }
796 }
797
798 powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
799 powernow_table[data->acpi_data.state_count].index = 0;
800 data->powernow_table = powernow_table;
801
802 /* fill in data */
803 data->numps = data->acpi_data.state_count;
804 print_basics(data);
805 powernow_k8_acpi_pst_values(data, 0);
806
807 /* notify BIOS that we exist */
808 acpi_processor_notify_smm(THIS_MODULE);
809
810 return 0;
811
812err_out_mem:
813 kfree(powernow_table);
814
815err_out:
816 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
817
818 /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
819 data->acpi_data.state_count = 0;
820
821 return -ENODEV;
822}
823
824static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
825{
826 if (data->acpi_data.state_count)
827 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
828}
829
830#else
831static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
832static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
833static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
834#endif /* CONFIG_X86_POWERNOW_K8_ACPI */
835
836/* Take a frequency, and issue the fid/vid transition command */
837static int transition_frequency(struct powernow_k8_data *data, unsigned int index)
838{
839 u32 fid;
840 u32 vid;
065b807c 841 int res, i;
1da177e4
LT		 842 struct cpufreq_freqs freqs;
843
844 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
845
846 /* fid are the lower 8 bits of the index we stored into
847 * the cpufreq frequency table in find_psb_table, vid are
848 * the upper 8 bits.
849 */
850
851 fid = data->powernow_table[index].index & 0xFF;
852 vid = (data->powernow_table[index].index & 0xFF00) >> 8;
853
854 dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
855
856 if (query_current_values_with_pending_wait(data))
857 return 1;
858
859 if ((data->currvid == vid) && (data->currfid == fid)) {
860 dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
861 fid, vid);
862 return 0;
863 }
864
865 if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
065b807c
DJ		 866 printk(KERN_ERR PFX
867 "ignoring illegal change in lo freq table-%x to 0x%x\n",
1da177e4
LT		 868 data->currfid, fid);
869 return 1;
870 }
871
872 dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
873 smp_processor_id(), fid, vid);
874
875 freqs.cpu = data->cpu;
1da177e4
LT		 876 freqs.old = find_khz_freq_from_fid(data->currfid);
877 freqs.new = find_khz_freq_from_fid(fid);
065b807c
DJ		 878 for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
879 freqs.cpu = i;
880 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
881 }
1da177e4 882
1da177e4 883 res = transition_fid_vid(data, fid, vid);
1da177e4
LT		 884
885 freqs.new = find_khz_freq_from_fid(data->currfid);
065b807c
DJ		 886 for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
887 freqs.cpu = i;
888 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
889 }
1da177e4
LT		 890 return res;
891}
892
893/* Driver entry point to switch to the target frequency */
894static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
895{
896 cpumask_t oldmask = CPU_MASK_ALL;
897 struct powernow_k8_data *data = powernow_data[pol->cpu];
898 u32 checkfid = data->currfid;
899 u32 checkvid = data->currvid;
900 unsigned int newstate;
901 int ret = -EIO;
065b807c 902 int i;
1da177e4
LT		 903
904 /* only run on specific CPU from here on */
905 oldmask = current->cpus_allowed;
906 set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
907 schedule();
908
909 if (smp_processor_id() != pol->cpu) {
910 printk(KERN_ERR "limiting to cpu %u failed\n", pol->cpu);
911 goto err_out;
912 }
913
914 if (pending_bit_stuck()) {
915 printk(KERN_ERR PFX "failing targ, change pending bit set\n");
916 goto err_out;
917 }
918
919 dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
920 pol->cpu, targfreq, pol->min, pol->max, relation);
921
922 if (query_current_values_with_pending_wait(data)) {
923 ret = -EIO;
924 goto err_out;
925 }
926
927 dprintk("targ: curr fid 0x%x, vid 0x%x\n",
928 data->currfid, data->currvid);
929
930 if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
065b807c
DJ		 931 printk(KERN_INFO PFX
932 "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
933 checkfid, data->currfid, checkvid, data->currvid);
1da177e4
LT		 934 }
935
936 if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
937 goto err_out;
938
065b807c
DJ		 939 down(&fidvid_sem);
940
1da177e4
LT		 941 powernow_k8_acpi_pst_values(data, newstate);
942
943 if (transition_frequency(data, newstate)) {
944 printk(KERN_ERR PFX "transition frequency failed\n");
945 ret = 1;
065b807c 946 up(&fidvid_sem);
1da177e4
LT		 947 goto err_out;
948 }
949
065b807c
DJ		 950 /* Update all the fid/vids of our siblings */
951 for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
952 powernow_data[i]->currvid = data->currvid;
953 powernow_data[i]->currfid = data->currfid;
954 }
955 up(&fidvid_sem);
956
1da177e4
LT		 957 pol->cur = find_khz_freq_from_fid(data->currfid);
958 ret = 0;
959
960err_out:
961 set_cpus_allowed(current, oldmask);
962 schedule();
963
964 return ret;
965}
966
967/* Driver entry point to verify the policy and range of frequencies */
968static int powernowk8_verify(struct cpufreq_policy *pol)
969{
970 struct powernow_k8_data *data = powernow_data[pol->cpu];
971
972 return cpufreq_frequency_table_verify(pol, data->powernow_table);
973}
974
975/* per CPU init entry point to the driver */
976static int __init powernowk8_cpu_init(struct cpufreq_policy *pol)
977{
978 struct powernow_k8_data *data;
979 cpumask_t oldmask = CPU_MASK_ALL;
03938c3f 980 int rc, i;
1da177e4
LT		 981
982 if (!check_supported_cpu(pol->cpu))
983 return -ENODEV;
984
985 data = kmalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
986 if (!data) {
987 printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
988 return -ENOMEM;
989 }
990 memset(data,0,sizeof(struct powernow_k8_data));
991
992 data->cpu = pol->cpu;
993
994 if (powernow_k8_cpu_init_acpi(data)) {
995 /*
996 * Use the PSB BIOS structure. This is only availabe on
997 * an UP version, and is deprecated by AMD.
998 */
999
1000 if ((num_online_cpus() != 1) || (num_possible_cpus() != 1)) {
065b807c 1001 printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n");
1da177e4
LT		 1002 kfree(data);
1003 return -ENODEV;
1004 }
1005 if (pol->cpu != 0) {
1006 printk(KERN_ERR PFX "init not cpu 0\n");
1007 kfree(data);
1008 return -ENODEV;
1009 }
1010 rc = find_psb_table(data);
1011 if (rc) {
1012 kfree(data);
1013 return -ENODEV;
1014 }
1015 }
1016
1017 /* only run on specific CPU from here on */
1018 oldmask = current->cpus_allowed;
1019 set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
1020 schedule();
1021
1022 if (smp_processor_id() != pol->cpu) {
1023 printk(KERN_ERR "limiting to cpu %u failed\n", pol->cpu);
1024 goto err_out;
1025 }
1026
1027 if (pending_bit_stuck()) {
1028 printk(KERN_ERR PFX "failing init, change pending bit set\n");
1029 goto err_out;
1030 }
1031
1032 if (query_current_values_with_pending_wait(data))
1033 goto err_out;
1034
1035 fidvid_msr_init();
1036
1037 /* run on any CPU again */
1038 set_cpus_allowed(current, oldmask);
1039 schedule();
1040
1041 pol->governor = CPUFREQ_DEFAULT_GOVERNOR;
065b807c 1042 pol->cpus = cpu_core_map[pol->cpu];
1da177e4
LT		 1043
1044 /* Take a crude guess here.
1045 * That guess was in microseconds, so multiply with 1000 */
1046 pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
1047 + (3 * (1 << data->irt) * 10)) * 1000;
1048
1049 pol->cur = find_khz_freq_from_fid(data->currfid);
1050 dprintk("policy current frequency %d kHz\n", pol->cur);
1051
1052 /* min/max the cpu is capable of */
1053 if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
1054 printk(KERN_ERR PFX "invalid powernow_table\n");
1055 powernow_k8_cpu_exit_acpi(data);
1056 kfree(data->powernow_table);
1057 kfree(data);
1058 return -EINVAL;
1059 }
1060
1061 cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
1062
1063 printk("cpu_init done, current fid 0x%x, vid 0x%x\n",
1064 data->currfid, data->currvid);
1065
03938c3f
DJ		 1066 for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
1067 powernow_data[i] = data;
1068 }
1da177e4
LT		 1069
1070 return 0;
1071
1072err_out:
1073 set_cpus_allowed(current, oldmask);
1074 schedule();
1075 powernow_k8_cpu_exit_acpi(data);
1076
1077 kfree(data);
1078 return -ENODEV;
1079}
1080
1081static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
1082{
1083 struct powernow_k8_data *data = powernow_data[pol->cpu];
1084
1085 if (!data)
1086 return -EINVAL;
1087
1088 powernow_k8_cpu_exit_acpi(data);
1089
1090 cpufreq_frequency_table_put_attr(pol->cpu);
1091
1092 kfree(data->powernow_table);
1093 kfree(data);
1094
1095 return 0;
1096}
1097
1098static unsigned int powernowk8_get (unsigned int cpu)
1099{
1100 struct powernow_k8_data *data = powernow_data[cpu];
1101 cpumask_t oldmask = current->cpus_allowed;
1102 unsigned int khz = 0;
1103
1104 set_cpus_allowed(current, cpumask_of_cpu(cpu));
1105 if (smp_processor_id() != cpu) {
1106 printk(KERN_ERR PFX "limiting to CPU %d failed in powernowk8_get\n", cpu);
1107 set_cpus_allowed(current, oldmask);
1108 return 0;
1109 }
1110 preempt_disable();
065b807c 1111
1da177e4
LT		 1112 if (query_current_values_with_pending_wait(data))
1113 goto out;
1114
1115 khz = find_khz_freq_from_fid(data->currfid);
1116
1117 out:
1118 preempt_enable_no_resched();
1119 set_cpus_allowed(current, oldmask);
1120
1121 return khz;
1122}
1123
1124static struct freq_attr* powernow_k8_attr[] = {
1125 &cpufreq_freq_attr_scaling_available_freqs,
1126 NULL,
1127};
1128
1129static struct cpufreq_driver cpufreq_amd64_driver = {
1130 .verify = powernowk8_verify,
1131 .target = powernowk8_target,
1132 .init = powernowk8_cpu_init,
1133 .exit = __devexit_p(powernowk8_cpu_exit),
1134 .get = powernowk8_get,
1135 .name = "powernow-k8",
1136 .owner = THIS_MODULE,
1137 .attr = powernow_k8_attr,
1138};
1139
1140/* driver entry point for init */
1141static int __init powernowk8_init(void)
1142{
1143 unsigned int i, supported_cpus = 0;
1144
1145 for (i=0; i<NR_CPUS; i++) {
1146 if (!cpu_online(i))
1147 continue;
1148 if (check_supported_cpu(i))
1149 supported_cpus++;
1150 }
1151
1152 if (supported_cpus == num_online_cpus()) {
1153 printk(KERN_INFO PFX "Found %d AMD Athlon 64 / Opteron processors (" VERSION ")\n",
1154 supported_cpus);
1155 return cpufreq_register_driver(&cpufreq_amd64_driver);
1156 }
1157
1158 return -ENODEV;
1159}
1160
1161/* driver entry point for term */
1162static void __exit powernowk8_exit(void)
1163{
1164 dprintk("exit\n");
1165
1166 cpufreq_unregister_driver(&cpufreq_amd64_driver);
1167}
1168
065b807c 1169MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com.");
1da177e4
LT		 1170MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1171MODULE_LICENSE("GPL");
1172
1173late_initcall(powernowk8_init);
1174module_exit(powernowk8_exit);
065b807c 1175
Linux kernel - Deliverables
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