Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * (C) 2001 Dave Jones, Arjan van de ven. | |
3 | * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> | |
4 | * | |
5 | * Licensed under the terms of the GNU GPL License version 2. | |
6 | * Based upon reverse engineered information, and on Intel documentation | |
7 | * for chipsets ICH2-M and ICH3-M. | |
8 | * | |
9 | * Many thanks to Ducrot Bruno for finding and fixing the last | |
10 | * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler | |
11 | * for extensive testing. | |
12 | * | |
13 | * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* | |
14 | */ | |
15 | ||
16 | ||
17 | /********************************************************************* | |
18 | * SPEEDSTEP - DEFINITIONS * | |
19 | *********************************************************************/ | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/cpufreq.h> | |
25 | #include <linux/pci.h> | |
26 | #include <linux/slab.h> | |
27 | ||
28 | #include "speedstep-lib.h" | |
29 | ||
30 | ||
31 | /* speedstep_chipset: | |
32 | * It is necessary to know which chipset is used. As accesses to | |
33 | * this device occur at various places in this module, we need a | |
34 | * static struct pci_dev * pointing to that device. | |
35 | */ | |
36 | static struct pci_dev *speedstep_chipset_dev; | |
37 | ||
38 | ||
39 | /* speedstep_processor | |
40 | */ | |
41 | static unsigned int speedstep_processor = 0; | |
42 | ||
9a7d82a8 | 43 | static u32 pmbase; |
1da177e4 LT |
44 | |
45 | /* | |
46 | * There are only two frequency states for each processor. Values | |
47 | * are in kHz for the time being. | |
48 | */ | |
49 | static struct cpufreq_frequency_table speedstep_freqs[] = { | |
50 | {SPEEDSTEP_HIGH, 0}, | |
51 | {SPEEDSTEP_LOW, 0}, | |
52 | {0, CPUFREQ_TABLE_END}, | |
53 | }; | |
54 | ||
55 | ||
56 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-ich", msg) | |
57 | ||
58 | ||
59 | /** | |
9a7d82a8 | 60 | * speedstep_find_register - read the PMBASE address |
1da177e4 | 61 | * |
9a7d82a8 | 62 | * Returns: -ENODEV if no register could be found |
1da177e4 | 63 | */ |
9a7d82a8 | 64 | static int speedstep_find_register (void) |
1da177e4 | 65 | { |
9a7d82a8 MD |
66 | if (!speedstep_chipset_dev) |
67 | return -ENODEV; | |
1da177e4 LT |
68 | |
69 | /* get PMBASE */ | |
70 | pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase); | |
71 | if (!(pmbase & 0x01)) { | |
72 | printk(KERN_ERR "speedstep-ich: could not find speedstep register\n"); | |
9a7d82a8 | 73 | return -ENODEV; |
1da177e4 LT |
74 | } |
75 | ||
76 | pmbase &= 0xFFFFFFFE; | |
77 | if (!pmbase) { | |
78 | printk(KERN_ERR "speedstep-ich: could not find speedstep register\n"); | |
9a7d82a8 | 79 | return -ENODEV; |
1da177e4 LT |
80 | } |
81 | ||
9a7d82a8 MD |
82 | dprintk("pmbase is 0x%x\n", pmbase); |
83 | return 0; | |
84 | } | |
85 | ||
86 | /** | |
87 | * speedstep_set_state - set the SpeedStep state | |
88 | * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH) | |
89 | * | |
90 | * Tries to change the SpeedStep state. | |
91 | */ | |
92 | static void speedstep_set_state (unsigned int state) | |
93 | { | |
94 | u8 pm2_blk; | |
95 | u8 value; | |
96 | unsigned long flags; | |
97 | ||
98 | if (state > 0x1) | |
99 | return; | |
100 | ||
1da177e4 LT |
101 | /* Disable IRQs */ |
102 | local_irq_save(flags); | |
103 | ||
104 | /* read state */ | |
105 | value = inb(pmbase + 0x50); | |
106 | ||
107 | dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); | |
108 | ||
109 | /* write new state */ | |
110 | value &= 0xFE; | |
111 | value |= state; | |
112 | ||
113 | dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase); | |
114 | ||
115 | /* Disable bus master arbitration */ | |
116 | pm2_blk = inb(pmbase + 0x20); | |
117 | pm2_blk |= 0x01; | |
118 | outb(pm2_blk, (pmbase + 0x20)); | |
119 | ||
120 | /* Actual transition */ | |
121 | outb(value, (pmbase + 0x50)); | |
122 | ||
123 | /* Restore bus master arbitration */ | |
124 | pm2_blk &= 0xfe; | |
125 | outb(pm2_blk, (pmbase + 0x20)); | |
126 | ||
127 | /* check if transition was successful */ | |
128 | value = inb(pmbase + 0x50); | |
129 | ||
130 | /* Enable IRQs */ | |
131 | local_irq_restore(flags); | |
132 | ||
133 | dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value); | |
134 | ||
135 | if (state == (value & 0x1)) { | |
136 | dprintk("change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000)); | |
137 | } else { | |
138 | printk (KERN_ERR "cpufreq: change failed - I/O error\n"); | |
139 | } | |
140 | ||
141 | return; | |
142 | } | |
143 | ||
144 | ||
145 | /** | |
146 | * speedstep_activate - activate SpeedStep control in the chipset | |
147 | * | |
148 | * Tries to activate the SpeedStep status and control registers. | |
149 | * Returns -EINVAL on an unsupported chipset, and zero on success. | |
150 | */ | |
151 | static int speedstep_activate (void) | |
152 | { | |
153 | u16 value = 0; | |
154 | ||
155 | if (!speedstep_chipset_dev) | |
156 | return -EINVAL; | |
157 | ||
158 | pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value); | |
159 | if (!(value & 0x08)) { | |
160 | value |= 0x08; | |
161 | dprintk("activating SpeedStep (TM) registers\n"); | |
162 | pci_write_config_word(speedstep_chipset_dev, 0x00A0, value); | |
163 | } | |
164 | ||
165 | return 0; | |
166 | } | |
167 | ||
168 | ||
169 | /** | |
170 | * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic | |
171 | * | |
172 | * Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to | |
173 | * the LPC bridge / PM module which contains all power-management | |
174 | * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected | |
175 | * chipset, or zero on failure. | |
176 | */ | |
177 | static unsigned int speedstep_detect_chipset (void) | |
178 | { | |
179 | speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL, | |
180 | PCI_DEVICE_ID_INTEL_82801DB_12, | |
181 | PCI_ANY_ID, | |
182 | PCI_ANY_ID, | |
183 | NULL); | |
184 | if (speedstep_chipset_dev) | |
185 | return 4; /* 4-M */ | |
186 | ||
187 | speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL, | |
188 | PCI_DEVICE_ID_INTEL_82801CA_12, | |
189 | PCI_ANY_ID, | |
190 | PCI_ANY_ID, | |
191 | NULL); | |
192 | if (speedstep_chipset_dev) | |
193 | return 3; /* 3-M */ | |
194 | ||
195 | ||
196 | speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL, | |
197 | PCI_DEVICE_ID_INTEL_82801BA_10, | |
198 | PCI_ANY_ID, | |
199 | PCI_ANY_ID, | |
200 | NULL); | |
201 | if (speedstep_chipset_dev) { | |
202 | /* speedstep.c causes lockups on Dell Inspirons 8000 and | |
203 | * 8100 which use a pretty old revision of the 82815 | |
204 | * host brige. Abort on these systems. | |
205 | */ | |
206 | static struct pci_dev *hostbridge; | |
207 | u8 rev = 0; | |
208 | ||
209 | hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL, | |
210 | PCI_DEVICE_ID_INTEL_82815_MC, | |
211 | PCI_ANY_ID, | |
212 | PCI_ANY_ID, | |
213 | NULL); | |
214 | ||
215 | if (!hostbridge) | |
216 | return 2; /* 2-M */ | |
217 | ||
218 | pci_read_config_byte(hostbridge, PCI_REVISION_ID, &rev); | |
219 | if (rev < 5) { | |
220 | dprintk("hostbridge does not support speedstep\n"); | |
221 | speedstep_chipset_dev = NULL; | |
222 | pci_dev_put(hostbridge); | |
223 | return 0; | |
224 | } | |
225 | ||
226 | pci_dev_put(hostbridge); | |
227 | return 2; /* 2-M */ | |
228 | } | |
229 | ||
230 | return 0; | |
231 | } | |
232 | ||
233 | static unsigned int _speedstep_get(cpumask_t cpus) | |
234 | { | |
235 | unsigned int speed; | |
236 | cpumask_t cpus_allowed; | |
237 | ||
238 | cpus_allowed = current->cpus_allowed; | |
239 | set_cpus_allowed(current, cpus); | |
240 | speed = speedstep_get_processor_frequency(speedstep_processor); | |
241 | set_cpus_allowed(current, cpus_allowed); | |
242 | dprintk("detected %u kHz as current frequency\n", speed); | |
243 | return speed; | |
244 | } | |
245 | ||
246 | static unsigned int speedstep_get(unsigned int cpu) | |
247 | { | |
248 | return _speedstep_get(cpumask_of_cpu(cpu)); | |
249 | } | |
250 | ||
251 | /** | |
252 | * speedstep_target - set a new CPUFreq policy | |
253 | * @policy: new policy | |
254 | * @target_freq: the target frequency | |
255 | * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H) | |
256 | * | |
257 | * Sets a new CPUFreq policy. | |
258 | */ | |
259 | static int speedstep_target (struct cpufreq_policy *policy, | |
260 | unsigned int target_freq, | |
261 | unsigned int relation) | |
262 | { | |
263 | unsigned int newstate = 0; | |
264 | struct cpufreq_freqs freqs; | |
265 | cpumask_t cpus_allowed; | |
266 | int i; | |
267 | ||
268 | if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate)) | |
269 | return -EINVAL; | |
270 | ||
271 | freqs.old = _speedstep_get(policy->cpus); | |
272 | freqs.new = speedstep_freqs[newstate].frequency; | |
273 | freqs.cpu = policy->cpu; | |
274 | ||
275 | dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new); | |
276 | ||
277 | /* no transition necessary */ | |
278 | if (freqs.old == freqs.new) | |
279 | return 0; | |
280 | ||
281 | cpus_allowed = current->cpus_allowed; | |
282 | ||
283 | for_each_cpu_mask(i, policy->cpus) { | |
284 | freqs.cpu = i; | |
285 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
286 | } | |
287 | ||
288 | /* switch to physical CPU where state is to be changed */ | |
289 | set_cpus_allowed(current, policy->cpus); | |
290 | ||
291 | speedstep_set_state(newstate); | |
292 | ||
293 | /* allow to be run on all CPUs */ | |
294 | set_cpus_allowed(current, cpus_allowed); | |
295 | ||
296 | for_each_cpu_mask(i, policy->cpus) { | |
297 | freqs.cpu = i; | |
298 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
299 | } | |
300 | ||
301 | return 0; | |
302 | } | |
303 | ||
304 | ||
305 | /** | |
306 | * speedstep_verify - verifies a new CPUFreq policy | |
307 | * @policy: new policy | |
308 | * | |
309 | * Limit must be within speedstep_low_freq and speedstep_high_freq, with | |
310 | * at least one border included. | |
311 | */ | |
312 | static int speedstep_verify (struct cpufreq_policy *policy) | |
313 | { | |
314 | return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]); | |
315 | } | |
316 | ||
317 | ||
318 | static int speedstep_cpu_init(struct cpufreq_policy *policy) | |
319 | { | |
320 | int result = 0; | |
321 | unsigned int speed; | |
322 | cpumask_t cpus_allowed; | |
323 | ||
324 | /* only run on CPU to be set, or on its sibling */ | |
325 | #ifdef CONFIG_SMP | |
326 | policy->cpus = cpu_sibling_map[policy->cpu]; | |
327 | #endif | |
328 | ||
329 | cpus_allowed = current->cpus_allowed; | |
330 | set_cpus_allowed(current, policy->cpus); | |
331 | ||
1a10760c | 332 | /* detect low and high frequency and transition latency */ |
1da177e4 LT |
333 | result = speedstep_get_freqs(speedstep_processor, |
334 | &speedstep_freqs[SPEEDSTEP_LOW].frequency, | |
335 | &speedstep_freqs[SPEEDSTEP_HIGH].frequency, | |
1a10760c | 336 | &policy->cpuinfo.transition_latency, |
1da177e4 LT |
337 | &speedstep_set_state); |
338 | set_cpus_allowed(current, cpus_allowed); | |
339 | if (result) | |
340 | return result; | |
341 | ||
342 | /* get current speed setting */ | |
343 | speed = _speedstep_get(policy->cpus); | |
344 | if (!speed) | |
345 | return -EIO; | |
346 | ||
347 | dprintk("currently at %s speed setting - %i MHz\n", | |
348 | (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high", | |
349 | (speed / 1000)); | |
350 | ||
351 | /* cpuinfo and default policy values */ | |
352 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | |
1da177e4 LT |
353 | policy->cur = speed; |
354 | ||
355 | result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs); | |
356 | if (result) | |
357 | return (result); | |
358 | ||
359 | cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu); | |
360 | ||
361 | return 0; | |
362 | } | |
363 | ||
364 | ||
365 | static int speedstep_cpu_exit(struct cpufreq_policy *policy) | |
366 | { | |
367 | cpufreq_frequency_table_put_attr(policy->cpu); | |
368 | return 0; | |
369 | } | |
370 | ||
371 | static struct freq_attr* speedstep_attr[] = { | |
372 | &cpufreq_freq_attr_scaling_available_freqs, | |
373 | NULL, | |
374 | }; | |
375 | ||
376 | ||
221dee28 | 377 | static struct cpufreq_driver speedstep_driver = { |
1da177e4 LT |
378 | .name = "speedstep-ich", |
379 | .verify = speedstep_verify, | |
380 | .target = speedstep_target, | |
381 | .init = speedstep_cpu_init, | |
382 | .exit = speedstep_cpu_exit, | |
383 | .get = speedstep_get, | |
384 | .owner = THIS_MODULE, | |
385 | .attr = speedstep_attr, | |
386 | }; | |
387 | ||
388 | ||
389 | /** | |
390 | * speedstep_init - initializes the SpeedStep CPUFreq driver | |
391 | * | |
392 | * Initializes the SpeedStep support. Returns -ENODEV on unsupported | |
393 | * devices, -EINVAL on problems during initiatization, and zero on | |
394 | * success. | |
395 | */ | |
396 | static int __init speedstep_init(void) | |
397 | { | |
398 | /* detect processor */ | |
399 | speedstep_processor = speedstep_detect_processor(); | |
400 | if (!speedstep_processor) { | |
401 | dprintk("Intel(R) SpeedStep(TM) capable processor not found\n"); | |
402 | return -ENODEV; | |
403 | } | |
404 | ||
405 | /* detect chipset */ | |
406 | if (!speedstep_detect_chipset()) { | |
407 | dprintk("Intel(R) SpeedStep(TM) for this chipset not (yet) available.\n"); | |
408 | return -ENODEV; | |
409 | } | |
410 | ||
411 | /* activate speedstep support */ | |
412 | if (speedstep_activate()) { | |
413 | pci_dev_put(speedstep_chipset_dev); | |
414 | return -EINVAL; | |
415 | } | |
416 | ||
9a7d82a8 MD |
417 | if (speedstep_find_register()) |
418 | return -ENODEV; | |
419 | ||
1da177e4 LT |
420 | return cpufreq_register_driver(&speedstep_driver); |
421 | } | |
422 | ||
423 | ||
424 | /** | |
425 | * speedstep_exit - unregisters SpeedStep support | |
426 | * | |
427 | * Unregisters SpeedStep support. | |
428 | */ | |
429 | static void __exit speedstep_exit(void) | |
430 | { | |
431 | pci_dev_put(speedstep_chipset_dev); | |
432 | cpufreq_unregister_driver(&speedstep_driver); | |
433 | } | |
434 | ||
435 | ||
436 | MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>, Dominik Brodowski <linux@brodo.de>"); | |
437 | MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges."); | |
438 | MODULE_LICENSE ("GPL"); | |
439 | ||
440 | module_init(speedstep_init); | |
441 | module_exit(speedstep_exit); |