[PATCH] i386: Update __copy_to_user_inatomic linuxdoc description
[deliverable/linux.git] / arch / i386 / kernel / reboot.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/i386/kernel/reboot.c
3 */
4
5#include <linux/mm.h>
6#include <linux/module.h>
7#include <linux/delay.h>
8#include <linux/init.h>
9#include <linux/interrupt.h>
10#include <linux/mc146818rtc.h>
11#include <linux/efi.h>
12#include <linux/dmi.h>
6f673d83 13#include <linux/ctype.h>
6e3fbee5 14#include <linux/pm.h>
cd6ed525 15#include <linux/reboot.h>
1da177e4
LT
16#include <asm/uaccess.h>
17#include <asm/apic.h>
4d37e7e3 18#include <asm/desc.h>
1da177e4 19#include "mach_reboot.h"
a2f7c354 20#include <linux/reboot_fixups.h>
1da177e4
LT
21
22/*
23 * Power off function, if any
24 */
25void (*pm_power_off)(void);
129f6946 26EXPORT_SYMBOL(pm_power_off);
1da177e4
LT
27
28static int reboot_mode;
29static int reboot_thru_bios;
30
31#ifdef CONFIG_SMP
1da177e4 32static int reboot_cpu = -1;
1da177e4
LT
33#endif
34static int __init reboot_setup(char *str)
35{
36 while(1) {
37 switch (*str) {
38 case 'w': /* "warm" reboot (no memory testing etc) */
39 reboot_mode = 0x1234;
40 break;
41 case 'c': /* "cold" reboot (with memory testing etc) */
42 reboot_mode = 0x0;
43 break;
44 case 'b': /* "bios" reboot by jumping through the BIOS */
45 reboot_thru_bios = 1;
46 break;
47 case 'h': /* "hard" reboot by toggling RESET and/or crashing the CPU */
48 reboot_thru_bios = 0;
49 break;
50#ifdef CONFIG_SMP
51 case 's': /* "smp" reboot by executing reset on BSP or other CPU*/
6f673d83 52 if (isdigit(*(str+1))) {
1da177e4 53 reboot_cpu = (int) (*(str+1) - '0');
6f673d83 54 if (isdigit(*(str+2)))
1da177e4
LT
55 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
56 }
57 /* we will leave sorting out the final value
58 when we are ready to reboot, since we might not
59 have set up boot_cpu_id or smp_num_cpu */
60 break;
61#endif
62 }
63 if((str = strchr(str,',')) != NULL)
64 str++;
65 else
66 break;
67 }
68 return 1;
69}
70
71__setup("reboot=", reboot_setup);
72
73/*
74 * Reboot options and system auto-detection code provided by
75 * Dell Inc. so their systems "just work". :-)
76 */
77
78/*
79 * Some machines require the "reboot=b" commandline option, this quirk makes that automatic.
80 */
81static int __init set_bios_reboot(struct dmi_system_id *d)
82{
83 if (!reboot_thru_bios) {
84 reboot_thru_bios = 1;
85 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
86 }
87 return 0;
88}
89
1da177e4
LT
90static struct dmi_system_id __initdata reboot_dmi_table[] = {
91 { /* Handle problems with rebooting on Dell 1300's */
dd2a1305 92 .callback = set_bios_reboot,
1da177e4
LT
93 .ident = "Dell PowerEdge 1300",
94 .matches = {
95 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
96 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
97 },
98 },
99 { /* Handle problems with rebooting on Dell 300's */
100 .callback = set_bios_reboot,
101 .ident = "Dell PowerEdge 300",
102 .matches = {
103 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
104 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
105 },
106 },
107 { /* Handle problems with rebooting on Dell 2400's */
108 .callback = set_bios_reboot,
109 .ident = "Dell PowerEdge 2400",
110 .matches = {
111 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
112 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
113 },
114 },
766c3f94 115 { /* Handle problems with rebooting on HP laptops */
d91b14c4 116 .callback = set_bios_reboot,
766c3f94 117 .ident = "HP Compaq Laptop",
d91b14c4
TV
118 .matches = {
119 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
766c3f94 120 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
d91b14c4
TV
121 },
122 },
1da177e4
LT
123 { }
124};
125
126static int __init reboot_init(void)
127{
128 dmi_check_system(reboot_dmi_table);
129 return 0;
130}
131
132core_initcall(reboot_init);
133
134/* The following code and data reboots the machine by switching to real
135 mode and jumping to the BIOS reset entry point, as if the CPU has
136 really been reset. The previous version asked the keyboard
137 controller to pulse the CPU reset line, which is more thorough, but
138 doesn't work with at least one type of 486 motherboard. It is easy
139 to stop this code working; hence the copious comments. */
140
141static unsigned long long
142real_mode_gdt_entries [3] =
143{
144 0x0000000000000000ULL, /* Null descriptor */
145 0x00009a000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
146 0x000092000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
147};
148
05f4a3ec
RR
149static struct Xgt_desc_struct
150real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
151real_mode_idt = { 0x3ff, 0 },
152no_idt = { 0, 0 };
1da177e4
LT
153
154
155/* This is 16-bit protected mode code to disable paging and the cache,
156 switch to real mode and jump to the BIOS reset code.
157
158 The instruction that switches to real mode by writing to CR0 must be
159 followed immediately by a far jump instruction, which set CS to a
160 valid value for real mode, and flushes the prefetch queue to avoid
161 running instructions that have already been decoded in protected
162 mode.
163
164 Clears all the flags except ET, especially PG (paging), PE
165 (protected-mode enable) and TS (task switch for coprocessor state
166 save). Flushes the TLB after paging has been disabled. Sets CD and
167 NW, to disable the cache on a 486, and invalidates the cache. This
168 is more like the state of a 486 after reset. I don't know if
169 something else should be done for other chips.
170
171 More could be done here to set up the registers as if a CPU reset had
172 occurred; hopefully real BIOSs don't assume much. */
173
174static unsigned char real_mode_switch [] =
175{
176 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
177 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
178 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
179 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
180 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
181 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
182 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
183 0x74, 0x02, /* jz f */
184 0x0f, 0x09, /* wbinvd */
185 0x24, 0x10, /* f: andb $0x10,al */
186 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
187};
188static unsigned char jump_to_bios [] =
189{
190 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
191};
192
193/*
194 * Switch to real mode and then execute the code
195 * specified by the code and length parameters.
196 * We assume that length will aways be less that 100!
197 */
198void machine_real_restart(unsigned char *code, int length)
199{
200 unsigned long flags;
201
202 local_irq_disable();
203
204 /* Write zero to CMOS register number 0x0f, which the BIOS POST
205 routine will recognize as telling it to do a proper reboot. (Well
206 that's what this book in front of me says -- it may only apply to
207 the Phoenix BIOS though, it's not clear). At the same time,
208 disable NMIs by setting the top bit in the CMOS address register,
209 as we're about to do peculiar things to the CPU. I'm not sure if
210 `outb_p' is needed instead of just `outb'. Use it to be on the
211 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.)
212 */
213
214 spin_lock_irqsave(&rtc_lock, flags);
215 CMOS_WRITE(0x00, 0x8f);
216 spin_unlock_irqrestore(&rtc_lock, flags);
217
218 /* Remap the kernel at virtual address zero, as well as offset zero
219 from the kernel segment. This assumes the kernel segment starts at
220 virtual address PAGE_OFFSET. */
221
222 memcpy (swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
223 sizeof (swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
224
225 /*
226 * Use `swapper_pg_dir' as our page directory.
227 */
228 load_cr3(swapper_pg_dir);
229
230 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads
231 this on booting to tell it to "Bypass memory test (also warm
232 boot)". This seems like a fairly standard thing that gets set by
233 REBOOT.COM programs, and the previous reset routine did this
234 too. */
235
236 *((unsigned short *)0x472) = reboot_mode;
237
238 /* For the switch to real mode, copy some code to low memory. It has
239 to be in the first 64k because it is running in 16-bit mode, and it
240 has to have the same physical and virtual address, because it turns
241 off paging. Copy it near the end of the first page, out of the way
242 of BIOS variables. */
243
244 memcpy ((void *) (0x1000 - sizeof (real_mode_switch) - 100),
245 real_mode_switch, sizeof (real_mode_switch));
246 memcpy ((void *) (0x1000 - 100), code, length);
247
248 /* Set up the IDT for real mode. */
249
4d37e7e3 250 load_idt(&real_mode_idt);
1da177e4
LT
251
252 /* Set up a GDT from which we can load segment descriptors for real
253 mode. The GDT is not used in real mode; it is just needed here to
254 prepare the descriptors. */
255
4d37e7e3 256 load_gdt(&real_mode_gdt);
1da177e4
LT
257
258 /* Load the data segment registers, and thus the descriptors ready for
259 real mode. The base address of each segment is 0x100, 16 times the
260 selector value being loaded here. This is so that the segment
261 registers don't have to be reloaded after switching to real mode:
262 the values are consistent for real mode operation already. */
263
264 __asm__ __volatile__ ("movl $0x0010,%%eax\n"
265 "\tmovl %%eax,%%ds\n"
266 "\tmovl %%eax,%%es\n"
267 "\tmovl %%eax,%%fs\n"
268 "\tmovl %%eax,%%gs\n"
269 "\tmovl %%eax,%%ss" : : : "eax");
270
271 /* Jump to the 16-bit code that we copied earlier. It disables paging
272 and the cache, switches to real mode, and jumps to the BIOS reset
273 entry point. */
274
275 __asm__ __volatile__ ("ljmp $0x0008,%0"
276 :
277 : "i" ((void *) (0x1000 - sizeof (real_mode_switch) - 100)));
278}
129f6946
AD
279#ifdef CONFIG_APM_MODULE
280EXPORT_SYMBOL(machine_real_restart);
281#endif
1da177e4 282
dd2a1305 283void machine_shutdown(void)
1da177e4
LT
284{
285#ifdef CONFIG_SMP
dd2a1305
EB
286 int reboot_cpu_id;
287
288 /* The boot cpu is always logical cpu 0 */
289 reboot_cpu_id = 0;
290
291 /* See if there has been given a command line override */
d8e392e7 292 if ((reboot_cpu != -1) && (reboot_cpu < NR_CPUS) &&
dd2a1305
EB
293 cpu_isset(reboot_cpu, cpu_online_map)) {
294 reboot_cpu_id = reboot_cpu;
1da177e4
LT
295 }
296
dd2a1305
EB
297 /* Make certain the cpu I'm rebooting on is online */
298 if (!cpu_isset(reboot_cpu_id, cpu_online_map)) {
299 reboot_cpu_id = smp_processor_id();
1da177e4 300 }
dd2a1305
EB
301
302 /* Make certain I only run on the appropriate processor */
303 set_cpus_allowed(current, cpumask_of_cpu(reboot_cpu_id));
304
305 /* O.K. Now that I'm on the appropriate processor, stop
306 * all of the others, and disable their local APICs.
1da177e4 307 */
dd2a1305 308
1da177e4
LT
309 smp_send_stop();
310#endif /* CONFIG_SMP */
311
312 lapic_shutdown();
313
314#ifdef CONFIG_X86_IO_APIC
315 disable_IO_APIC();
316#endif
dd2a1305
EB
317}
318
4a1421f8 319void machine_emergency_restart(void)
dd2a1305 320{
1da177e4
LT
321 if (!reboot_thru_bios) {
322 if (efi_enabled) {
323 efi.reset_system(EFI_RESET_COLD, EFI_SUCCESS, 0, NULL);
4d37e7e3 324 load_idt(&no_idt);
1da177e4
LT
325 __asm__ __volatile__("int3");
326 }
327 /* rebooting needs to touch the page at absolute addr 0 */
328 *((unsigned short *)__va(0x472)) = reboot_mode;
329 for (;;) {
a2f7c354 330 mach_reboot_fixups(); /* for board specific fixups */
1da177e4
LT
331 mach_reboot();
332 /* That didn't work - force a triple fault.. */
4d37e7e3 333 load_idt(&no_idt);
1da177e4
LT
334 __asm__ __volatile__("int3");
335 }
336 }
337 if (efi_enabled)
338 efi.reset_system(EFI_RESET_WARM, EFI_SUCCESS, 0, NULL);
339
340 machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
341}
342
4a1421f8
EB
343void machine_restart(char * __unused)
344{
345 machine_shutdown();
346 machine_emergency_restart();
347}
348
1da177e4
LT
349void machine_halt(void)
350{
351}
352
1da177e4
LT
353void machine_power_off(void)
354{
6e3fbee5
EB
355 if (pm_power_off) {
356 machine_shutdown();
1da177e4 357 pm_power_off();
6e3fbee5 358 }
1da177e4
LT
359}
360
1da177e4 361
This page took 0.252316 seconds and 5 git commands to generate.