Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/i386/kernel/time.c | |
3 | * | |
4 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds | |
5 | * | |
6 | * This file contains the PC-specific time handling details: | |
7 | * reading the RTC at bootup, etc.. | |
8 | * 1994-07-02 Alan Modra | |
9 | * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime | |
10 | * 1995-03-26 Markus Kuhn | |
11 | * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887 | |
12 | * precision CMOS clock update | |
13 | * 1996-05-03 Ingo Molnar | |
14 | * fixed time warps in do_[slow|fast]_gettimeoffset() | |
15 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 | |
16 | * "A Kernel Model for Precision Timekeeping" by Dave Mills | |
17 | * 1998-09-05 (Various) | |
18 | * More robust do_fast_gettimeoffset() algorithm implemented | |
19 | * (works with APM, Cyrix 6x86MX and Centaur C6), | |
20 | * monotonic gettimeofday() with fast_get_timeoffset(), | |
21 | * drift-proof precision TSC calibration on boot | |
22 | * (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D. | |
23 | * Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>; | |
24 | * ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>). | |
25 | * 1998-12-16 Andrea Arcangeli | |
26 | * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy | |
27 | * because was not accounting lost_ticks. | |
28 | * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli | |
29 | * Fixed a xtime SMP race (we need the xtime_lock rw spinlock to | |
30 | * serialize accesses to xtime/lost_ticks). | |
31 | */ | |
32 | ||
33 | #include <linux/errno.h> | |
34 | #include <linux/sched.h> | |
35 | #include <linux/kernel.h> | |
36 | #include <linux/param.h> | |
37 | #include <linux/string.h> | |
38 | #include <linux/mm.h> | |
39 | #include <linux/interrupt.h> | |
40 | #include <linux/time.h> | |
41 | #include <linux/delay.h> | |
42 | #include <linux/init.h> | |
43 | #include <linux/smp.h> | |
44 | #include <linux/module.h> | |
45 | #include <linux/sysdev.h> | |
46 | #include <linux/bcd.h> | |
47 | #include <linux/efi.h> | |
48 | #include <linux/mca.h> | |
49 | ||
50 | #include <asm/io.h> | |
51 | #include <asm/smp.h> | |
52 | #include <asm/irq.h> | |
53 | #include <asm/msr.h> | |
54 | #include <asm/delay.h> | |
55 | #include <asm/mpspec.h> | |
56 | #include <asm/uaccess.h> | |
57 | #include <asm/processor.h> | |
58 | #include <asm/timer.h> | |
d3561b7f | 59 | #include <asm/time.h> |
1da177e4 LT |
60 | |
61 | #include "mach_time.h" | |
62 | ||
63 | #include <linux/timex.h> | |
1da177e4 LT |
64 | |
65 | #include <asm/hpet.h> | |
66 | ||
67 | #include <asm/arch_hooks.h> | |
68 | ||
69 | #include "io_ports.h" | |
70 | ||
306e440d IM |
71 | #include <asm/i8259.h> |
72 | ||
1da177e4 LT |
73 | int pit_latch_buggy; /* extern */ |
74 | ||
75 | #include "do_timer.h" | |
76 | ||
a3a255e7 | 77 | unsigned int cpu_khz; /* Detected as we calibrate the TSC */ |
129f6946 | 78 | EXPORT_SYMBOL(cpu_khz); |
1da177e4 | 79 | |
1da177e4 | 80 | DEFINE_SPINLOCK(rtc_lock); |
129f6946 | 81 | EXPORT_SYMBOL(rtc_lock); |
1da177e4 | 82 | |
1da177e4 LT |
83 | /* |
84 | * This is a special lock that is owned by the CPU and holds the index | |
85 | * register we are working with. It is required for NMI access to the | |
86 | * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details. | |
87 | */ | |
88 | volatile unsigned long cmos_lock = 0; | |
89 | EXPORT_SYMBOL(cmos_lock); | |
90 | ||
91 | /* Routines for accessing the CMOS RAM/RTC. */ | |
92 | unsigned char rtc_cmos_read(unsigned char addr) | |
93 | { | |
94 | unsigned char val; | |
95 | lock_cmos_prefix(addr); | |
96 | outb_p(addr, RTC_PORT(0)); | |
97 | val = inb_p(RTC_PORT(1)); | |
98 | lock_cmos_suffix(addr); | |
99 | return val; | |
100 | } | |
101 | EXPORT_SYMBOL(rtc_cmos_read); | |
102 | ||
103 | void rtc_cmos_write(unsigned char val, unsigned char addr) | |
104 | { | |
105 | lock_cmos_prefix(addr); | |
106 | outb_p(addr, RTC_PORT(0)); | |
107 | outb_p(val, RTC_PORT(1)); | |
108 | lock_cmos_suffix(addr); | |
109 | } | |
110 | EXPORT_SYMBOL(rtc_cmos_write); | |
111 | ||
1da177e4 LT |
112 | static int set_rtc_mmss(unsigned long nowtime) |
113 | { | |
114 | int retval; | |
6f84fa2f | 115 | unsigned long flags; |
1da177e4 LT |
116 | |
117 | /* gets recalled with irq locally disabled */ | |
6f84fa2f | 118 | /* XXX - does irqsave resolve this? -johnstul */ |
119 | spin_lock_irqsave(&rtc_lock, flags); | |
d3561b7f | 120 | retval = set_wallclock(nowtime); |
6f84fa2f | 121 | spin_unlock_irqrestore(&rtc_lock, flags); |
1da177e4 LT |
122 | |
123 | return retval; | |
124 | } | |
125 | ||
126 | ||
127 | int timer_ack; | |
128 | ||
1da177e4 LT |
129 | unsigned long profile_pc(struct pt_regs *regs) |
130 | { | |
131 | unsigned long pc = instruction_pointer(regs); | |
132 | ||
0cb91a22 | 133 | #ifdef CONFIG_SMP |
7b355202 ZA |
134 | if (!v8086_mode(regs) && SEGMENT_IS_KERNEL_CODE(regs->xcs) && |
135 | in_lock_functions(pc)) { | |
0cb91a22 | 136 | #ifdef CONFIG_FRAME_POINTER |
1da177e4 | 137 | return *(unsigned long *)(regs->ebp + 4); |
0cb91a22 | 138 | #else |
7b355202 ZA |
139 | unsigned long *sp = (unsigned long *)®s->esp; |
140 | ||
0cb91a22 AK |
141 | /* Return address is either directly at stack pointer |
142 | or above a saved eflags. Eflags has bits 22-31 zero, | |
143 | kernel addresses don't. */ | |
144 | if (sp[0] >> 22) | |
145 | return sp[0]; | |
146 | if (sp[1] >> 22) | |
147 | return sp[1]; | |
148 | #endif | |
149 | } | |
150 | #endif | |
1da177e4 LT |
151 | return pc; |
152 | } | |
153 | EXPORT_SYMBOL(profile_pc); | |
1da177e4 LT |
154 | |
155 | /* | |
6f84fa2f | 156 | * This is the same as the above, except we _also_ save the current |
157 | * Time Stamp Counter value at the time of the timer interrupt, so that | |
158 | * we later on can estimate the time of day more exactly. | |
1da177e4 | 159 | */ |
7d12e780 | 160 | irqreturn_t timer_interrupt(int irq, void *dev_id) |
1da177e4 LT |
161 | { |
162 | #ifdef CONFIG_X86_IO_APIC | |
163 | if (timer_ack) { | |
164 | /* | |
165 | * Subtle, when I/O APICs are used we have to ack timer IRQ | |
166 | * manually to reset the IRR bit for do_slow_gettimeoffset(). | |
167 | * This will also deassert NMI lines for the watchdog if run | |
168 | * on an 82489DX-based system. | |
169 | */ | |
170 | spin_lock(&i8259A_lock); | |
171 | outb(0x0c, PIC_MASTER_OCW3); | |
172 | /* Ack the IRQ; AEOI will end it automatically. */ | |
173 | inb(PIC_MASTER_POLL); | |
174 | spin_unlock(&i8259A_lock); | |
175 | } | |
176 | #endif | |
177 | ||
7d12e780 | 178 | do_timer_interrupt_hook(); |
1da177e4 | 179 | |
1da177e4 LT |
180 | if (MCA_bus) { |
181 | /* The PS/2 uses level-triggered interrupts. You can't | |
182 | turn them off, nor would you want to (any attempt to | |
183 | enable edge-triggered interrupts usually gets intercepted by a | |
184 | special hardware circuit). Hence we have to acknowledge | |
185 | the timer interrupt. Through some incredibly stupid | |
186 | design idea, the reset for IRQ 0 is done by setting the | |
187 | high bit of the PPI port B (0x61). Note that some PS/2s, | |
188 | notably the 55SX, work fine if this is removed. */ | |
189 | ||
86d91bab JG |
190 | u8 irq_v = inb_p( 0x61 ); /* read the current state */ |
191 | outb_p( irq_v|0x80, 0x61 ); /* reset the IRQ */ | |
1da177e4 | 192 | } |
1da177e4 | 193 | |
1da177e4 LT |
194 | return IRQ_HANDLED; |
195 | } | |
196 | ||
197 | /* not static: needed by APM */ | |
c1d370e1 | 198 | unsigned long read_persistent_clock(void) |
1da177e4 LT |
199 | { |
200 | unsigned long retval; | |
7ba1c6c8 | 201 | unsigned long flags; |
1da177e4 | 202 | |
7ba1c6c8 | 203 | spin_lock_irqsave(&rtc_lock, flags); |
1da177e4 | 204 | |
d3561b7f | 205 | retval = get_wallclock(); |
1da177e4 | 206 | |
7ba1c6c8 | 207 | spin_unlock_irqrestore(&rtc_lock, flags); |
1da177e4 LT |
208 | |
209 | return retval; | |
210 | } | |
129f6946 | 211 | |
1da177e4 LT |
212 | static void sync_cmos_clock(unsigned long dummy); |
213 | ||
8d06afab | 214 | static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0); |
bbab4f3b | 215 | int no_sync_cmos_clock; |
1da177e4 LT |
216 | |
217 | static void sync_cmos_clock(unsigned long dummy) | |
218 | { | |
219 | struct timeval now, next; | |
220 | int fail = 1; | |
221 | ||
222 | /* | |
223 | * If we have an externally synchronized Linux clock, then update | |
224 | * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be | |
225 | * called as close as possible to 500 ms before the new second starts. | |
226 | * This code is run on a timer. If the clock is set, that timer | |
227 | * may not expire at the correct time. Thus, we adjust... | |
228 | */ | |
b149ee22 | 229 | if (!ntp_synced()) |
1da177e4 LT |
230 | /* |
231 | * Not synced, exit, do not restart a timer (if one is | |
232 | * running, let it run out). | |
233 | */ | |
234 | return; | |
235 | ||
236 | do_gettimeofday(&now); | |
237 | if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 && | |
238 | now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2) | |
239 | fail = set_rtc_mmss(now.tv_sec); | |
240 | ||
241 | next.tv_usec = USEC_AFTER - now.tv_usec; | |
242 | if (next.tv_usec <= 0) | |
243 | next.tv_usec += USEC_PER_SEC; | |
244 | ||
245 | if (!fail) | |
246 | next.tv_sec = 659; | |
247 | else | |
248 | next.tv_sec = 0; | |
249 | ||
250 | if (next.tv_usec >= USEC_PER_SEC) { | |
251 | next.tv_sec++; | |
252 | next.tv_usec -= USEC_PER_SEC; | |
253 | } | |
254 | mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next)); | |
255 | } | |
256 | ||
257 | void notify_arch_cmos_timer(void) | |
258 | { | |
bbab4f3b ZA |
259 | if (!no_sync_cmos_clock) |
260 | mod_timer(&sync_cmos_timer, jiffies + 1); | |
1da177e4 LT |
261 | } |
262 | ||
1e4c85f9 | 263 | extern void (*late_time_init)(void); |
1da177e4 | 264 | /* Duplicate of time_init() below, with hpet_enable part added */ |
e30fab3a | 265 | void __init hpet_time_init(void) |
1da177e4 | 266 | { |
e9e2cdb4 TG |
267 | if (!hpet_enable()) |
268 | setup_pit_timer(); | |
e30fab3a | 269 | time_init_hook(); |
1da177e4 | 270 | } |
1da177e4 | 271 | |
e30fab3a ZA |
272 | /* |
273 | * This is called directly from init code; we must delay timer setup in the | |
274 | * HPET case as we can't make the decision to turn on HPET this early in the | |
275 | * boot process. | |
276 | * | |
277 | * The chosen time_init function will usually be hpet_time_init, above, but | |
278 | * in the case of virtual hardware, an alternative function may be substituted. | |
279 | */ | |
1da177e4 LT |
280 | void __init time_init(void) |
281 | { | |
e30fab3a | 282 | late_time_init = choose_time_init(); |
1da177e4 | 283 | } |