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1da177e4 LT |
1 | /* |
2 | * linux/arch/i386/kernel/time.c | |
3 | * | |
4 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds | |
5 | * | |
6 | * This file contains the PC-specific time handling details: | |
7 | * reading the RTC at bootup, etc.. | |
8 | * 1994-07-02 Alan Modra | |
9 | * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime | |
10 | * 1995-03-26 Markus Kuhn | |
11 | * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887 | |
12 | * precision CMOS clock update | |
13 | * 1996-05-03 Ingo Molnar | |
14 | * fixed time warps in do_[slow|fast]_gettimeoffset() | |
15 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 | |
16 | * "A Kernel Model for Precision Timekeeping" by Dave Mills | |
17 | * 1998-09-05 (Various) | |
18 | * More robust do_fast_gettimeoffset() algorithm implemented | |
19 | * (works with APM, Cyrix 6x86MX and Centaur C6), | |
20 | * monotonic gettimeofday() with fast_get_timeoffset(), | |
21 | * drift-proof precision TSC calibration on boot | |
22 | * (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D. | |
23 | * Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>; | |
24 | * ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>). | |
25 | * 1998-12-16 Andrea Arcangeli | |
26 | * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy | |
27 | * because was not accounting lost_ticks. | |
28 | * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli | |
29 | * Fixed a xtime SMP race (we need the xtime_lock rw spinlock to | |
30 | * serialize accesses to xtime/lost_ticks). | |
31 | */ | |
32 | ||
33 | #include <linux/errno.h> | |
34 | #include <linux/sched.h> | |
35 | #include <linux/kernel.h> | |
36 | #include <linux/param.h> | |
37 | #include <linux/string.h> | |
38 | #include <linux/mm.h> | |
39 | #include <linux/interrupt.h> | |
40 | #include <linux/time.h> | |
41 | #include <linux/delay.h> | |
42 | #include <linux/init.h> | |
43 | #include <linux/smp.h> | |
44 | #include <linux/module.h> | |
45 | #include <linux/sysdev.h> | |
46 | #include <linux/bcd.h> | |
47 | #include <linux/efi.h> | |
48 | #include <linux/mca.h> | |
49 | ||
50 | #include <asm/io.h> | |
51 | #include <asm/smp.h> | |
52 | #include <asm/irq.h> | |
53 | #include <asm/msr.h> | |
54 | #include <asm/delay.h> | |
55 | #include <asm/mpspec.h> | |
56 | #include <asm/uaccess.h> | |
57 | #include <asm/processor.h> | |
58 | #include <asm/timer.h> | |
59 | ||
60 | #include "mach_time.h" | |
61 | ||
62 | #include <linux/timex.h> | |
1da177e4 LT |
63 | |
64 | #include <asm/hpet.h> | |
65 | ||
66 | #include <asm/arch_hooks.h> | |
67 | ||
68 | #include "io_ports.h" | |
69 | ||
306e440d IM |
70 | #include <asm/i8259.h> |
71 | ||
1da177e4 LT |
72 | int pit_latch_buggy; /* extern */ |
73 | ||
74 | #include "do_timer.h" | |
75 | ||
a3a255e7 | 76 | unsigned int cpu_khz; /* Detected as we calibrate the TSC */ |
129f6946 | 77 | EXPORT_SYMBOL(cpu_khz); |
1da177e4 LT |
78 | |
79 | extern unsigned long wall_jiffies; | |
80 | ||
81 | DEFINE_SPINLOCK(rtc_lock); | |
129f6946 | 82 | EXPORT_SYMBOL(rtc_lock); |
1da177e4 | 83 | |
1da177e4 LT |
84 | /* |
85 | * This is a special lock that is owned by the CPU and holds the index | |
86 | * register we are working with. It is required for NMI access to the | |
87 | * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details. | |
88 | */ | |
89 | volatile unsigned long cmos_lock = 0; | |
90 | EXPORT_SYMBOL(cmos_lock); | |
91 | ||
92 | /* Routines for accessing the CMOS RAM/RTC. */ | |
93 | unsigned char rtc_cmos_read(unsigned char addr) | |
94 | { | |
95 | unsigned char val; | |
96 | lock_cmos_prefix(addr); | |
97 | outb_p(addr, RTC_PORT(0)); | |
98 | val = inb_p(RTC_PORT(1)); | |
99 | lock_cmos_suffix(addr); | |
100 | return val; | |
101 | } | |
102 | EXPORT_SYMBOL(rtc_cmos_read); | |
103 | ||
104 | void rtc_cmos_write(unsigned char val, unsigned char addr) | |
105 | { | |
106 | lock_cmos_prefix(addr); | |
107 | outb_p(addr, RTC_PORT(0)); | |
108 | outb_p(val, RTC_PORT(1)); | |
109 | lock_cmos_suffix(addr); | |
110 | } | |
111 | EXPORT_SYMBOL(rtc_cmos_write); | |
112 | ||
1da177e4 LT |
113 | static int set_rtc_mmss(unsigned long nowtime) |
114 | { | |
115 | int retval; | |
6f84fa2f | 116 | unsigned long flags; |
1da177e4 LT |
117 | |
118 | /* gets recalled with irq locally disabled */ | |
6f84fa2f | 119 | /* XXX - does irqsave resolve this? -johnstul */ |
120 | spin_lock_irqsave(&rtc_lock, flags); | |
1da177e4 LT |
121 | if (efi_enabled) |
122 | retval = efi_set_rtc_mmss(nowtime); | |
123 | else | |
124 | retval = mach_set_rtc_mmss(nowtime); | |
6f84fa2f | 125 | spin_unlock_irqrestore(&rtc_lock, flags); |
1da177e4 LT |
126 | |
127 | return retval; | |
128 | } | |
129 | ||
130 | ||
131 | int timer_ack; | |
132 | ||
1da177e4 LT |
133 | #if defined(CONFIG_SMP) && defined(CONFIG_FRAME_POINTER) |
134 | unsigned long profile_pc(struct pt_regs *regs) | |
135 | { | |
136 | unsigned long pc = instruction_pointer(regs); | |
137 | ||
d5a26017 | 138 | if (!user_mode_vm(regs) && in_lock_functions(pc)) |
1da177e4 LT |
139 | return *(unsigned long *)(regs->ebp + 4); |
140 | ||
141 | return pc; | |
142 | } | |
143 | EXPORT_SYMBOL(profile_pc); | |
144 | #endif | |
145 | ||
146 | /* | |
6f84fa2f | 147 | * This is the same as the above, except we _also_ save the current |
148 | * Time Stamp Counter value at the time of the timer interrupt, so that | |
149 | * we later on can estimate the time of day more exactly. | |
1da177e4 | 150 | */ |
6f84fa2f | 151 | irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
1da177e4 | 152 | { |
6f84fa2f | 153 | /* |
154 | * Here we are in the timer irq handler. We just have irqs locally | |
155 | * disabled but we don't know if the timer_bh is running on the other | |
156 | * CPU. We need to avoid to SMP race with it. NOTE: we don' t need | |
157 | * the irq version of write_lock because as just said we have irq | |
158 | * locally disabled. -arca | |
159 | */ | |
160 | write_seqlock(&xtime_lock); | |
161 | ||
1da177e4 LT |
162 | #ifdef CONFIG_X86_IO_APIC |
163 | if (timer_ack) { | |
164 | /* | |
165 | * Subtle, when I/O APICs are used we have to ack timer IRQ | |
166 | * manually to reset the IRR bit for do_slow_gettimeoffset(). | |
167 | * This will also deassert NMI lines for the watchdog if run | |
168 | * on an 82489DX-based system. | |
169 | */ | |
170 | spin_lock(&i8259A_lock); | |
171 | outb(0x0c, PIC_MASTER_OCW3); | |
172 | /* Ack the IRQ; AEOI will end it automatically. */ | |
173 | inb(PIC_MASTER_POLL); | |
174 | spin_unlock(&i8259A_lock); | |
175 | } | |
176 | #endif | |
177 | ||
178 | do_timer_interrupt_hook(regs); | |
179 | ||
180 | ||
181 | if (MCA_bus) { | |
182 | /* The PS/2 uses level-triggered interrupts. You can't | |
183 | turn them off, nor would you want to (any attempt to | |
184 | enable edge-triggered interrupts usually gets intercepted by a | |
185 | special hardware circuit). Hence we have to acknowledge | |
186 | the timer interrupt. Through some incredibly stupid | |
187 | design idea, the reset for IRQ 0 is done by setting the | |
188 | high bit of the PPI port B (0x61). Note that some PS/2s, | |
189 | notably the 55SX, work fine if this is removed. */ | |
190 | ||
191 | irq = inb_p( 0x61 ); /* read the current state */ | |
192 | outb_p( irq|0x80, 0x61 ); /* reset the IRQ */ | |
193 | } | |
1da177e4 LT |
194 | |
195 | write_sequnlock(&xtime_lock); | |
6eb0a0fd VP |
196 | |
197 | #ifdef CONFIG_X86_LOCAL_APIC | |
198 | if (using_apic_timer) | |
199 | smp_send_timer_broadcast_ipi(regs); | |
200 | #endif | |
201 | ||
1da177e4 LT |
202 | return IRQ_HANDLED; |
203 | } | |
204 | ||
205 | /* not static: needed by APM */ | |
206 | unsigned long get_cmos_time(void) | |
207 | { | |
208 | unsigned long retval; | |
7ba1c6c8 | 209 | unsigned long flags; |
1da177e4 | 210 | |
7ba1c6c8 | 211 | spin_lock_irqsave(&rtc_lock, flags); |
1da177e4 LT |
212 | |
213 | if (efi_enabled) | |
214 | retval = efi_get_time(); | |
215 | else | |
216 | retval = mach_get_cmos_time(); | |
217 | ||
7ba1c6c8 | 218 | spin_unlock_irqrestore(&rtc_lock, flags); |
1da177e4 LT |
219 | |
220 | return retval; | |
221 | } | |
129f6946 AD |
222 | EXPORT_SYMBOL(get_cmos_time); |
223 | ||
1da177e4 LT |
224 | static void sync_cmos_clock(unsigned long dummy); |
225 | ||
8d06afab | 226 | static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0); |
1da177e4 LT |
227 | |
228 | static void sync_cmos_clock(unsigned long dummy) | |
229 | { | |
230 | struct timeval now, next; | |
231 | int fail = 1; | |
232 | ||
233 | /* | |
234 | * If we have an externally synchronized Linux clock, then update | |
235 | * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be | |
236 | * called as close as possible to 500 ms before the new second starts. | |
237 | * This code is run on a timer. If the clock is set, that timer | |
238 | * may not expire at the correct time. Thus, we adjust... | |
239 | */ | |
b149ee22 | 240 | if (!ntp_synced()) |
1da177e4 LT |
241 | /* |
242 | * Not synced, exit, do not restart a timer (if one is | |
243 | * running, let it run out). | |
244 | */ | |
245 | return; | |
246 | ||
247 | do_gettimeofday(&now); | |
248 | if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 && | |
249 | now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2) | |
250 | fail = set_rtc_mmss(now.tv_sec); | |
251 | ||
252 | next.tv_usec = USEC_AFTER - now.tv_usec; | |
253 | if (next.tv_usec <= 0) | |
254 | next.tv_usec += USEC_PER_SEC; | |
255 | ||
256 | if (!fail) | |
257 | next.tv_sec = 659; | |
258 | else | |
259 | next.tv_sec = 0; | |
260 | ||
261 | if (next.tv_usec >= USEC_PER_SEC) { | |
262 | next.tv_sec++; | |
263 | next.tv_usec -= USEC_PER_SEC; | |
264 | } | |
265 | mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next)); | |
266 | } | |
267 | ||
268 | void notify_arch_cmos_timer(void) | |
269 | { | |
270 | mod_timer(&sync_cmos_timer, jiffies + 1); | |
271 | } | |
272 | ||
273 | static long clock_cmos_diff, sleep_start; | |
274 | ||
438510f6 | 275 | static int timer_suspend(struct sys_device *dev, pm_message_t state) |
1da177e4 LT |
276 | { |
277 | /* | |
278 | * Estimate time zone so that set_time can update the clock | |
279 | */ | |
280 | clock_cmos_diff = -get_cmos_time(); | |
281 | clock_cmos_diff += get_seconds(); | |
282 | sleep_start = get_cmos_time(); | |
283 | return 0; | |
284 | } | |
285 | ||
286 | static int timer_resume(struct sys_device *dev) | |
287 | { | |
288 | unsigned long flags; | |
289 | unsigned long sec; | |
290 | unsigned long sleep_length; | |
291 | ||
292 | #ifdef CONFIG_HPET_TIMER | |
293 | if (is_hpet_enabled()) | |
294 | hpet_reenable(); | |
295 | #endif | |
c3c433e4 | 296 | setup_pit_timer(); |
1da177e4 LT |
297 | sec = get_cmos_time() + clock_cmos_diff; |
298 | sleep_length = (get_cmos_time() - sleep_start) * HZ; | |
299 | write_seqlock_irqsave(&xtime_lock, flags); | |
300 | xtime.tv_sec = sec; | |
301 | xtime.tv_nsec = 0; | |
f7c09bd9 | 302 | jiffies_64 += sleep_length; |
1da177e4 | 303 | wall_jiffies += sleep_length; |
f7c09bd9 | 304 | write_sequnlock_irqrestore(&xtime_lock, flags); |
8446f1d3 | 305 | touch_softlockup_watchdog(); |
1da177e4 LT |
306 | return 0; |
307 | } | |
308 | ||
309 | static struct sysdev_class timer_sysclass = { | |
310 | .resume = timer_resume, | |
311 | .suspend = timer_suspend, | |
312 | set_kset_name("timer"), | |
313 | }; | |
314 | ||
315 | ||
316 | /* XXX this driverfs stuff should probably go elsewhere later -john */ | |
317 | static struct sys_device device_timer = { | |
318 | .id = 0, | |
319 | .cls = &timer_sysclass, | |
320 | }; | |
321 | ||
322 | static int time_init_device(void) | |
323 | { | |
324 | int error = sysdev_class_register(&timer_sysclass); | |
325 | if (!error) | |
326 | error = sysdev_register(&device_timer); | |
327 | return error; | |
328 | } | |
329 | ||
330 | device_initcall(time_init_device); | |
331 | ||
f2b36db6 | 332 | #ifdef CONFIG_HPET_TIMER |
1e4c85f9 | 333 | extern void (*late_time_init)(void); |
1da177e4 LT |
334 | /* Duplicate of time_init() below, with hpet_enable part added */ |
335 | static void __init hpet_time_init(void) | |
336 | { | |
337 | xtime.tv_sec = get_cmos_time(); | |
338 | xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); | |
339 | set_normalized_timespec(&wall_to_monotonic, | |
340 | -xtime.tv_sec, -xtime.tv_nsec); | |
341 | ||
35492df5 | 342 | if ((hpet_enable() >= 0) && hpet_use_timer) { |
1da177e4 LT |
343 | printk("Using HPET for base-timer\n"); |
344 | } | |
345 | ||
1da177e4 LT |
346 | time_init_hook(); |
347 | } | |
348 | #endif | |
349 | ||
350 | void __init time_init(void) | |
351 | { | |
352 | #ifdef CONFIG_HPET_TIMER | |
353 | if (is_hpet_capable()) { | |
354 | /* | |
355 | * HPET initialization needs to do memory-mapped io. So, let | |
356 | * us do a late initialization after mem_init(). | |
357 | */ | |
358 | late_time_init = hpet_time_init; | |
359 | return; | |
360 | } | |
361 | #endif | |
362 | xtime.tv_sec = get_cmos_time(); | |
363 | xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); | |
364 | set_normalized_timespec(&wall_to_monotonic, | |
365 | -xtime.tv_sec, -xtime.tv_nsec); | |
366 | ||
1da177e4 LT |
367 | time_init_hook(); |
368 | } |