Commit | Line | Data |
---|---|---|
7ce0bcfd ZA |
1 | /* |
2 | * VMI specific paravirt-ops implementation | |
3 | * | |
4 | * Copyright (C) 2005, VMware, Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
14 | * NON INFRINGEMENT. See the GNU General Public License for more | |
15 | * details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | * | |
21 | * Send feedback to zach@vmware.com | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
7ce0bcfd ZA |
26 | #include <linux/cpu.h> |
27 | #include <linux/bootmem.h> | |
28 | #include <linux/mm.h> | |
eeef9c68 | 29 | #include <linux/highmem.h> |
fa0aa866 | 30 | #include <linux/sched.h> |
7ce0bcfd ZA |
31 | #include <asm/vmi.h> |
32 | #include <asm/io.h> | |
33 | #include <asm/fixmap.h> | |
34 | #include <asm/apicdef.h> | |
35 | #include <asm/apic.h> | |
36 | #include <asm/processor.h> | |
37 | #include <asm/timer.h> | |
bbab4f3b | 38 | #include <asm/vmi_time.h> |
8f485612 | 39 | #include <asm/kmap_types.h> |
7ce0bcfd ZA |
40 | |
41 | /* Convenient for calling VMI functions indirectly in the ROM */ | |
42 | typedef u32 __attribute__((regparm(1))) (VROMFUNC)(void); | |
43 | typedef u64 __attribute__((regparm(2))) (VROMLONGFUNC)(int); | |
44 | ||
45 | #define call_vrom_func(rom,func) \ | |
46 | (((VROMFUNC *)(rom->func))()) | |
47 | ||
48 | #define call_vrom_long_func(rom,func,arg) \ | |
49 | (((VROMLONGFUNC *)(rom->func)) (arg)) | |
50 | ||
51 | static struct vrom_header *vmi_rom; | |
7ce0bcfd ZA |
52 | static int disable_pge; |
53 | static int disable_pse; | |
54 | static int disable_sep; | |
55 | static int disable_tsc; | |
56 | static int disable_mtrr; | |
7507ba34 | 57 | static int disable_noidle; |
772205f6 | 58 | static int disable_vmi_timer; |
7ce0bcfd ZA |
59 | |
60 | /* Cached VMI operations */ | |
30a1528d | 61 | static struct { |
7ce0bcfd ZA |
62 | void (*cpuid)(void /* non-c */); |
63 | void (*_set_ldt)(u32 selector); | |
64 | void (*set_tr)(u32 selector); | |
65 | void (*set_kernel_stack)(u32 selector, u32 esp0); | |
66 | void (*allocate_page)(u32, u32, u32, u32, u32); | |
67 | void (*release_page)(u32, u32); | |
68 | void (*set_pte)(pte_t, pte_t *, unsigned); | |
69 | void (*update_pte)(pte_t *, unsigned); | |
eeef9c68 ZA |
70 | void (*set_linear_mapping)(int, void *, u32, u32); |
71 | void (*_flush_tlb)(int); | |
7ce0bcfd | 72 | void (*set_initial_ap_state)(int, int); |
bbab4f3b | 73 | void (*halt)(void); |
49f19710 | 74 | void (*set_lazy_mode)(int mode); |
7ce0bcfd ZA |
75 | } vmi_ops; |
76 | ||
e0bb8643 ZA |
77 | /* Cached VMI operations */ |
78 | struct vmi_timer_ops vmi_timer_ops; | |
79 | ||
7ce0bcfd ZA |
80 | /* |
81 | * VMI patching routines. | |
82 | */ | |
83 | #define MNEM_CALL 0xe8 | |
84 | #define MNEM_JMP 0xe9 | |
85 | #define MNEM_RET 0xc3 | |
86 | ||
7ce0bcfd ZA |
87 | #define IRQ_PATCH_INT_MASK 0 |
88 | #define IRQ_PATCH_DISABLE 5 | |
89 | ||
90 | static inline void patch_offset(unsigned char *eip, unsigned char *dest) | |
91 | { | |
92 | *(unsigned long *)(eip+1) = dest-eip-5; | |
93 | } | |
94 | ||
95 | static unsigned patch_internal(int call, unsigned len, void *insns) | |
96 | { | |
97 | u64 reloc; | |
98 | struct vmi_relocation_info *const rel = (struct vmi_relocation_info *)&reloc; | |
99 | reloc = call_vrom_long_func(vmi_rom, get_reloc, call); | |
100 | switch(rel->type) { | |
101 | case VMI_RELOCATION_CALL_REL: | |
102 | BUG_ON(len < 5); | |
103 | *(char *)insns = MNEM_CALL; | |
104 | patch_offset(insns, rel->eip); | |
105 | return 5; | |
106 | ||
107 | case VMI_RELOCATION_JUMP_REL: | |
108 | BUG_ON(len < 5); | |
109 | *(char *)insns = MNEM_JMP; | |
110 | patch_offset(insns, rel->eip); | |
111 | return 5; | |
112 | ||
113 | case VMI_RELOCATION_NOP: | |
114 | /* obliterate the whole thing */ | |
115 | return 0; | |
116 | ||
117 | case VMI_RELOCATION_NONE: | |
118 | /* leave native code in place */ | |
119 | break; | |
120 | ||
121 | default: | |
122 | BUG(); | |
123 | } | |
124 | return len; | |
125 | } | |
126 | ||
127 | /* | |
128 | * Apply patch if appropriate, return length of new instruction | |
129 | * sequence. The callee does nop padding for us. | |
130 | */ | |
131 | static unsigned vmi_patch(u8 type, u16 clobbers, void *insns, unsigned len) | |
132 | { | |
133 | switch (type) { | |
d5822035 | 134 | case PARAVIRT_PATCH(irq_disable): |
7ce0bcfd | 135 | return patch_internal(VMI_CALL_DisableInterrupts, len, insns); |
d5822035 | 136 | case PARAVIRT_PATCH(irq_enable): |
7ce0bcfd | 137 | return patch_internal(VMI_CALL_EnableInterrupts, len, insns); |
d5822035 | 138 | case PARAVIRT_PATCH(restore_fl): |
7ce0bcfd | 139 | return patch_internal(VMI_CALL_SetInterruptMask, len, insns); |
d5822035 | 140 | case PARAVIRT_PATCH(save_fl): |
7ce0bcfd | 141 | return patch_internal(VMI_CALL_GetInterruptMask, len, insns); |
d5822035 | 142 | case PARAVIRT_PATCH(iret): |
7ce0bcfd | 143 | return patch_internal(VMI_CALL_IRET, len, insns); |
d5822035 | 144 | case PARAVIRT_PATCH(irq_enable_sysexit): |
7ce0bcfd ZA |
145 | return patch_internal(VMI_CALL_SYSEXIT, len, insns); |
146 | default: | |
147 | break; | |
148 | } | |
149 | return len; | |
150 | } | |
151 | ||
152 | /* CPUID has non-C semantics, and paravirt-ops API doesn't match hardware ISA */ | |
153 | static void vmi_cpuid(unsigned int *eax, unsigned int *ebx, | |
154 | unsigned int *ecx, unsigned int *edx) | |
155 | { | |
156 | int override = 0; | |
157 | if (*eax == 1) | |
158 | override = 1; | |
159 | asm volatile ("call *%6" | |
160 | : "=a" (*eax), | |
161 | "=b" (*ebx), | |
162 | "=c" (*ecx), | |
163 | "=d" (*edx) | |
164 | : "0" (*eax), "2" (*ecx), "r" (vmi_ops.cpuid)); | |
165 | if (override) { | |
166 | if (disable_pse) | |
167 | *edx &= ~X86_FEATURE_PSE; | |
168 | if (disable_pge) | |
169 | *edx &= ~X86_FEATURE_PGE; | |
170 | if (disable_sep) | |
171 | *edx &= ~X86_FEATURE_SEP; | |
172 | if (disable_tsc) | |
173 | *edx &= ~X86_FEATURE_TSC; | |
174 | if (disable_mtrr) | |
175 | *edx &= ~X86_FEATURE_MTRR; | |
176 | } | |
177 | } | |
178 | ||
179 | static inline void vmi_maybe_load_tls(struct desc_struct *gdt, int nr, struct desc_struct *new) | |
180 | { | |
181 | if (gdt[nr].a != new->a || gdt[nr].b != new->b) | |
182 | write_gdt_entry(gdt, nr, new->a, new->b); | |
183 | } | |
184 | ||
185 | static void vmi_load_tls(struct thread_struct *t, unsigned int cpu) | |
186 | { | |
187 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
188 | vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 0, &t->tls_array[0]); | |
189 | vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 1, &t->tls_array[1]); | |
190 | vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 2, &t->tls_array[2]); | |
191 | } | |
192 | ||
193 | static void vmi_set_ldt(const void *addr, unsigned entries) | |
194 | { | |
195 | unsigned cpu = smp_processor_id(); | |
196 | u32 low, high; | |
197 | ||
198 | pack_descriptor(&low, &high, (unsigned long)addr, | |
199 | entries * sizeof(struct desc_struct) - 1, | |
200 | DESCTYPE_LDT, 0); | |
201 | write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, low, high); | |
202 | vmi_ops._set_ldt(entries ? GDT_ENTRY_LDT*sizeof(struct desc_struct) : 0); | |
203 | } | |
204 | ||
205 | static void vmi_set_tr(void) | |
206 | { | |
207 | vmi_ops.set_tr(GDT_ENTRY_TSS*sizeof(struct desc_struct)); | |
208 | } | |
209 | ||
210 | static void vmi_load_esp0(struct tss_struct *tss, | |
211 | struct thread_struct *thread) | |
212 | { | |
a75c54f9 | 213 | tss->x86_tss.esp0 = thread->esp0; |
7ce0bcfd ZA |
214 | |
215 | /* This can only happen when SEP is enabled, no need to test "SEP"arately */ | |
a75c54f9 RR |
216 | if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) { |
217 | tss->x86_tss.ss1 = thread->sysenter_cs; | |
7ce0bcfd ZA |
218 | wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); |
219 | } | |
a75c54f9 | 220 | vmi_ops.set_kernel_stack(__KERNEL_DS, tss->x86_tss.esp0); |
7ce0bcfd ZA |
221 | } |
222 | ||
223 | static void vmi_flush_tlb_user(void) | |
224 | { | |
eeef9c68 | 225 | vmi_ops._flush_tlb(VMI_FLUSH_TLB); |
7ce0bcfd ZA |
226 | } |
227 | ||
228 | static void vmi_flush_tlb_kernel(void) | |
229 | { | |
eeef9c68 | 230 | vmi_ops._flush_tlb(VMI_FLUSH_TLB | VMI_FLUSH_GLOBAL); |
7ce0bcfd ZA |
231 | } |
232 | ||
233 | /* Stub to do nothing at all; used for delays and unimplemented calls */ | |
234 | static void vmi_nop(void) | |
235 | { | |
236 | } | |
237 | ||
7ce0bcfd ZA |
238 | #ifdef CONFIG_DEBUG_PAGE_TYPE |
239 | ||
240 | #ifdef CONFIG_X86_PAE | |
241 | #define MAX_BOOT_PTS (2048+4+1) | |
242 | #else | |
243 | #define MAX_BOOT_PTS (1024+1) | |
244 | #endif | |
245 | ||
246 | /* | |
247 | * During boot, mem_map is not yet available in paging_init, so stash | |
248 | * all the boot page allocations here. | |
249 | */ | |
250 | static struct { | |
251 | u32 pfn; | |
252 | int type; | |
253 | } boot_page_allocations[MAX_BOOT_PTS]; | |
254 | static int num_boot_page_allocations; | |
255 | static int boot_allocations_applied; | |
256 | ||
257 | void vmi_apply_boot_page_allocations(void) | |
258 | { | |
259 | int i; | |
260 | BUG_ON(!mem_map); | |
261 | for (i = 0; i < num_boot_page_allocations; i++) { | |
262 | struct page *page = pfn_to_page(boot_page_allocations[i].pfn); | |
263 | page->type = boot_page_allocations[i].type; | |
264 | page->type = boot_page_allocations[i].type & | |
265 | ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE); | |
266 | } | |
267 | boot_allocations_applied = 1; | |
268 | } | |
269 | ||
270 | static void record_page_type(u32 pfn, int type) | |
271 | { | |
272 | BUG_ON(num_boot_page_allocations >= MAX_BOOT_PTS); | |
273 | boot_page_allocations[num_boot_page_allocations].pfn = pfn; | |
274 | boot_page_allocations[num_boot_page_allocations].type = type; | |
275 | num_boot_page_allocations++; | |
276 | } | |
277 | ||
278 | static void check_zeroed_page(u32 pfn, int type, struct page *page) | |
279 | { | |
280 | u32 *ptr; | |
281 | int i; | |
282 | int limit = PAGE_SIZE / sizeof(int); | |
283 | ||
284 | if (page_address(page)) | |
285 | ptr = (u32 *)page_address(page); | |
286 | else | |
287 | ptr = (u32 *)__va(pfn << PAGE_SHIFT); | |
288 | /* | |
289 | * When cloning the root in non-PAE mode, only the userspace | |
290 | * pdes need to be zeroed. | |
291 | */ | |
292 | if (type & VMI_PAGE_CLONE) | |
293 | limit = USER_PTRS_PER_PGD; | |
294 | for (i = 0; i < limit; i++) | |
295 | BUG_ON(ptr[i]); | |
296 | } | |
297 | ||
298 | /* | |
299 | * We stash the page type into struct page so we can verify the page | |
300 | * types are used properly. | |
301 | */ | |
302 | static void vmi_set_page_type(u32 pfn, int type) | |
303 | { | |
304 | /* PAE can have multiple roots per page - don't track */ | |
305 | if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP)) | |
306 | return; | |
307 | ||
308 | if (boot_allocations_applied) { | |
309 | struct page *page = pfn_to_page(pfn); | |
310 | if (type != VMI_PAGE_NORMAL) | |
311 | BUG_ON(page->type); | |
312 | else | |
313 | BUG_ON(page->type == VMI_PAGE_NORMAL); | |
314 | page->type = type & ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE); | |
315 | if (type & VMI_PAGE_ZEROED) | |
316 | check_zeroed_page(pfn, type, page); | |
317 | } else { | |
318 | record_page_type(pfn, type); | |
319 | } | |
320 | } | |
321 | ||
322 | static void vmi_check_page_type(u32 pfn, int type) | |
323 | { | |
324 | /* PAE can have multiple roots per page - skip checks */ | |
325 | if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP)) | |
326 | return; | |
327 | ||
328 | type &= ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE); | |
329 | if (boot_allocations_applied) { | |
330 | struct page *page = pfn_to_page(pfn); | |
331 | BUG_ON((page->type ^ type) & VMI_PAGE_PAE); | |
332 | BUG_ON(type == VMI_PAGE_NORMAL && page->type); | |
333 | BUG_ON((type & page->type) == 0); | |
334 | } | |
335 | } | |
336 | #else | |
337 | #define vmi_set_page_type(p,t) do { } while (0) | |
338 | #define vmi_check_page_type(p,t) do { } while (0) | |
339 | #endif | |
340 | ||
eeef9c68 ZA |
341 | #ifdef CONFIG_HIGHPTE |
342 | static void *vmi_kmap_atomic_pte(struct page *page, enum km_type type) | |
9a1c13e9 | 343 | { |
eeef9c68 ZA |
344 | void *va = kmap_atomic(page, type); |
345 | ||
9a1c13e9 ZA |
346 | /* |
347 | * Internally, the VMI ROM must map virtual addresses to physical | |
348 | * addresses for processing MMU updates. By the time MMU updates | |
349 | * are issued, this information is typically already lost. | |
350 | * Fortunately, the VMI provides a cache of mapping slots for active | |
351 | * page tables. | |
352 | * | |
353 | * We use slot zero for the linear mapping of physical memory, and | |
354 | * in HIGHPTE kernels, slot 1 and 2 for KM_PTE0 and KM_PTE1. | |
355 | * | |
356 | * args: SLOT VA COUNT PFN | |
357 | */ | |
358 | BUG_ON(type != KM_PTE0 && type != KM_PTE1); | |
eeef9c68 ZA |
359 | vmi_ops.set_linear_mapping((type - KM_PTE0)+1, va, 1, page_to_pfn(page)); |
360 | ||
361 | return va; | |
9a1c13e9 | 362 | } |
eeef9c68 | 363 | #endif |
9a1c13e9 | 364 | |
7ce0bcfd ZA |
365 | static void vmi_allocate_pt(u32 pfn) |
366 | { | |
367 | vmi_set_page_type(pfn, VMI_PAGE_L1); | |
368 | vmi_ops.allocate_page(pfn, VMI_PAGE_L1, 0, 0, 0); | |
369 | } | |
370 | ||
371 | static void vmi_allocate_pd(u32 pfn) | |
372 | { | |
373 | /* | |
374 | * This call comes in very early, before mem_map is setup. | |
375 | * It is called only for swapper_pg_dir, which already has | |
376 | * data on it. | |
377 | */ | |
378 | vmi_set_page_type(pfn, VMI_PAGE_L2); | |
379 | vmi_ops.allocate_page(pfn, VMI_PAGE_L2, 0, 0, 0); | |
380 | } | |
381 | ||
382 | static void vmi_allocate_pd_clone(u32 pfn, u32 clonepfn, u32 start, u32 count) | |
383 | { | |
384 | vmi_set_page_type(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE); | |
385 | vmi_check_page_type(clonepfn, VMI_PAGE_L2); | |
386 | vmi_ops.allocate_page(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE, clonepfn, start, count); | |
387 | } | |
388 | ||
389 | static void vmi_release_pt(u32 pfn) | |
390 | { | |
391 | vmi_ops.release_page(pfn, VMI_PAGE_L1); | |
392 | vmi_set_page_type(pfn, VMI_PAGE_NORMAL); | |
393 | } | |
394 | ||
395 | static void vmi_release_pd(u32 pfn) | |
396 | { | |
397 | vmi_ops.release_page(pfn, VMI_PAGE_L2); | |
398 | vmi_set_page_type(pfn, VMI_PAGE_NORMAL); | |
399 | } | |
400 | ||
401 | /* | |
402 | * Helper macros for MMU update flags. We can defer updates until a flush | |
403 | * or page invalidation only if the update is to the current address space | |
404 | * (otherwise, there is no flush). We must check against init_mm, since | |
405 | * this could be a kernel update, which usually passes init_mm, although | |
406 | * sometimes this check can be skipped if we know the particular function | |
407 | * is only called on user mode PTEs. We could change the kernel to pass | |
408 | * current->active_mm here, but in particular, I was unsure if changing | |
409 | * mm/highmem.c to do this would still be correct on other architectures. | |
410 | */ | |
411 | #define is_current_as(mm, mustbeuser) ((mm) == current->active_mm || \ | |
412 | (!mustbeuser && (mm) == &init_mm)) | |
413 | #define vmi_flags_addr(mm, addr, level, user) \ | |
414 | ((level) | (is_current_as(mm, user) ? \ | |
415 | (VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0)) | |
416 | #define vmi_flags_addr_defer(mm, addr, level, user) \ | |
417 | ((level) | (is_current_as(mm, user) ? \ | |
418 | (VMI_PAGE_DEFER | VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0)) | |
419 | ||
3dc494e8 | 420 | static void vmi_update_pte(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
7ce0bcfd ZA |
421 | { |
422 | vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE); | |
423 | vmi_ops.update_pte(ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); | |
424 | } | |
425 | ||
3dc494e8 | 426 | static void vmi_update_pte_defer(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
7ce0bcfd ZA |
427 | { |
428 | vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE); | |
429 | vmi_ops.update_pte(ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 0)); | |
430 | } | |
431 | ||
432 | static void vmi_set_pte(pte_t *ptep, pte_t pte) | |
433 | { | |
434 | /* XXX because of set_pmd_pte, this can be called on PT or PD layers */ | |
435 | vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE | VMI_PAGE_PD); | |
436 | vmi_ops.set_pte(pte, ptep, VMI_PAGE_PT); | |
437 | } | |
438 | ||
3dc494e8 | 439 | static void vmi_set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) |
7ce0bcfd ZA |
440 | { |
441 | vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE); | |
442 | vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); | |
443 | } | |
444 | ||
445 | static void vmi_set_pmd(pmd_t *pmdp, pmd_t pmdval) | |
446 | { | |
447 | #ifdef CONFIG_X86_PAE | |
448 | const pte_t pte = { pmdval.pmd, pmdval.pmd >> 32 }; | |
449 | vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PMD); | |
450 | #else | |
451 | const pte_t pte = { pmdval.pud.pgd.pgd }; | |
452 | vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PGD); | |
453 | #endif | |
454 | vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD); | |
455 | } | |
456 | ||
457 | #ifdef CONFIG_X86_PAE | |
458 | ||
459 | static void vmi_set_pte_atomic(pte_t *ptep, pte_t pteval) | |
460 | { | |
461 | /* | |
462 | * XXX This is called from set_pmd_pte, but at both PT | |
463 | * and PD layers so the VMI_PAGE_PT flag is wrong. But | |
464 | * it is only called for large page mapping changes, | |
465 | * the Xen backend, doesn't support large pages, and the | |
466 | * ESX backend doesn't depend on the flag. | |
467 | */ | |
468 | set_64bit((unsigned long long *)ptep,pte_val(pteval)); | |
469 | vmi_ops.update_pte(ptep, VMI_PAGE_PT); | |
470 | } | |
471 | ||
472 | static void vmi_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) | |
473 | { | |
474 | vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE); | |
475 | vmi_ops.set_pte(pte, ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 1)); | |
476 | } | |
477 | ||
478 | static void vmi_set_pud(pud_t *pudp, pud_t pudval) | |
479 | { | |
480 | /* Um, eww */ | |
481 | const pte_t pte = { pudval.pgd.pgd, pudval.pgd.pgd >> 32 }; | |
482 | vmi_check_page_type(__pa(pudp) >> PAGE_SHIFT, VMI_PAGE_PGD); | |
483 | vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP); | |
484 | } | |
485 | ||
486 | static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
487 | { | |
488 | const pte_t pte = { 0 }; | |
489 | vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE); | |
490 | vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); | |
491 | } | |
492 | ||
8eb68fae | 493 | static void vmi_pmd_clear(pmd_t *pmd) |
7ce0bcfd ZA |
494 | { |
495 | const pte_t pte = { 0 }; | |
496 | vmi_check_page_type(__pa(pmd) >> PAGE_SHIFT, VMI_PAGE_PMD); | |
497 | vmi_ops.set_pte(pte, (pte_t *)pmd, VMI_PAGE_PD); | |
498 | } | |
499 | #endif | |
500 | ||
501 | #ifdef CONFIG_SMP | |
c6b36e9a | 502 | static void __devinit |
7ce0bcfd ZA |
503 | vmi_startup_ipi_hook(int phys_apicid, unsigned long start_eip, |
504 | unsigned long start_esp) | |
505 | { | |
c6b36e9a ZA |
506 | struct vmi_ap_state ap; |
507 | ||
7ce0bcfd ZA |
508 | /* Default everything to zero. This is fine for most GPRs. */ |
509 | memset(&ap, 0, sizeof(struct vmi_ap_state)); | |
510 | ||
511 | ap.gdtr_limit = GDT_SIZE - 1; | |
512 | ap.gdtr_base = (unsigned long) get_cpu_gdt_table(phys_apicid); | |
513 | ||
514 | ap.idtr_limit = IDT_ENTRIES * 8 - 1; | |
515 | ap.idtr_base = (unsigned long) idt_table; | |
516 | ||
517 | ap.ldtr = 0; | |
518 | ||
519 | ap.cs = __KERNEL_CS; | |
520 | ap.eip = (unsigned long) start_eip; | |
521 | ap.ss = __KERNEL_DS; | |
522 | ap.esp = (unsigned long) start_esp; | |
523 | ||
524 | ap.ds = __USER_DS; | |
525 | ap.es = __USER_DS; | |
7c3576d2 | 526 | ap.fs = __KERNEL_PERCPU; |
7ce0bcfd ZA |
527 | ap.gs = 0; |
528 | ||
529 | ap.eflags = 0; | |
530 | ||
7ce0bcfd ZA |
531 | #ifdef CONFIG_X86_PAE |
532 | /* efer should match BSP efer. */ | |
533 | if (cpu_has_nx) { | |
534 | unsigned l, h; | |
535 | rdmsr(MSR_EFER, l, h); | |
536 | ap.efer = (unsigned long long) h << 32 | l; | |
537 | } | |
538 | #endif | |
539 | ||
540 | ap.cr3 = __pa(swapper_pg_dir); | |
541 | /* Protected mode, paging, AM, WP, NE, MP. */ | |
542 | ap.cr0 = 0x80050023; | |
543 | ap.cr4 = mmu_cr4_features; | |
c6b36e9a | 544 | vmi_ops.set_initial_ap_state((u32)&ap, phys_apicid); |
7ce0bcfd ZA |
545 | } |
546 | #endif | |
547 | ||
441d40dc | 548 | static void vmi_set_lazy_mode(enum paravirt_lazy_mode mode) |
49f19710 | 549 | { |
441d40dc | 550 | static DEFINE_PER_CPU(enum paravirt_lazy_mode, lazy_mode); |
49f19710 ZA |
551 | |
552 | if (!vmi_ops.set_lazy_mode) | |
553 | return; | |
554 | ||
555 | /* Modes should never nest or overlap */ | |
556 | BUG_ON(__get_cpu_var(lazy_mode) && !(mode == PARAVIRT_LAZY_NONE || | |
557 | mode == PARAVIRT_LAZY_FLUSH)); | |
558 | ||
559 | if (mode == PARAVIRT_LAZY_FLUSH) { | |
560 | vmi_ops.set_lazy_mode(0); | |
561 | vmi_ops.set_lazy_mode(__get_cpu_var(lazy_mode)); | |
562 | } else { | |
563 | vmi_ops.set_lazy_mode(mode); | |
564 | __get_cpu_var(lazy_mode) = mode; | |
565 | } | |
566 | } | |
567 | ||
7ce0bcfd ZA |
568 | static inline int __init check_vmi_rom(struct vrom_header *rom) |
569 | { | |
570 | struct pci_header *pci; | |
571 | struct pnp_header *pnp; | |
572 | const char *manufacturer = "UNKNOWN"; | |
573 | const char *product = "UNKNOWN"; | |
574 | const char *license = "unspecified"; | |
575 | ||
576 | if (rom->rom_signature != 0xaa55) | |
577 | return 0; | |
578 | if (rom->vrom_signature != VMI_SIGNATURE) | |
579 | return 0; | |
580 | if (rom->api_version_maj != VMI_API_REV_MAJOR || | |
581 | rom->api_version_min+1 < VMI_API_REV_MINOR+1) { | |
582 | printk(KERN_WARNING "VMI: Found mismatched rom version %d.%d\n", | |
583 | rom->api_version_maj, | |
584 | rom->api_version_min); | |
585 | return 0; | |
586 | } | |
587 | ||
588 | /* | |
589 | * Relying on the VMI_SIGNATURE field is not 100% safe, so check | |
590 | * the PCI header and device type to make sure this is really a | |
591 | * VMI device. | |
592 | */ | |
593 | if (!rom->pci_header_offs) { | |
594 | printk(KERN_WARNING "VMI: ROM does not contain PCI header.\n"); | |
595 | return 0; | |
596 | } | |
597 | ||
598 | pci = (struct pci_header *)((char *)rom+rom->pci_header_offs); | |
599 | if (pci->vendorID != PCI_VENDOR_ID_VMWARE || | |
600 | pci->deviceID != PCI_DEVICE_ID_VMWARE_VMI) { | |
601 | /* Allow it to run... anyways, but warn */ | |
602 | printk(KERN_WARNING "VMI: ROM from unknown manufacturer\n"); | |
603 | } | |
604 | ||
605 | if (rom->pnp_header_offs) { | |
606 | pnp = (struct pnp_header *)((char *)rom+rom->pnp_header_offs); | |
607 | if (pnp->manufacturer_offset) | |
608 | manufacturer = (const char *)rom+pnp->manufacturer_offset; | |
609 | if (pnp->product_offset) | |
610 | product = (const char *)rom+pnp->product_offset; | |
611 | } | |
612 | ||
613 | if (rom->license_offs) | |
614 | license = (char *)rom+rom->license_offs; | |
615 | ||
616 | printk(KERN_INFO "VMI: Found %s %s, API version %d.%d, ROM version %d.%d\n", | |
617 | manufacturer, product, | |
618 | rom->api_version_maj, rom->api_version_min, | |
619 | pci->rom_version_maj, pci->rom_version_min); | |
620 | ||
302cf930 AK |
621 | /* Don't allow BSD/MIT here for now because we don't want to end up |
622 | with any binary only shim layers */ | |
623 | if (strcmp(license, "GPL") && strcmp(license, "GPL v2")) { | |
624 | printk(KERN_WARNING "VMI: Non GPL license `%s' found for ROM. Not used.\n", | |
625 | license); | |
626 | return 0; | |
627 | } | |
628 | ||
7ce0bcfd ZA |
629 | return 1; |
630 | } | |
631 | ||
632 | /* | |
633 | * Probe for the VMI option ROM | |
634 | */ | |
635 | static inline int __init probe_vmi_rom(void) | |
636 | { | |
637 | unsigned long base; | |
638 | ||
639 | /* VMI ROM is in option ROM area, check signature */ | |
640 | for (base = 0xC0000; base < 0xE0000; base += 2048) { | |
641 | struct vrom_header *romstart; | |
642 | romstart = (struct vrom_header *)isa_bus_to_virt(base); | |
643 | if (check_vmi_rom(romstart)) { | |
644 | vmi_rom = romstart; | |
645 | return 1; | |
646 | } | |
647 | } | |
648 | return 0; | |
649 | } | |
650 | ||
651 | /* | |
652 | * VMI setup common to all processors | |
653 | */ | |
654 | void vmi_bringup(void) | |
655 | { | |
656 | /* We must establish the lowmem mapping for MMU ops to work */ | |
772205f6 | 657 | if (vmi_ops.set_linear_mapping) |
eeef9c68 | 658 | vmi_ops.set_linear_mapping(0, (void *)__PAGE_OFFSET, max_low_pfn, 0); |
7ce0bcfd ZA |
659 | } |
660 | ||
661 | /* | |
772205f6 | 662 | * Return a pointer to a VMI function or NULL if unimplemented |
7ce0bcfd ZA |
663 | */ |
664 | static void *vmi_get_function(int vmicall) | |
665 | { | |
666 | u64 reloc; | |
667 | const struct vmi_relocation_info *rel = (struct vmi_relocation_info *)&reloc; | |
668 | reloc = call_vrom_long_func(vmi_rom, get_reloc, vmicall); | |
669 | BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL); | |
670 | if (rel->type == VMI_RELOCATION_CALL_REL) | |
671 | return (void *)rel->eip; | |
672 | else | |
772205f6 | 673 | return NULL; |
7ce0bcfd ZA |
674 | } |
675 | ||
676 | /* | |
677 | * Helper macro for making the VMI paravirt-ops fill code readable. | |
772205f6 ZA |
678 | * For unimplemented operations, fall back to default, unless nop |
679 | * is returned by the ROM. | |
7ce0bcfd ZA |
680 | */ |
681 | #define para_fill(opname, vmicall) \ | |
682 | do { \ | |
683 | reloc = call_vrom_long_func(vmi_rom, get_reloc, \ | |
684 | VMI_CALL_##vmicall); \ | |
0492c371 | 685 | if (rel->type == VMI_RELOCATION_CALL_REL) \ |
7ce0bcfd | 686 | paravirt_ops.opname = (void *)rel->eip; \ |
0492c371 | 687 | else if (rel->type == VMI_RELOCATION_NOP) \ |
772205f6 | 688 | paravirt_ops.opname = (void *)vmi_nop; \ |
0492c371 ZA |
689 | else if (rel->type != VMI_RELOCATION_NONE) \ |
690 | printk(KERN_WARNING "VMI: Unknown relocation " \ | |
691 | "type %d for " #vmicall"\n",\ | |
692 | rel->type); \ | |
772205f6 ZA |
693 | } while (0) |
694 | ||
695 | /* | |
696 | * Helper macro for making the VMI paravirt-ops fill code readable. | |
697 | * For cached operations which do not match the VMI ROM ABI and must | |
698 | * go through a tranlation stub. Ignore NOPs, since it is not clear | |
699 | * a NOP * VMI function corresponds to a NOP paravirt-op when the | |
700 | * functions are not in 1-1 correspondence. | |
701 | */ | |
702 | #define para_wrap(opname, wrapper, cache, vmicall) \ | |
703 | do { \ | |
704 | reloc = call_vrom_long_func(vmi_rom, get_reloc, \ | |
705 | VMI_CALL_##vmicall); \ | |
706 | BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL); \ | |
707 | if (rel->type == VMI_RELOCATION_CALL_REL) { \ | |
708 | paravirt_ops.opname = wrapper; \ | |
709 | vmi_ops.cache = (void *)rel->eip; \ | |
7ce0bcfd ZA |
710 | } \ |
711 | } while (0) | |
712 | ||
713 | /* | |
714 | * Activate the VMI interface and switch into paravirtualized mode | |
715 | */ | |
716 | static inline int __init activate_vmi(void) | |
717 | { | |
718 | short kernel_cs; | |
719 | u64 reloc; | |
720 | const struct vmi_relocation_info *rel = (struct vmi_relocation_info *)&reloc; | |
721 | ||
722 | if (call_vrom_func(vmi_rom, vmi_init) != 0) { | |
723 | printk(KERN_ERR "VMI ROM failed to initialize!"); | |
724 | return 0; | |
725 | } | |
726 | savesegment(cs, kernel_cs); | |
727 | ||
728 | paravirt_ops.paravirt_enabled = 1; | |
729 | paravirt_ops.kernel_rpl = kernel_cs & SEGMENT_RPL_MASK; | |
730 | ||
731 | paravirt_ops.patch = vmi_patch; | |
732 | paravirt_ops.name = "vmi"; | |
733 | ||
734 | /* | |
735 | * Many of these operations are ABI compatible with VMI. | |
736 | * This means we can fill in the paravirt-ops with direct | |
737 | * pointers into the VMI ROM. If the calling convention for | |
738 | * these operations changes, this code needs to be updated. | |
739 | * | |
740 | * Exceptions | |
741 | * CPUID paravirt-op uses pointers, not the native ISA | |
742 | * halt has no VMI equivalent; all VMI halts are "safe" | |
743 | * no MSR support yet - just trap and emulate. VMI uses the | |
744 | * same ABI as the native ISA, but Linux wants exceptions | |
745 | * from bogus MSR read / write handled | |
746 | * rdpmc is not yet used in Linux | |
747 | */ | |
748 | ||
772205f6 ZA |
749 | /* CPUID is special, so very special it gets wrapped like a present */ |
750 | para_wrap(cpuid, vmi_cpuid, cpuid, CPUID); | |
7ce0bcfd ZA |
751 | |
752 | para_fill(clts, CLTS); | |
753 | para_fill(get_debugreg, GetDR); | |
754 | para_fill(set_debugreg, SetDR); | |
755 | para_fill(read_cr0, GetCR0); | |
756 | para_fill(read_cr2, GetCR2); | |
757 | para_fill(read_cr3, GetCR3); | |
758 | para_fill(read_cr4, GetCR4); | |
759 | para_fill(write_cr0, SetCR0); | |
760 | para_fill(write_cr2, SetCR2); | |
761 | para_fill(write_cr3, SetCR3); | |
762 | para_fill(write_cr4, SetCR4); | |
763 | para_fill(save_fl, GetInterruptMask); | |
764 | para_fill(restore_fl, SetInterruptMask); | |
765 | para_fill(irq_disable, DisableInterrupts); | |
766 | para_fill(irq_enable, EnableInterrupts); | |
772205f6 | 767 | |
7ce0bcfd | 768 | para_fill(wbinvd, WBINVD); |
772205f6 ZA |
769 | para_fill(read_tsc, RDTSC); |
770 | ||
771 | /* The following we emulate with trap and emulate for now */ | |
7ce0bcfd ZA |
772 | /* paravirt_ops.read_msr = vmi_rdmsr */ |
773 | /* paravirt_ops.write_msr = vmi_wrmsr */ | |
7ce0bcfd ZA |
774 | /* paravirt_ops.rdpmc = vmi_rdpmc */ |
775 | ||
772205f6 ZA |
776 | /* TR interface doesn't pass TR value, wrap */ |
777 | para_wrap(load_tr_desc, vmi_set_tr, set_tr, SetTR); | |
7ce0bcfd ZA |
778 | |
779 | /* LDT is special, too */ | |
772205f6 | 780 | para_wrap(set_ldt, vmi_set_ldt, _set_ldt, SetLDT); |
7ce0bcfd ZA |
781 | |
782 | para_fill(load_gdt, SetGDT); | |
783 | para_fill(load_idt, SetIDT); | |
784 | para_fill(store_gdt, GetGDT); | |
785 | para_fill(store_idt, GetIDT); | |
786 | para_fill(store_tr, GetTR); | |
787 | paravirt_ops.load_tls = vmi_load_tls; | |
788 | para_fill(write_ldt_entry, WriteLDTEntry); | |
789 | para_fill(write_gdt_entry, WriteGDTEntry); | |
790 | para_fill(write_idt_entry, WriteIDTEntry); | |
772205f6 | 791 | para_wrap(load_esp0, vmi_load_esp0, set_kernel_stack, UpdateKernelStack); |
7ce0bcfd | 792 | para_fill(set_iopl_mask, SetIOPLMask); |
772205f6 | 793 | para_fill(io_delay, IODelay); |
49f19710 | 794 | para_wrap(set_lazy_mode, vmi_set_lazy_mode, set_lazy_mode, SetLazyMode); |
7ce0bcfd | 795 | |
772205f6 | 796 | /* user and kernel flush are just handled with different flags to FlushTLB */ |
eeef9c68 ZA |
797 | para_wrap(flush_tlb_user, vmi_flush_tlb_user, _flush_tlb, FlushTLB); |
798 | para_wrap(flush_tlb_kernel, vmi_flush_tlb_kernel, _flush_tlb, FlushTLB); | |
7ce0bcfd ZA |
799 | para_fill(flush_tlb_single, InvalPage); |
800 | ||
801 | /* | |
802 | * Until a standard flag format can be agreed on, we need to | |
803 | * implement these as wrappers in Linux. Get the VMI ROM | |
804 | * function pointers for the two backend calls. | |
805 | */ | |
806 | #ifdef CONFIG_X86_PAE | |
807 | vmi_ops.set_pte = vmi_get_function(VMI_CALL_SetPxELong); | |
808 | vmi_ops.update_pte = vmi_get_function(VMI_CALL_UpdatePxELong); | |
809 | #else | |
810 | vmi_ops.set_pte = vmi_get_function(VMI_CALL_SetPxE); | |
811 | vmi_ops.update_pte = vmi_get_function(VMI_CALL_UpdatePxE); | |
812 | #endif | |
7ce0bcfd | 813 | |
772205f6 ZA |
814 | if (vmi_ops.set_pte) { |
815 | paravirt_ops.set_pte = vmi_set_pte; | |
816 | paravirt_ops.set_pte_at = vmi_set_pte_at; | |
817 | paravirt_ops.set_pmd = vmi_set_pmd; | |
7ce0bcfd | 818 | #ifdef CONFIG_X86_PAE |
772205f6 ZA |
819 | paravirt_ops.set_pte_atomic = vmi_set_pte_atomic; |
820 | paravirt_ops.set_pte_present = vmi_set_pte_present; | |
821 | paravirt_ops.set_pud = vmi_set_pud; | |
822 | paravirt_ops.pte_clear = vmi_pte_clear; | |
823 | paravirt_ops.pmd_clear = vmi_pmd_clear; | |
7ce0bcfd | 824 | #endif |
772205f6 ZA |
825 | } |
826 | ||
827 | if (vmi_ops.update_pte) { | |
828 | paravirt_ops.pte_update = vmi_update_pte; | |
829 | paravirt_ops.pte_update_defer = vmi_update_pte_defer; | |
830 | } | |
831 | ||
832 | vmi_ops.allocate_page = vmi_get_function(VMI_CALL_AllocatePage); | |
833 | if (vmi_ops.allocate_page) { | |
834 | paravirt_ops.alloc_pt = vmi_allocate_pt; | |
835 | paravirt_ops.alloc_pd = vmi_allocate_pd; | |
836 | paravirt_ops.alloc_pd_clone = vmi_allocate_pd_clone; | |
837 | } | |
838 | ||
839 | vmi_ops.release_page = vmi_get_function(VMI_CALL_ReleasePage); | |
840 | if (vmi_ops.release_page) { | |
841 | paravirt_ops.release_pt = vmi_release_pt; | |
842 | paravirt_ops.release_pd = vmi_release_pd; | |
843 | } | |
eeef9c68 ZA |
844 | |
845 | /* Set linear is needed in all cases */ | |
846 | vmi_ops.set_linear_mapping = vmi_get_function(VMI_CALL_SetLinearMapping); | |
847 | #ifdef CONFIG_HIGHPTE | |
848 | if (vmi_ops.set_linear_mapping) | |
849 | paravirt_ops.kmap_atomic_pte = vmi_kmap_atomic_pte; | |
a27fe809 | 850 | #endif |
772205f6 | 851 | |
7ce0bcfd ZA |
852 | /* |
853 | * These MUST always be patched. Don't support indirect jumps | |
854 | * through these operations, as the VMI interface may use either | |
855 | * a jump or a call to get to these operations, depending on | |
856 | * the backend. They are performance critical anyway, so requiring | |
857 | * a patch is not a big problem. | |
858 | */ | |
859 | paravirt_ops.irq_enable_sysexit = (void *)0xfeedbab0; | |
860 | paravirt_ops.iret = (void *)0xbadbab0; | |
861 | ||
862 | #ifdef CONFIG_SMP | |
772205f6 | 863 | para_wrap(startup_ipi_hook, vmi_startup_ipi_hook, set_initial_ap_state, SetInitialAPState); |
7ce0bcfd ZA |
864 | #endif |
865 | ||
866 | #ifdef CONFIG_X86_LOCAL_APIC | |
772205f6 ZA |
867 | para_fill(apic_read, APICRead); |
868 | para_fill(apic_write, APICWrite); | |
869 | para_fill(apic_write_atomic, APICWrite); | |
7ce0bcfd ZA |
870 | #endif |
871 | ||
bbab4f3b ZA |
872 | /* |
873 | * Check for VMI timer functionality by probing for a cycle frequency method | |
874 | */ | |
875 | reloc = call_vrom_long_func(vmi_rom, get_reloc, VMI_CALL_GetCycleFrequency); | |
772205f6 | 876 | if (!disable_vmi_timer && rel->type != VMI_RELOCATION_NONE) { |
bbab4f3b ZA |
877 | vmi_timer_ops.get_cycle_frequency = (void *)rel->eip; |
878 | vmi_timer_ops.get_cycle_counter = | |
879 | vmi_get_function(VMI_CALL_GetCycleCounter); | |
880 | vmi_timer_ops.get_wallclock = | |
881 | vmi_get_function(VMI_CALL_GetWallclockTime); | |
882 | vmi_timer_ops.wallclock_updated = | |
883 | vmi_get_function(VMI_CALL_WallclockUpdated); | |
884 | vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm); | |
885 | vmi_timer_ops.cancel_alarm = | |
886 | vmi_get_function(VMI_CALL_CancelAlarm); | |
887 | paravirt_ops.time_init = vmi_time_init; | |
888 | paravirt_ops.get_wallclock = vmi_get_wallclock; | |
889 | paravirt_ops.set_wallclock = vmi_set_wallclock; | |
890 | #ifdef CONFIG_X86_LOCAL_APIC | |
e0bb8643 ZA |
891 | paravirt_ops.setup_boot_clock = vmi_time_bsp_init; |
892 | paravirt_ops.setup_secondary_clock = vmi_time_ap_init; | |
bbab4f3b | 893 | #endif |
6cb9a835 | 894 | paravirt_ops.get_scheduled_cycles = vmi_get_sched_cycles; |
1182d852 | 895 | paravirt_ops.get_cpu_khz = vmi_cpu_khz; |
772205f6 ZA |
896 | |
897 | /* We have true wallclock functions; disable CMOS clock sync */ | |
898 | no_sync_cmos_clock = 1; | |
899 | } else { | |
900 | disable_noidle = 1; | |
901 | disable_vmi_timer = 1; | |
bbab4f3b | 902 | } |
772205f6 | 903 | |
e0bb8643 | 904 | para_fill(safe_halt, Halt); |
bbab4f3b | 905 | |
7ce0bcfd ZA |
906 | /* |
907 | * Alternative instruction rewriting doesn't happen soon enough | |
908 | * to convert VMI_IRET to a call instead of a jump; so we have | |
909 | * to do this before IRQs get reenabled. Fortunately, it is | |
910 | * idempotent. | |
911 | */ | |
441d40dc | 912 | apply_paravirt(__parainstructions, __parainstructions_end); |
7ce0bcfd ZA |
913 | |
914 | vmi_bringup(); | |
915 | ||
916 | return 1; | |
917 | } | |
918 | ||
919 | #undef para_fill | |
920 | ||
921 | void __init vmi_init(void) | |
922 | { | |
923 | unsigned long flags; | |
924 | ||
925 | if (!vmi_rom) | |
926 | probe_vmi_rom(); | |
927 | else | |
928 | check_vmi_rom(vmi_rom); | |
929 | ||
930 | /* In case probing for or validating the ROM failed, basil */ | |
931 | if (!vmi_rom) | |
932 | return; | |
933 | ||
934 | reserve_top_address(-vmi_rom->virtual_top); | |
935 | ||
936 | local_irq_save(flags); | |
937 | activate_vmi(); | |
7507ba34 ZA |
938 | |
939 | #ifdef CONFIG_X86_IO_APIC | |
772205f6 | 940 | /* This is virtual hardware; timer routing is wired correctly */ |
7ce0bcfd ZA |
941 | no_timer_check = 1; |
942 | #endif | |
943 | local_irq_restore(flags & X86_EFLAGS_IF); | |
944 | } | |
945 | ||
946 | static int __init parse_vmi(char *arg) | |
947 | { | |
948 | if (!arg) | |
949 | return -EINVAL; | |
950 | ||
eda08b1b | 951 | if (!strcmp(arg, "disable_pge")) { |
7ce0bcfd ZA |
952 | clear_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability); |
953 | disable_pge = 1; | |
954 | } else if (!strcmp(arg, "disable_pse")) { | |
955 | clear_bit(X86_FEATURE_PSE, boot_cpu_data.x86_capability); | |
956 | disable_pse = 1; | |
957 | } else if (!strcmp(arg, "disable_sep")) { | |
958 | clear_bit(X86_FEATURE_SEP, boot_cpu_data.x86_capability); | |
959 | disable_sep = 1; | |
960 | } else if (!strcmp(arg, "disable_tsc")) { | |
961 | clear_bit(X86_FEATURE_TSC, boot_cpu_data.x86_capability); | |
962 | disable_tsc = 1; | |
963 | } else if (!strcmp(arg, "disable_mtrr")) { | |
964 | clear_bit(X86_FEATURE_MTRR, boot_cpu_data.x86_capability); | |
965 | disable_mtrr = 1; | |
772205f6 ZA |
966 | } else if (!strcmp(arg, "disable_timer")) { |
967 | disable_vmi_timer = 1; | |
968 | disable_noidle = 1; | |
7507ba34 ZA |
969 | } else if (!strcmp(arg, "disable_noidle")) |
970 | disable_noidle = 1; | |
7ce0bcfd ZA |
971 | return 0; |
972 | } | |
973 | ||
974 | early_param("vmi", parse_vmi); |