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1da177e4 LT |
1 | /** |
2 | * @file op_model_ppro.h | |
3 | * pentium pro / P6 model-specific MSR operations | |
4 | * | |
5 | * @remark Copyright 2002 OProfile authors | |
6 | * @remark Read the file COPYING | |
7 | * | |
8 | * @author John Levon | |
9 | * @author Philippe Elie | |
10 | * @author Graydon Hoare | |
11 | */ | |
12 | ||
13 | #include <linux/oprofile.h> | |
14 | #include <asm/ptrace.h> | |
15 | #include <asm/msr.h> | |
16 | #include <asm/apic.h> | |
3e4ff115 | 17 | #include <asm/nmi.h> |
1da177e4 LT |
18 | |
19 | #include "op_x86_model.h" | |
20 | #include "op_counter.h" | |
21 | ||
22 | #define NUM_COUNTERS 2 | |
23 | #define NUM_CONTROLS 2 | |
24 | ||
25 | #define CTR_READ(l,h,msrs,c) do {rdmsr(msrs->counters[(c)].addr, (l), (h));} while (0) | |
26 | #define CTR_WRITE(l,msrs,c) do {wrmsr(msrs->counters[(c)].addr, -(u32)(l), -1);} while (0) | |
27 | #define CTR_OVERFLOWED(n) (!((n) & (1U<<31))) | |
28 | ||
29 | #define CTRL_READ(l,h,msrs,c) do {rdmsr((msrs->controls[(c)].addr), (l), (h));} while (0) | |
30 | #define CTRL_WRITE(l,h,msrs,c) do {wrmsr((msrs->controls[(c)].addr), (l), (h));} while (0) | |
31 | #define CTRL_SET_ACTIVE(n) (n |= (1<<22)) | |
32 | #define CTRL_SET_INACTIVE(n) (n &= ~(1<<22)) | |
33 | #define CTRL_CLEAR(x) (x &= (1<<21)) | |
34 | #define CTRL_SET_ENABLE(val) (val |= 1<<20) | |
35 | #define CTRL_SET_USR(val,u) (val |= ((u & 1) << 16)) | |
36 | #define CTRL_SET_KERN(val,k) (val |= ((k & 1) << 17)) | |
37 | #define CTRL_SET_UM(val, m) (val |= (m << 8)) | |
38 | #define CTRL_SET_EVENT(val, e) (val |= e) | |
39 | ||
40 | static unsigned long reset_value[NUM_COUNTERS]; | |
41 | ||
42 | static void ppro_fill_in_addresses(struct op_msrs * const msrs) | |
43 | { | |
44 | msrs->counters[0].addr = MSR_P6_PERFCTR0; | |
45 | msrs->counters[1].addr = MSR_P6_PERFCTR1; | |
46 | ||
47 | msrs->controls[0].addr = MSR_P6_EVNTSEL0; | |
48 | msrs->controls[1].addr = MSR_P6_EVNTSEL1; | |
49 | } | |
50 | ||
51 | ||
52 | static void ppro_setup_ctrs(struct op_msrs const * const msrs) | |
53 | { | |
54 | unsigned int low, high; | |
55 | int i; | |
56 | ||
57 | /* clear all counters */ | |
58 | for (i = 0 ; i < NUM_CONTROLS; ++i) { | |
59 | CTRL_READ(low, high, msrs, i); | |
60 | CTRL_CLEAR(low); | |
61 | CTRL_WRITE(low, high, msrs, i); | |
62 | } | |
63 | ||
64 | /* avoid a false detection of ctr overflows in NMI handler */ | |
65 | for (i = 0; i < NUM_COUNTERS; ++i) { | |
66 | CTR_WRITE(1, msrs, i); | |
67 | } | |
68 | ||
69 | /* enable active counters */ | |
70 | for (i = 0; i < NUM_COUNTERS; ++i) { | |
71 | if (counter_config[i].enabled) { | |
72 | reset_value[i] = counter_config[i].count; | |
73 | ||
74 | CTR_WRITE(counter_config[i].count, msrs, i); | |
75 | ||
76 | CTRL_READ(low, high, msrs, i); | |
77 | CTRL_CLEAR(low); | |
78 | CTRL_SET_ENABLE(low); | |
79 | CTRL_SET_USR(low, counter_config[i].user); | |
80 | CTRL_SET_KERN(low, counter_config[i].kernel); | |
81 | CTRL_SET_UM(low, counter_config[i].unit_mask); | |
82 | CTRL_SET_EVENT(low, counter_config[i].event); | |
83 | CTRL_WRITE(low, high, msrs, i); | |
84 | } | |
85 | } | |
86 | } | |
87 | ||
88 | ||
89 | static int ppro_check_ctrs(struct pt_regs * const regs, | |
90 | struct op_msrs const * const msrs) | |
91 | { | |
92 | unsigned int low, high; | |
93 | int i; | |
94 | ||
95 | for (i = 0 ; i < NUM_COUNTERS; ++i) { | |
96 | CTR_READ(low, high, msrs, i); | |
97 | if (CTR_OVERFLOWED(low)) { | |
98 | oprofile_add_sample(regs, i); | |
99 | CTR_WRITE(reset_value[i], msrs, i); | |
100 | } | |
101 | } | |
102 | ||
103 | /* Only P6 based Pentium M need to re-unmask the apic vector but it | |
104 | * doesn't hurt other P6 variant */ | |
105 | apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); | |
106 | ||
107 | /* We can't work out if we really handled an interrupt. We | |
108 | * might have caught a *second* counter just after overflowing | |
109 | * the interrupt for this counter then arrives | |
110 | * and we don't find a counter that's overflowed, so we | |
111 | * would return 0 and get dazed + confused. Instead we always | |
112 | * assume we found an overflow. This sucks. | |
113 | */ | |
114 | return 1; | |
115 | } | |
116 | ||
117 | ||
118 | static void ppro_start(struct op_msrs const * const msrs) | |
119 | { | |
120 | unsigned int low,high; | |
121 | CTRL_READ(low, high, msrs, 0); | |
122 | CTRL_SET_ACTIVE(low); | |
123 | CTRL_WRITE(low, high, msrs, 0); | |
124 | } | |
125 | ||
126 | ||
127 | static void ppro_stop(struct op_msrs const * const msrs) | |
128 | { | |
129 | unsigned int low,high; | |
130 | CTRL_READ(low, high, msrs, 0); | |
131 | CTRL_SET_INACTIVE(low); | |
132 | CTRL_WRITE(low, high, msrs, 0); | |
133 | } | |
134 | ||
135 | ||
136 | struct op_x86_model_spec const op_ppro_spec = { | |
137 | .num_counters = NUM_COUNTERS, | |
138 | .num_controls = NUM_CONTROLS, | |
139 | .fill_in_addresses = &ppro_fill_in_addresses, | |
140 | .setup_ctrs = &ppro_setup_ctrs, | |
141 | .check_ctrs = &ppro_check_ctrs, | |
142 | .start = &ppro_start, | |
143 | .stop = &ppro_stop | |
144 | }; |