[deliverable/linux.git] / arch / i386 / pci / common.c

/*
 *	Low-Level PCI Support for PC
 *
 *	(c) 1999--2000 Martin Mares <mj@ucw.cz>
 */

#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/ioport.h>
#include <linux/init.h>

#include <asm/acpi.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/smp.h>

#include "pci.h"

#ifdef CONFIG_PCI_BIOS
extern  void pcibios_sort(void);
#endif

unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
				PCI_PROBE_MMCONF;

int pci_routeirq;
int pcibios_last_bus = -1;
unsigned long pirq_table_addr;
struct pci_bus *pci_root_bus;
struct pci_raw_ops *raw_pci_ops;

static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
{
	return raw_pci_ops->read(0, bus->number, devfn, where, size, value);
}

static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
{
	return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
}

struct pci_ops pci_root_ops = {
	.read = pci_read,
	.write = pci_write,
};

/*
 * legacy, numa, and acpi all want to call pcibios_scan_root
 * from their initcalls. This flag prevents that.
 */
int pcibios_scanned;

/*
 * This interrupt-safe spinlock protects all accesses to PCI
 * configuration space.
 */
DEFINE_SPINLOCK(pci_config_lock);

/*
 * Several buggy motherboards address only 16 devices and mirror
 * them to next 16 IDs. We try to detect this `feature' on all
 * primary buses (those containing host bridges as they are
 * expected to be unique) and remove the ghost devices.
 */

static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
{
	struct list_head *ln, *mn;
	struct pci_dev *d, *e;
	int mirror = PCI_DEVFN(16,0);
	int seen_host_bridge = 0;
	int i;

	DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
	list_for_each(ln, &b->devices) {
		d = pci_dev_b(ln);
		if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
			seen_host_bridge++;
		for (mn=ln->next; mn != &b->devices; mn=mn->next) {
			e = pci_dev_b(mn);
			if (e->devfn != d->devfn + mirror ||
			    e->vendor != d->vendor ||
			    e->device != d->device ||
			    e->class != d->class)
				continue;
			for(i=0; i<PCI_NUM_RESOURCES; i++)
				if (e->resource[i].start != d->resource[i].start ||
				    e->resource[i].end != d->resource[i].end ||
				    e->resource[i].flags != d->resource[i].flags)
					continue;
			break;
		}
		if (mn == &b->devices)
			return;
	}
	if (!seen_host_bridge)
		return;
	printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);

	ln = &b->devices;
	while (ln->next != &b->devices) {
		d = pci_dev_b(ln->next);
		if (d->devfn >= mirror) {
			list_del(&d->global_list);
			list_del(&d->bus_list);
			kfree(d);
		} else
			ln = ln->next;
	}
}

/*
 *  Called after each bus is probed, but before its children
 *  are examined.
 */

void __devinit  pcibios_fixup_bus(struct pci_bus *b)
{
	pcibios_fixup_ghosts(b);
	pci_read_bridge_bases(b);
}


struct pci_bus * __devinit pcibios_scan_root(int busnum)
{
	struct pci_bus *bus = NULL;

	while ((bus = pci_find_next_bus(bus)) != NULL) {
		if (bus->number == busnum) {
			/* Already scanned */
			return bus;
		}
	}

	printk("PCI: Probing PCI hardware (bus %02x)\n", busnum);

	return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, NULL);
}

extern u8 pci_cache_line_size;

static int __init pcibios_init(void)
{
	struct cpuinfo_x86 *c = &boot_cpu_data;

	if (!raw_pci_ops) {
		printk("PCI: System does not support PCI\n");
		return 0;
	}

	/*
	 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
	 * and P4. It's also good for 386/486s (which actually have 16)
	 * as quite a few PCI devices do not support smaller values.
	 */
	pci_cache_line_size = 32 >> 2;
	if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
		pci_cache_line_size = 64 >> 2;	/* K7 & K8 */
	else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
		pci_cache_line_size = 128 >> 2;	/* P4 */

	pcibios_resource_survey();

#ifdef CONFIG_PCI_BIOS
	if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
		pcibios_sort();
#endif
	return 0;
}

subsys_initcall(pcibios_init);

char * __devinit  pcibios_setup(char *str)
{
	if (!strcmp(str, "off")) {
		pci_probe = 0;
		return NULL;
	}
#ifdef CONFIG_PCI_BIOS
	else if (!strcmp(str, "bios")) {
		pci_probe = PCI_PROBE_BIOS;
		return NULL;
	} else if (!strcmp(str, "nobios")) {
		pci_probe &= ~PCI_PROBE_BIOS;
		return NULL;
	} else if (!strcmp(str, "nosort")) {
		pci_probe |= PCI_NO_SORT;
		return NULL;
	} else if (!strcmp(str, "biosirq")) {
		pci_probe |= PCI_BIOS_IRQ_SCAN;
		return NULL;
	} else if (!strncmp(str, "pirqaddr=", 9)) {
		pirq_table_addr = simple_strtoul(str+9, NULL, 0);
		return NULL;
	}
#endif
#ifdef CONFIG_PCI_DIRECT
	else if (!strcmp(str, "conf1")) {
		pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
		return NULL;
	}
	else if (!strcmp(str, "conf2")) {
		pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
		return NULL;
	}
#endif
#ifdef CONFIG_PCI_MMCONFIG
	else if (!strcmp(str, "nommconf")) {
		pci_probe &= ~PCI_PROBE_MMCONF;
		return NULL;
	}
#endif
	else if (!strcmp(str, "noacpi")) {
		acpi_noirq_set();
		return NULL;
	}
#ifndef CONFIG_X86_VISWS
	else if (!strcmp(str, "usepirqmask")) {
		pci_probe |= PCI_USE_PIRQ_MASK;
		return NULL;
	} else if (!strncmp(str, "irqmask=", 8)) {
		pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
		return NULL;
	} else if (!strncmp(str, "lastbus=", 8)) {
		pcibios_last_bus = simple_strtol(str+8, NULL, 0);
		return NULL;
	}
#endif
	else if (!strcmp(str, "rom")) {
		pci_probe |= PCI_ASSIGN_ROMS;
		return NULL;
	} else if (!strcmp(str, "assign-busses")) {
		pci_probe |= PCI_ASSIGN_ALL_BUSSES;
		return NULL;
	} else if (!strcmp(str, "routeirq")) {
		pci_routeirq = 1;
		return NULL;
	}
	return str;
}

unsigned int pcibios_assign_all_busses(void)
{
	return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
}

int pcibios_enable_device(struct pci_dev *dev, int mask)
{
	int err;

	if ((err = pcibios_enable_resources(dev, mask)) < 0)
		return err;

	return pcibios_enable_irq(dev);
}

void pcibios_disable_device (struct pci_dev *dev)
{
	if (pcibios_disable_irq)
		pcibios_disable_irq(dev);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Low-Level PCI Support for PC
	3	*
	4	* (c) 1999--2000 Martin Mares <mj@ucw.cz>
	5	*/
	6
	7	#include <linux/sched.h>
	8	#include <linux/pci.h>
	9	#include <linux/ioport.h>
	10	#include <linux/init.h>
	11
	12	#include <asm/acpi.h>
	13	#include <asm/segment.h>
	14	#include <asm/io.h>
	15	#include <asm/smp.h>
	16
	17	#include "pci.h"
	18
	19	#ifdef CONFIG_PCI_BIOS
	20	extern void pcibios_sort(void);
	21	#endif
	22
	23	unsigned int pci_probe = PCI_PROBE_BIOS \| PCI_PROBE_CONF1 \| PCI_PROBE_CONF2 \|
	24	PCI_PROBE_MMCONF;
	25
	26	int pci_routeirq;
	27	int pcibios_last_bus = -1;
120bb424	28	unsigned long pirq_table_addr;
120bb424	29	struct pci_bus *pci_root_bus;
1da177e4 LT	30	struct pci_raw_ops *raw_pci_ops;
	31
	32	static int pci_read(struct pci_bus bus, unsigned int devfn, int where, int size, u32 value)
	33	{
	34	return raw_pci_ops->read(0, bus->number, devfn, where, size, value);
	35	}
	36
	37	static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
	38	{
	39	return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
	40	}
	41
	42	struct pci_ops pci_root_ops = {
	43	.read = pci_read,
	44	.write = pci_write,
	45	};
	46
	47	/*
	48	* legacy, numa, and acpi all want to call pcibios_scan_root
	49	* from their initcalls. This flag prevents that.
	50	*/
	51	int pcibios_scanned;
	52
	53	/*
	54	* This interrupt-safe spinlock protects all accesses to PCI
	55	* configuration space.
	56	*/
	57	DEFINE_SPINLOCK(pci_config_lock);
	58
	59	/*
	60	* Several buggy motherboards address only 16 devices and mirror
	61	* them to next 16 IDs. We try to detect this `feature' on all
	62	* primary buses (those containing host bridges as they are
	63	* expected to be unique) and remove the ghost devices.
	64	*/
	65
	66	static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
	67	{
	68	struct list_head ln, mn;
	69	struct pci_dev d, e;
	70	int mirror = PCI_DEVFN(16,0);
	71	int seen_host_bridge = 0;
	72	int i;
	73
	74	DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
	75	list_for_each(ln, &b->devices) {
	76	d = pci_dev_b(ln);
	77	if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
	78	seen_host_bridge++;
	79	for (mn=ln->next; mn != &b->devices; mn=mn->next) {
	80	e = pci_dev_b(mn);
	81	if (e->devfn != d->devfn + mirror \|\|
	82	e->vendor != d->vendor \|\|
	83	e->device != d->device \|\|
	84	e->class != d->class)
	85	continue;
	86	for(i=0; i<PCI_NUM_RESOURCES; i++)
	87	if (e->resource[i].start != d->resource[i].start \|\|
	88	e->resource[i].end != d->resource[i].end \|\|
	89	e->resource[i].flags != d->resource[i].flags)
	90	continue;
	91	break;
	92	}
	93	if (mn == &b->devices)
94	return;
95	}
96	if (!seen_host_bridge)
97	return;
98	printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
99
100	ln = &b->devices;
101	while (ln->next != &b->devices) {
102	d = pci_dev_b(ln->next);
103	if (d->devfn >= mirror) {
104	list_del(&d->global_list);
105	list_del(&d->bus_list);
106	kfree(d);
107	} else
108	ln = ln->next;
109	}
110	}
111
112	/*
113	* Called after each bus is probed, but before its children
114	* are examined.
115	*/
116
117	void __devinit pcibios_fixup_bus(struct pci_bus *b)
118	{
119	pcibios_fixup_ghosts(b);
120	pci_read_bridge_bases(b);
121	}
122
123
124	struct pci_bus * __devinit pcibios_scan_root(int busnum)
125	{
126	struct pci_bus *bus = NULL;
127
128	while ((bus = pci_find_next_bus(bus)) != NULL) {
129	if (bus->number == busnum) {
130	/* Already scanned */
131	return bus;
132	}
133	}
134
135	printk("PCI: Probing PCI hardware (bus %02x)\n", busnum);
136
c431ada4	137	return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, NULL);
1da177e4 LT	138	}
	139
	140	extern u8 pci_cache_line_size;
	141
	142	static int __init pcibios_init(void)
	143	{
	144	struct cpuinfo_x86 *c = &boot_cpu_data;
	145
	146	if (!raw_pci_ops) {
	147	printk("PCI: System does not support PCI\n");
	148	return 0;
	149	}
	150
	151	/*
	152	* Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
	153	* and P4. It's also good for 386/486s (which actually have 16)
	154	* as quite a few PCI devices do not support smaller values.
	155	*/
	156	pci_cache_line_size = 32 >> 2;
	157	if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
	158	pci_cache_line_size = 64 >> 2; /* K7 & K8 */
	159	else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
	160	pci_cache_line_size = 128 >> 2; /* P4 */
	161
	162	pcibios_resource_survey();
	163
	164	#ifdef CONFIG_PCI_BIOS
	165	if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
	166	pcibios_sort();
	167	#endif
	168	return 0;
	169	}
	170
	171	subsys_initcall(pcibios_init);
	172
	173	char * __devinit pcibios_setup(char *str)
	174	{
	175	if (!strcmp(str, "off")) {
	176	pci_probe = 0;
	177	return NULL;
	178	}
	179	#ifdef CONFIG_PCI_BIOS
	180	else if (!strcmp(str, "bios")) {
	181	pci_probe = PCI_PROBE_BIOS;
	182	return NULL;
	183	} else if (!strcmp(str, "nobios")) {
	184	pci_probe &= ~PCI_PROBE_BIOS;
	185	return NULL;
	186	} else if (!strcmp(str, "nosort")) {
	187	pci_probe \|= PCI_NO_SORT;
	188	return NULL;
	189	} else if (!strcmp(str, "biosirq")) {
	190	pci_probe \|= PCI_BIOS_IRQ_SCAN;
	191	return NULL;
120bb424	192	} else if (!strncmp(str, "pirqaddr=", 9)) {
	193	pirq_table_addr = simple_strtoul(str+9, NULL, 0);
	194	return NULL;
1da177e4 LT	195	}
	196	#endif
	197	#ifdef CONFIG_PCI_DIRECT
	198	else if (!strcmp(str, "conf1")) {
	199	pci_probe = PCI_PROBE_CONF1 \| PCI_NO_CHECKS;
	200	return NULL;
	201	}
	202	else if (!strcmp(str, "conf2")) {
	203	pci_probe = PCI_PROBE_CONF2 \| PCI_NO_CHECKS;
	204	return NULL;
	205	}
	206	#endif
	207	#ifdef CONFIG_PCI_MMCONFIG
	208	else if (!strcmp(str, "nommconf")) {
	209	pci_probe &= ~PCI_PROBE_MMCONF;
	210	return NULL;
	211	}
	212	#endif
	213	else if (!strcmp(str, "noacpi")) {
	214	acpi_noirq_set();
	215	return NULL;
	216	}
	217	#ifndef CONFIG_X86_VISWS
	218	else if (!strcmp(str, "usepirqmask")) {
	219	pci_probe \|= PCI_USE_PIRQ_MASK;
	220	return NULL;
	221	} else if (!strncmp(str, "irqmask=", 8)) {
	222	pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
	223	return NULL;
	224	} else if (!strncmp(str, "lastbus=", 8)) {
	225	pcibios_last_bus = simple_strtol(str+8, NULL, 0);
	226	return NULL;
	227	}
	228	#endif
	229	else if (!strcmp(str, "rom")) {
	230	pci_probe \|= PCI_ASSIGN_ROMS;
	231	return NULL;
	232	} else if (!strcmp(str, "assign-busses")) {
	233	pci_probe \|= PCI_ASSIGN_ALL_BUSSES;
	234	return NULL;
	235	} else if (!strcmp(str, "routeirq")) {
	236	pci_routeirq = 1;
	237	return NULL;
	238	}
	239	return str;
	240	}
	241
	242	unsigned int pcibios_assign_all_busses(void)
	243	{
	244	return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
	245	}
	246
	247	int pcibios_enable_device(struct pci_dev *dev, int mask)
	248	{
	249	int err;
	250
	251	if ((err = pcibios_enable_resources(dev, mask)) < 0)
	252	return err;
	253
	254	return pcibios_enable_irq(dev);
	255	}
87bec66b DSL	256
	257	void pcibios_disable_device (struct pci_dev *dev)
	258	{
	259	if (pcibios_disable_irq)
	260	pcibios_disable_irq(dev);
	261	}