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[ACPI] remove "default m" from acpi/Kconfig
[deliverable/linux.git] / arch / i386 / pci / irq.c
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1da177e4
LT		 1/*
2 * Low-Level PCI Support for PC -- Routing of Interrupts
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7#include <linux/config.h>
8#include <linux/types.h>
9#include <linux/kernel.h>
10#include <linux/pci.h>
11#include <linux/init.h>
12#include <linux/slab.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/dmi.h>
16#include <asm/io.h>
17#include <asm/smp.h>
18#include <asm/io_apic.h>
19#include <asm/hw_irq.h>
20#include <linux/acpi.h>
21
22#include "pci.h"
23
24#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
25#define PIRQ_VERSION 0x0100
26
27static int broken_hp_bios_irq9;
28static int acer_tm360_irqrouting;
29
30static struct irq_routing_table *pirq_table;
31
32static int pirq_enable_irq(struct pci_dev *dev);
33
34/*
35 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
36 * Avoid using: 13, 14 and 15 (FP error and IDE).
37 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
38 */
39unsigned int pcibios_irq_mask = 0xfff8;
40
41static int pirq_penalty[16] = {
42 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
43 0, 0, 0, 0, 1000, 100000, 100000, 100000
44};
45
46struct irq_router {
47 char *name;
48 u16 vendor, device;
49 int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
50 int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
51};
52
53struct irq_router_handler {
54 u16 vendor;
55 int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
56};
57
58int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
87bec66b 59void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
1da177e4 60
120bb424 61/*
62 * Check passed address for the PCI IRQ Routing Table signature
63 * and perform checksum verification.
64 */
65
66static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
67{
68 struct irq_routing_table *rt;
69 int i;
70 u8 sum;
71
72 rt = (struct irq_routing_table *) addr;
73 if (rt->signature != PIRQ_SIGNATURE ||
74 rt->version != PIRQ_VERSION ||
75 rt->size % 16 ||
76 rt->size < sizeof(struct irq_routing_table))
77 return NULL;
78 sum = 0;
79 for (i=0; i < rt->size; i++)
80 sum += addr[i];
81 if (!sum) {
82 DBG("PCI: Interrupt Routing Table found at 0x%p\n", rt);
83 return rt;
84 }
85 return NULL;
86}
87
88
89
1da177e4
LT		 90/*
91 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
92 */
93
94static struct irq_routing_table * __init pirq_find_routing_table(void)
95{
96 u8 *addr;
97 struct irq_routing_table *rt;
1da177e4 98
120bb424 99 if (pirq_table_addr) {
100 rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
101 if (rt)
102 return rt;
103 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
104 }
1da177e4 105 for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
120bb424 106 rt = pirq_check_routing_table(addr);
107 if (rt)
1da177e4 108 return rt;
1da177e4
LT		 109 }
110 return NULL;
111}
112
113/*
114 * If we have a IRQ routing table, use it to search for peer host
115 * bridges. It's a gross hack, but since there are no other known
116 * ways how to get a list of buses, we have to go this way.
117 */
118
119static void __init pirq_peer_trick(void)
120{
121 struct irq_routing_table *rt = pirq_table;
122 u8 busmap[256];
123 int i;
124 struct irq_info *e;
125
126 memset(busmap, 0, sizeof(busmap));
127 for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
128 e = &rt->slots[i];
129#ifdef DEBUG
130 {
131 int j;
132 DBG("%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
133 for(j=0; j<4; j++)
134 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
135 DBG("\n");
136 }
137#endif
138 busmap[e->bus] = 1;
139 }
140 for(i = 1; i < 256; i++) {
141 if (!busmap[i] || pci_find_bus(0, i))
142 continue;
143 if (pci_scan_bus(i, &pci_root_ops, NULL))
144 printk(KERN_INFO "PCI: Discovered primary peer bus %02x [IRQ]\n", i);
145 }
146 pcibios_last_bus = -1;
147}
148
149/*
150 * Code for querying and setting of IRQ routes on various interrupt routers.
151 */
152
153void eisa_set_level_irq(unsigned int irq)
154{
155 unsigned char mask = 1 << (irq & 7);
156 unsigned int port = 0x4d0 + (irq >> 3);
157 unsigned char val;
158 static u16 eisa_irq_mask;
159
160 if (irq >= 16 || (1 << irq) & eisa_irq_mask)
161 return;
162
163 eisa_irq_mask |= (1 << irq);
164 printk("PCI: setting IRQ %u as level-triggered\n", irq);
165 val = inb(port);
166 if (!(val & mask)) {
167 DBG(" -> edge");
168 outb(val | mask, port);
169 }
170}
171
172/*
173 * Common IRQ routing practice: nybbles in config space,
174 * offset by some magic constant.
175 */
176static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
177{
178 u8 x;
179 unsigned reg = offset + (nr >> 1);
180
181 pci_read_config_byte(router, reg, &x);
182 return (nr & 1) ? (x >> 4) : (x & 0xf);
183}
184
185static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
186{
187 u8 x;
188 unsigned reg = offset + (nr >> 1);
189
190 pci_read_config_byte(router, reg, &x);
191 x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
192 pci_write_config_byte(router, reg, x);
193}
194
195/*
196 * ALI pirq entries are damn ugly, and completely undocumented.
197 * This has been figured out from pirq tables, and it's not a pretty
198 * picture.
199 */
200static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
201{
202 static unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
203
204 return irqmap[read_config_nybble(router, 0x48, pirq-1)];
205}
206
207static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
208{
209 static unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
210 unsigned int val = irqmap[irq];
211
212 if (val) {
213 write_config_nybble(router, 0x48, pirq-1, val);
214 return 1;
215 }
216 return 0;
217}
218
219/*
220 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
221 * just a pointer to the config space.
222 */
223static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
224{
225 u8 x;
226
227 pci_read_config_byte(router, pirq, &x);
228 return (x < 16) ? x : 0;
229}
230
231static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
232{
233 pci_write_config_byte(router, pirq, irq);
234 return 1;
235}
236
237/*
238 * The VIA pirq rules are nibble-based, like ALI,
239 * but without the ugly irq number munging.
240 * However, PIRQD is in the upper instead of lower 4 bits.
241 */
242static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
243{
244 return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
245}
246
247static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
248{
249 write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
250 return 1;
251}
252
80bb82af
AG		 253/*
254 * The VIA pirq rules are nibble-based, like ALI,
255 * but without the ugly irq number munging.
256 * However, for 82C586, nibble map is different .
257 */
258static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
259{
260 static unsigned int pirqmap[4] = { 3, 2, 5, 1 };
261 return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
262}
263
264static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
265{
266 static unsigned int pirqmap[4] = { 3, 2, 5, 1 };
267 write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
268 return 1;
269}
270
1da177e4
LT		 271/*
272 * ITE 8330G pirq rules are nibble-based
273 * FIXME: pirqmap may be { 1, 0, 3, 2 },
274 * 2+3 are both mapped to irq 9 on my system
275 */
276static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
277{
278 static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
279 return read_config_nybble(router,0x43, pirqmap[pirq-1]);
280}
281
282static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
283{
284 static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
285 write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
286 return 1;
287}
288
289/*
290 * OPTI: high four bits are nibble pointer..
291 * I wonder what the low bits do?
292 */
293static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
294{
295 return read_config_nybble(router, 0xb8, pirq >> 4);
296}
297
298static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
299{
300 write_config_nybble(router, 0xb8, pirq >> 4, irq);
301 return 1;
302}
303
304/*
305 * Cyrix: nibble offset 0x5C
306 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
307 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
308 */
309static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
310{
311 return read_config_nybble(router, 0x5C, (pirq-1)^1);
312}
313
314static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
315{
316 write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
317 return 1;
318}
319
320/*
321 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
322 * We have to deal with the following issues here:
323 * - vendors have different ideas about the meaning of link values
324 * - some onboard devices (integrated in the chipset) have special
325 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
326 * - different revision of the router have a different layout for
327 * the routing registers, particularly for the onchip devices
328 *
329 * For all routing registers the common thing is we have one byte
330 * per routeable link which is defined as:
331 * bit 7 IRQ mapping enabled (0) or disabled (1)
332 * bits [6:4] reserved (sometimes used for onchip devices)
333 * bits [3:0] IRQ to map to
334 * allowed: 3-7, 9-12, 14-15
335 * reserved: 0, 1, 2, 8, 13
336 *
337 * The config-space registers located at 0x41/0x42/0x43/0x44 are
338 * always used to route the normal PCI INT A/B/C/D respectively.
339 * Apparently there are systems implementing PCI routing table using
340 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
341 * We try our best to handle both link mappings.
342 *
343 * Currently (2003-05-21) it appears most SiS chipsets follow the
344 * definition of routing registers from the SiS-5595 southbridge.
345 * According to the SiS 5595 datasheets the revision id's of the
346 * router (ISA-bridge) should be 0x01 or 0xb0.
347 *
348 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
349 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
350 * They seem to work with the current routing code. However there is
351 * some concern because of the two USB-OHCI HCs (original SiS 5595
352 * had only one). YMMV.
353 *
354 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
355 *
356 * 0x61: IDEIRQ:
357 * bits [6:5] must be written 01
358 * bit 4 channel-select primary (0), secondary (1)
359 *
360 * 0x62: USBIRQ:
361 * bit 6 OHCI function disabled (0), enabled (1)
362 *
363 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
364 *
365 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
366 *
367 * We support USBIRQ (in addition to INTA-INTD) and keep the
368 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
369 *
370 * Currently the only reported exception is the new SiS 65x chipset
371 * which includes the SiS 69x southbridge. Here we have the 85C503
372 * router revision 0x04 and there are changes in the register layout
373 * mostly related to the different USB HCs with USB 2.0 support.
374 *
375 * Onchip routing for router rev-id 0x04 (try-and-error observation)
376 *
377 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
378 * bit 6-4 are probably unused, not like 5595
379 */
380
381#define PIRQ_SIS_IRQ_MASK 0x0f
382#define PIRQ_SIS_IRQ_DISABLE 0x80
383#define PIRQ_SIS_USB_ENABLE 0x40
384
385static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
386{
387 u8 x;
388 int reg;
389
390 reg = pirq;
391 if (reg >= 0x01 && reg <= 0x04)
392 reg += 0x40;
393 pci_read_config_byte(router, reg, &x);
394 return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
395}
396
397static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
398{
399 u8 x;
400 int reg;
401
402 reg = pirq;
403 if (reg >= 0x01 && reg <= 0x04)
404 reg += 0x40;
405 pci_read_config_byte(router, reg, &x);
406 x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
407 x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
408 pci_write_config_byte(router, reg, x);
409 return 1;
410}
411
412
413/*
414 * VLSI: nibble offset 0x74 - educated guess due to routing table and
415 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
416 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
417 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
418 * for the busbridge to the docking station.
419 */
420
421static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
422{
423 if (pirq > 8) {
424 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
425 return 0;
426 }
427 return read_config_nybble(router, 0x74, pirq-1);
428}
429
430static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
431{
432 if (pirq > 8) {
433 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
434 return 0;
435 }
436 write_config_nybble(router, 0x74, pirq-1, irq);
437 return 1;
438}
439
440/*
441 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
442 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
443 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
444 * register is a straight binary coding of desired PIC IRQ (low nibble).
445 *
446 * The 'link' value in the PIRQ table is already in the correct format
447 * for the Index register. There are some special index values:
448 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
449 * and 0x03 for SMBus.
450 */
451static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
452{
453 outb_p(pirq, 0xc00);
454 return inb(0xc01) & 0xf;
455}
456
457static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
458{
459 outb_p(pirq, 0xc00);
460 outb_p(irq, 0xc01);
461 return 1;
462}
463
464/* Support for AMD756 PCI IRQ Routing
465 * Jhon H. Caicedo <jhcaiced@osso.org.co>
466 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
467 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
468 * The AMD756 pirq rules are nibble-based
469 * offset 0x56 0-3 PIRQA 4-7 PIRQB
470 * offset 0x57 0-3 PIRQC 4-7 PIRQD
471 */
472static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
473{
474 u8 irq;
475 irq = 0;
476 if (pirq <= 4)
477 {
478 irq = read_config_nybble(router, 0x56, pirq - 1);
479 }
480 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
481 dev->vendor, dev->device, pirq, irq);
482 return irq;
483}
484
485static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
486{
487 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
488 dev->vendor, dev->device, pirq, irq);
489 if (pirq <= 4)
490 {
491 write_config_nybble(router, 0x56, pirq - 1, irq);
492 }
493 return 1;
494}
495
496#ifdef CONFIG_PCI_BIOS
497
498static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
499{
500 struct pci_dev *bridge;
501 int pin = pci_get_interrupt_pin(dev, &bridge);
502 return pcibios_set_irq_routing(bridge, pin, irq);
503}
504
505#endif
506
507static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
508{
509 static struct pci_device_id pirq_440gx[] = {
510 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
511 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
512 { },
513 };
514
515 /* 440GX has a proprietary PIRQ router -- don't use it */
516 if (pci_dev_present(pirq_440gx))
517 return 0;
518
519 switch(device)
520 {
521 case PCI_DEVICE_ID_INTEL_82371FB_0:
522 case PCI_DEVICE_ID_INTEL_82371SB_0:
523 case PCI_DEVICE_ID_INTEL_82371AB_0:
524 case PCI_DEVICE_ID_INTEL_82371MX:
525 case PCI_DEVICE_ID_INTEL_82443MX_0:
526 case PCI_DEVICE_ID_INTEL_82801AA_0:
527 case PCI_DEVICE_ID_INTEL_82801AB_0:
528 case PCI_DEVICE_ID_INTEL_82801BA_0:
529 case PCI_DEVICE_ID_INTEL_82801BA_10:
530 case PCI_DEVICE_ID_INTEL_82801CA_0:
531 case PCI_DEVICE_ID_INTEL_82801CA_12:
532 case PCI_DEVICE_ID_INTEL_82801DB_0:
533 case PCI_DEVICE_ID_INTEL_82801E_0:
534 case PCI_DEVICE_ID_INTEL_82801EB_0:
535 case PCI_DEVICE_ID_INTEL_ESB_1:
536 case PCI_DEVICE_ID_INTEL_ICH6_0:
537 case PCI_DEVICE_ID_INTEL_ICH6_1:
538 case PCI_DEVICE_ID_INTEL_ICH7_0:
539 case PCI_DEVICE_ID_INTEL_ICH7_1:
4d24a439
JG		 540 case PCI_DEVICE_ID_INTEL_ICH7_30:
541 case PCI_DEVICE_ID_INTEL_ICH7_31:
e285f809 542 case PCI_DEVICE_ID_INTEL_ESB2_0:
1da177e4
LT		 543 r->name = "PIIX/ICH";
544 r->get = pirq_piix_get;
545 r->set = pirq_piix_set;
546 return 1;
547 }
548 return 0;
549}
550
551static __init int via_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
552{
553 /* FIXME: We should move some of the quirk fixup stuff here */
ac12259f
GF		 554
555 if (router->device == PCI_DEVICE_ID_VIA_82C686 &&
556 device == PCI_DEVICE_ID_VIA_82C586_0) {
557 /* Asus k7m bios wrongly reports 82C686A as 586-compatible */
558 device = PCI_DEVICE_ID_VIA_82C686;
559 }
560
1da177e4
LT		 561 switch(device)
562 {
563 case PCI_DEVICE_ID_VIA_82C586_0:
80bb82af
AG		 564 r->name = "VIA";
565 r->get = pirq_via586_get;
566 r->set = pirq_via586_set;
567 return 1;
1da177e4
LT		 568 case PCI_DEVICE_ID_VIA_82C596:
569 case PCI_DEVICE_ID_VIA_82C686:
570 case PCI_DEVICE_ID_VIA_8231:
571 /* FIXME: add new ones for 8233/5 */
572 r->name = "VIA";
573 r->get = pirq_via_get;
574 r->set = pirq_via_set;
575 return 1;
576 }
577 return 0;
578}
579
580static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
581{
582 switch(device)
583 {
584 case PCI_DEVICE_ID_VLSI_82C534:
585 r->name = "VLSI 82C534";
586 r->get = pirq_vlsi_get;
587 r->set = pirq_vlsi_set;
588 return 1;
589 }
590 return 0;
591}
592
593
594static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
595{
596 switch(device)
597 {
598 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
599 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
600 r->name = "ServerWorks";
601 r->get = pirq_serverworks_get;
602 r->set = pirq_serverworks_set;
603 return 1;
604 }
605 return 0;
606}
607
608static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
609{
610 if (device != PCI_DEVICE_ID_SI_503)
611 return 0;
612
613 r->name = "SIS";
614 r->get = pirq_sis_get;
615 r->set = pirq_sis_set;
616 return 1;
617}
618
619static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
620{
621 switch(device)
622 {
623 case PCI_DEVICE_ID_CYRIX_5520:
624 r->name = "NatSemi";
625 r->get = pirq_cyrix_get;
626 r->set = pirq_cyrix_set;
627 return 1;
628 }
629 return 0;
630}
631
632static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
633{
634 switch(device)
635 {
636 case PCI_DEVICE_ID_OPTI_82C700:
637 r->name = "OPTI";
638 r->get = pirq_opti_get;
639 r->set = pirq_opti_set;
640 return 1;
641 }
642 return 0;
643}
644
645static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
646{
647 switch(device)
648 {
649 case PCI_DEVICE_ID_ITE_IT8330G_0:
650 r->name = "ITE";
651 r->get = pirq_ite_get;
652 r->set = pirq_ite_set;
653 return 1;
654 }
655 return 0;
656}
657
658static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
659{
660 switch(device)
661 {
662 case PCI_DEVICE_ID_AL_M1533:
663 case PCI_DEVICE_ID_AL_M1563:
664 printk("PCI: Using ALI IRQ Router\n");
665 r->name = "ALI";
666 r->get = pirq_ali_get;
667 r->set = pirq_ali_set;
668 return 1;
669 }
670 return 0;
671}
672
673static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
674{
675 switch(device)
676 {
677 case PCI_DEVICE_ID_AMD_VIPER_740B:
678 r->name = "AMD756";
679 break;
680 case PCI_DEVICE_ID_AMD_VIPER_7413:
681 r->name = "AMD766";
682 break;
683 case PCI_DEVICE_ID_AMD_VIPER_7443:
684 r->name = "AMD768";
685 break;
686 default:
687 return 0;
688 }
689 r->get = pirq_amd756_get;
690 r->set = pirq_amd756_set;
691 return 1;
692}
693
694static __initdata struct irq_router_handler pirq_routers[] = {
695 { PCI_VENDOR_ID_INTEL, intel_router_probe },
696 { PCI_VENDOR_ID_AL, ali_router_probe },
697 { PCI_VENDOR_ID_ITE, ite_router_probe },
698 { PCI_VENDOR_ID_VIA, via_router_probe },
699 { PCI_VENDOR_ID_OPTI, opti_router_probe },
700 { PCI_VENDOR_ID_SI, sis_router_probe },
701 { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
702 { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
703 { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
704 { PCI_VENDOR_ID_AMD, amd_router_probe },
705 /* Someone with docs needs to add the ATI Radeon IGP */
706 { 0, NULL }
707};
708static struct irq_router pirq_router;
709static struct pci_dev *pirq_router_dev;
710
711
712/*
713 * FIXME: should we have an option to say "generic for
714 * chipset" ?
715 */
716
717static void __init pirq_find_router(struct irq_router *r)
718{
719 struct irq_routing_table *rt = pirq_table;
720 struct irq_router_handler *h;
721
722#ifdef CONFIG_PCI_BIOS
723 if (!rt->signature) {
724 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
725 r->set = pirq_bios_set;
726 r->name = "BIOS";
727 return;
728 }
729#endif
730
731 /* Default unless a driver reloads it */
732 r->name = "default";
733 r->get = NULL;
734 r->set = NULL;
735
736 DBG("PCI: Attempting to find IRQ router for %04x:%04x\n",
737 rt->rtr_vendor, rt->rtr_device);
738
739 pirq_router_dev = pci_find_slot(rt->rtr_bus, rt->rtr_devfn);
740 if (!pirq_router_dev) {
741 DBG("PCI: Interrupt router not found at %02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
742 return;
743 }
744
745 for( h = pirq_routers; h->vendor; h++) {
746 /* First look for a router match */
747 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
748 break;
749 /* Fall back to a device match */
750 if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
751 break;
752 }
753 printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
754 pirq_router.name,
755 pirq_router_dev->vendor,
756 pirq_router_dev->device,
757 pci_name(pirq_router_dev));
758}
759
760static struct irq_info *pirq_get_info(struct pci_dev *dev)
761{
762 struct irq_routing_table *rt = pirq_table;
763 int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
764 struct irq_info *info;
765
766 for (info = rt->slots; entries--; info++)
767 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
768 return info;
769 return NULL;
770}
771
772static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
773{
774 u8 pin;
775 struct irq_info *info;
776 int i, pirq, newirq;
777 int irq = 0;
778 u32 mask;
779 struct irq_router *r = &pirq_router;
780 struct pci_dev *dev2 = NULL;
781 char *msg = NULL;
782
783 /* Find IRQ pin */
784 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
785 if (!pin) {
786 DBG(" -> no interrupt pin\n");
787 return 0;
788 }
789 pin = pin - 1;
790
791 /* Find IRQ routing entry */
792
793 if (!pirq_table)
794 return 0;
795
796 DBG("IRQ for %s[%c]", pci_name(dev), 'A' + pin);
797 info = pirq_get_info(dev);
798 if (!info) {
799 DBG(" -> not found in routing table\n");
800 return 0;
801 }
802 pirq = info->irq[pin].link;
803 mask = info->irq[pin].bitmap;
804 if (!pirq) {
805 DBG(" -> not routed\n");
806 return 0;
807 }
808 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
809 mask &= pcibios_irq_mask;
810
811 /* Work around broken HP Pavilion Notebooks which assign USB to
812 IRQ 9 even though it is actually wired to IRQ 11 */
813
814 if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
815 dev->irq = 11;
816 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
817 r->set(pirq_router_dev, dev, pirq, 11);
818 }
819
820 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
821 if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
822 pirq = 0x68;
823 mask = 0x400;
824 dev->irq = r->get(pirq_router_dev, dev, pirq);
825 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
826 }
827
828 /*
829 * Find the best IRQ to assign: use the one
830 * reported by the device if possible.
831 */
832 newirq = dev->irq;
833 if (!((1 << newirq) & mask)) {
834 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
835 else printk(KERN_WARNING "PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n", newirq, pci_name(dev));
836 }
837 if (!newirq && assign) {
838 for (i = 0; i < 16; i++) {
839 if (!(mask & (1 << i)))
840 continue;
841 if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, SA_SHIRQ))
842 newirq = i;
843 }
844 }
845 DBG(" -> newirq=%d", newirq);
846
847 /* Check if it is hardcoded */
848 if ((pirq & 0xf0) == 0xf0) {
849 irq = pirq & 0xf;
850 DBG(" -> hardcoded IRQ %d\n", irq);
851 msg = "Hardcoded";
852 } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
853 ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
854 DBG(" -> got IRQ %d\n", irq);
855 msg = "Found";
856 } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
857 DBG(" -> assigning IRQ %d", newirq);
858 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
859 eisa_set_level_irq(newirq);
860 DBG(" ... OK\n");
861 msg = "Assigned";
862 irq = newirq;
863 }
864 }
865
866 if (!irq) {
867 DBG(" ... failed\n");
868 if (newirq && mask == (1 << newirq)) {
869 msg = "Guessed";
870 irq = newirq;
871 } else
872 return 0;
873 }
874 printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
875
876 /* Update IRQ for all devices with the same pirq value */
877 while ((dev2 = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
878 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
879 if (!pin)
880 continue;
881 pin--;
882 info = pirq_get_info(dev2);
883 if (!info)
884 continue;
885 if (info->irq[pin].link == pirq) {
886 /* We refuse to override the dev->irq information. Give a warning! */
887 if ( dev2->irq && dev2->irq != irq && \
888 (!(pci_probe & PCI_USE_PIRQ_MASK) || \
889 ((1 << dev2->irq) & mask)) ) {
890#ifndef CONFIG_PCI_MSI
891 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
892 pci_name(dev2), dev2->irq, irq);
893#endif
894 continue;
895 }
896 dev2->irq = irq;
897 pirq_penalty[irq]++;
898 if (dev != dev2)
899 printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
900 }
901 }
902 return 1;
903}
904
905static void __init pcibios_fixup_irqs(void)
906{
907 struct pci_dev *dev = NULL;
908 u8 pin;
909
910 DBG("PCI: IRQ fixup\n");
911 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
912 /*
913 * If the BIOS has set an out of range IRQ number, just ignore it.
914 * Also keep track of which IRQ's are already in use.
915 */
916 if (dev->irq >= 16) {
917 DBG("%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
918 dev->irq = 0;
919 }
920 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
921 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
922 pirq_penalty[dev->irq] = 0;
923 pirq_penalty[dev->irq]++;
924 }
925
926 dev = NULL;
927 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
928 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
929#ifdef CONFIG_X86_IO_APIC
930 /*
931 * Recalculate IRQ numbers if we use the I/O APIC.
932 */
933 if (io_apic_assign_pci_irqs)
934 {
935 int irq;
936
937 if (pin) {
938 pin--; /* interrupt pins are numbered starting from 1 */
939 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
940 /*
941 * Busses behind bridges are typically not listed in the MP-table.
942 * In this case we have to look up the IRQ based on the parent bus,
943 * parent slot, and pin number. The SMP code detects such bridged
944 * busses itself so we should get into this branch reliably.
945 */
946 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
947 struct pci_dev * bridge = dev->bus->self;
948
949 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
950 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
951 PCI_SLOT(bridge->devfn), pin);
952 if (irq >= 0)
953 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
954 pci_name(bridge), 'A' + pin, irq);
955 }
956 if (irq >= 0) {
957 if (use_pci_vector() &&
958 !platform_legacy_irq(irq))
959 irq = IO_APIC_VECTOR(irq);
960
961 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
962 pci_name(dev), 'A' + pin, irq);
963 dev->irq = irq;
964 }
965 }
966 }
967#endif
968 /*
969 * Still no IRQ? Try to lookup one...
970 */
971 if (pin && !dev->irq)
972 pcibios_lookup_irq(dev, 0);
973 }
974}
975
976/*
977 * Work around broken HP Pavilion Notebooks which assign USB to
978 * IRQ 9 even though it is actually wired to IRQ 11
979 */
980static int __init fix_broken_hp_bios_irq9(struct dmi_system_id *d)
981{
982 if (!broken_hp_bios_irq9) {
983 broken_hp_bios_irq9 = 1;
984 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
985 }
986 return 0;
987}
988
989/*
990 * Work around broken Acer TravelMate 360 Notebooks which assign
991 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
992 */
993static int __init fix_acer_tm360_irqrouting(struct dmi_system_id *d)
994{
995 if (!acer_tm360_irqrouting) {
996 acer_tm360_irqrouting = 1;
997 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
998 }
999 return 0;
1000}
1001
1002static struct dmi_system_id __initdata pciirq_dmi_table[] = {
1003 {
1004 .callback = fix_broken_hp_bios_irq9,
1005 .ident = "HP Pavilion N5400 Series Laptop",
1006 .matches = {
1007 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1008 DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
1009 DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
1010 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
1011 },
1012 },
1013 {
1014 .callback = fix_acer_tm360_irqrouting,
1015 .ident = "Acer TravelMate 36x Laptop",
1016 .matches = {
1017 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1018 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1019 },
1020 },
1021 { }
1022};
1023
1024static int __init pcibios_irq_init(void)
1025{
1026 DBG("PCI: IRQ init\n");
1027
1028 if (pcibios_enable_irq || raw_pci_ops == NULL)
1029 return 0;
1030
1031 dmi_check_system(pciirq_dmi_table);
1032
1033 pirq_table = pirq_find_routing_table();
1034
1035#ifdef CONFIG_PCI_BIOS
1036 if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1037 pirq_table = pcibios_get_irq_routing_table();
1038#endif
1039 if (pirq_table) {
1040 pirq_peer_trick();
1041 pirq_find_router(&pirq_router);
1042 if (pirq_table->exclusive_irqs) {
1043 int i;
1044 for (i=0; i<16; i++)
1045 if (!(pirq_table->exclusive_irqs & (1 << i)))
1046 pirq_penalty[i] += 100;
1047 }
1048 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1049 if (io_apic_assign_pci_irqs)
1050 pirq_table = NULL;
1051 }
1052
1053 pcibios_enable_irq = pirq_enable_irq;
1054
1055 pcibios_fixup_irqs();
1056 return 0;
1057}
1058
1059subsys_initcall(pcibios_irq_init);
1060
1061
c9c3e457 1062static void pirq_penalize_isa_irq(int irq, int active)
1da177e4
LT		 1063{
1064 /*
1065 * If any ISAPnP device reports an IRQ in its list of possible
1066 * IRQ's, we try to avoid assigning it to PCI devices.
1067 */
c9c3e457
DSL		 1068 if (irq < 16) {
1069 if (active)
1070 pirq_penalty[irq] += 1000;
1071 else
1072 pirq_penalty[irq] += 100;
1073 }
1da177e4
LT		 1074}
1075
c9c3e457 1076void pcibios_penalize_isa_irq(int irq, int active)
1da177e4
LT		 1077{
1078#ifdef CONFIG_ACPI_PCI
1079 if (!acpi_noirq)
c9c3e457 1080 acpi_penalize_isa_irq(irq, active);
1da177e4
LT		 1081 else
1082#endif
c9c3e457 1083 pirq_penalize_isa_irq(irq, active);
1da177e4
LT		 1084}
1085
1086static int pirq_enable_irq(struct pci_dev *dev)
1087{
1088 u8 pin;
1da177e4
LT		 1089 struct pci_dev *temp_dev;
1090
1091 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1092 if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
1093 char *msg = "";
1094
1095 pin--; /* interrupt pins are numbered starting from 1 */
1096
1097 if (io_apic_assign_pci_irqs) {
1098 int irq;
1099
1100 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1101 /*
1102 * Busses behind bridges are typically not listed in the MP-table.
1103 * In this case we have to look up the IRQ based on the parent bus,
1104 * parent slot, and pin number. The SMP code detects such bridged
1105 * busses itself so we should get into this branch reliably.
1106 */
1107 temp_dev = dev;
1108 while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1109 struct pci_dev * bridge = dev->bus->self;
1110
1111 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1112 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1113 PCI_SLOT(bridge->devfn), pin);
1114 if (irq >= 0)
1115 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1116 pci_name(bridge), 'A' + pin, irq);
1117 dev = bridge;
1118 }
1119 dev = temp_dev;
1120 if (irq >= 0) {
1121#ifdef CONFIG_PCI_MSI
1122 if (!platform_legacy_irq(irq))
1123 irq = IO_APIC_VECTOR(irq);
1124#endif
1125 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1126 pci_name(dev), 'A' + pin, irq);
1127 dev->irq = irq;
1128 return 0;
1129 } else
1130 msg = " Probably buggy MP table.";
1131 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1132 msg = "";
1133 else
1134 msg = " Please try using pci=biosirq.";
1135
1136 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1137 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
1138 return 0;
1139
1140 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1141 'A' + pin, pci_name(dev), msg);
1142 }
1da177e4
LT		 1143 return 0;
1144}
1145
1146int pci_vector_resources(int last, int nr_released)
1147{
1148 int count = nr_released;
1149
1150 int next = last;
1151 int offset = (last % 8);
1152
1153 while (next < FIRST_SYSTEM_VECTOR) {
1154 next += 8;
1155#ifdef CONFIG_X86_64
1156 if (next == IA32_SYSCALL_VECTOR)
1157 continue;
1158#else
1159 if (next == SYSCALL_VECTOR)
1160 continue;
1161#endif
1162 count++;
1163 if (next >= FIRST_SYSTEM_VECTOR) {
1164 if (offset%8) {
1165 next = FIRST_DEVICE_VECTOR + offset;
1166 offset++;
1167 continue;
1168 }
1169 count--;
1170 }
1171 }
1172
1173 return count;
1174}
Linux kernel - Deliverables
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