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1da177e4 LT |
1 | /* |
2 | * Copyright (C) 2004 Matthew Wilcox <matthew@wil.cx> | |
3 | * Copyright (C) 2004 Intel Corp. | |
4 | * | |
5 | * This code is released under the GNU General Public License version 2. | |
6 | */ | |
7 | ||
8 | /* | |
9 | * mmconfig.c - Low-level direct PCI config space access via MMCONFIG | |
10 | */ | |
11 | ||
12 | #include <linux/pci.h> | |
13 | #include <linux/init.h> | |
54549391 | 14 | #include <linux/acpi.h> |
1da177e4 LT |
15 | #include "pci.h" |
16 | ||
1da177e4 LT |
17 | #define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG)) |
18 | ||
19 | /* The base address of the last MMCONFIG device accessed */ | |
20 | static u32 mmcfg_last_accessed_device; | |
21 | ||
22 | /* | |
23 | * Functions for accessing PCI configuration space with MMCONFIG accesses | |
24 | */ | |
25 | ||
26 | static inline void pci_exp_set_dev_base(int bus, int devfn) | |
27 | { | |
54549391 | 28 | u32 dev_base = pci_mmcfg_config[0].base_address | (bus << 20) | (devfn << 12); |
1da177e4 LT |
29 | if (dev_base != mmcfg_last_accessed_device) { |
30 | mmcfg_last_accessed_device = dev_base; | |
31 | set_fixmap_nocache(FIX_PCIE_MCFG, dev_base); | |
32 | } | |
33 | } | |
34 | ||
35 | static int pci_mmcfg_read(unsigned int seg, unsigned int bus, | |
36 | unsigned int devfn, int reg, int len, u32 *value) | |
37 | { | |
38 | unsigned long flags; | |
39 | ||
40 | if (!value || (bus > 255) || (devfn > 255) || (reg > 4095)) | |
41 | return -EINVAL; | |
42 | ||
43 | spin_lock_irqsave(&pci_config_lock, flags); | |
44 | ||
45 | pci_exp_set_dev_base(bus, devfn); | |
46 | ||
47 | switch (len) { | |
48 | case 1: | |
49 | *value = readb(mmcfg_virt_addr + reg); | |
50 | break; | |
51 | case 2: | |
52 | *value = readw(mmcfg_virt_addr + reg); | |
53 | break; | |
54 | case 4: | |
55 | *value = readl(mmcfg_virt_addr + reg); | |
56 | break; | |
57 | } | |
58 | ||
59 | spin_unlock_irqrestore(&pci_config_lock, flags); | |
60 | ||
61 | return 0; | |
62 | } | |
63 | ||
64 | static int pci_mmcfg_write(unsigned int seg, unsigned int bus, | |
65 | unsigned int devfn, int reg, int len, u32 value) | |
66 | { | |
67 | unsigned long flags; | |
68 | ||
69 | if ((bus > 255) || (devfn > 255) || (reg > 4095)) | |
70 | return -EINVAL; | |
71 | ||
72 | spin_lock_irqsave(&pci_config_lock, flags); | |
73 | ||
74 | pci_exp_set_dev_base(bus, devfn); | |
75 | ||
76 | switch (len) { | |
77 | case 1: | |
78 | writeb(value, mmcfg_virt_addr + reg); | |
79 | break; | |
80 | case 2: | |
81 | writew(value, mmcfg_virt_addr + reg); | |
82 | break; | |
83 | case 4: | |
84 | writel(value, mmcfg_virt_addr + reg); | |
85 | break; | |
86 | } | |
87 | ||
88 | spin_unlock_irqrestore(&pci_config_lock, flags); | |
89 | ||
90 | return 0; | |
91 | } | |
92 | ||
93 | static struct pci_raw_ops pci_mmcfg = { | |
94 | .read = pci_mmcfg_read, | |
95 | .write = pci_mmcfg_write, | |
96 | }; | |
97 | ||
98 | static int __init pci_mmcfg_init(void) | |
99 | { | |
100 | if ((pci_probe & PCI_PROBE_MMCONF) == 0) | |
101 | goto out; | |
54549391 GKH |
102 | |
103 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); | |
104 | if ((pci_mmcfg_config_num == 0) || | |
105 | (pci_mmcfg_config == NULL) || | |
106 | (pci_mmcfg_config[0].base_address == 0)) | |
1da177e4 LT |
107 | goto out; |
108 | ||
109 | /* Kludge for now. Don't use mmconfig on AMD systems because | |
110 | those have some busses where mmconfig doesn't work, | |
111 | and we don't parse ACPI MCFG well enough to handle that. | |
112 | Remove when proper handling is added. */ | |
113 | if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) | |
114 | goto out; | |
115 | ||
116 | printk(KERN_INFO "PCI: Using MMCONFIG\n"); | |
117 | raw_pci_ops = &pci_mmcfg; | |
118 | pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; | |
119 | ||
120 | out: | |
121 | return 0; | |
122 | } | |
123 | ||
124 | arch_initcall(pci_mmcfg_init); |