projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 62fdd767 FY |
1 | /* |
| 2 | * Dynamic DMA mapping support. | |
| 3 | */ | |
| 4 | ||
| 5 | #include <linux/types.h> | |
| 6 | #include <linux/mm.h> | |
| 7 | #include <linux/string.h> | |
| 8 | #include <linux/pci.h> | |
| 9 | #include <linux/module.h> | |
| 10 | #include <linux/dmar.h> | |
| 11 | #include <asm/iommu.h> | |
| 12 | #include <asm/machvec.h> | |
| 13 | #include <linux/dma-mapping.h> | |
| 14 | ||
| 62fdd767 FY |
15 | #include <asm/system.h> |
| 16 | ||
| 17 | #ifdef CONFIG_DMAR | |
| 18 | ||
| 19 | #include <linux/kernel.h> | |
| 62fdd767 FY |
20 | |
| 21 | #include <asm/page.h> | |
| 62fdd767 FY |
22 | |
| 23 | dma_addr_t bad_dma_address __read_mostly; | |
| 24 | EXPORT_SYMBOL(bad_dma_address); | |
| 25 | ||
| 26 | static int iommu_sac_force __read_mostly; | |
| 27 | ||
| 28 | int no_iommu __read_mostly; | |
| 29 | #ifdef CONFIG_IOMMU_DEBUG | |
| 30 | int force_iommu __read_mostly = 1; | |
| 31 | #else | |
| 32 | int force_iommu __read_mostly; | |
| 33 | #endif | |
| 34 | ||
| 62fdd767 FY |
35 | /* Dummy device used for NULL arguments (normally ISA). Better would |
| 36 | be probably a smaller DMA mask, but this is bug-to-bug compatible | |
| 37 | to i386. */ | |
| 38 | struct device fallback_dev = { | |
| 39 | .bus_id = "fallback device", | |
| 40 | .coherent_dma_mask = DMA_32BIT_MASK, | |
| 41 | .dma_mask = &fallback_dev.coherent_dma_mask, | |
| 42 | }; | |
| 43 | ||
| 4d9b977c FT |
44 | extern struct dma_mapping_ops vtd_dma_ops; |
| 45 | ||
| 62fdd767 FY |
46 | void __init pci_iommu_alloc(void) |
| 47 | { | |
| 4d9b977c | 48 | dma_ops = &vtd_dma_ops; |
| 62fdd767 FY |
49 | /* |
| 50 | * The order of these functions is important for | |
| 51 | * fall-back/fail-over reasons | |
| 52 | */ | |
| 53 | detect_intel_iommu(); | |
| 54 | ||
| 55 | #ifdef CONFIG_SWIOTLB | |
| 56 | pci_swiotlb_init(); | |
| 57 | #endif | |
| 58 | } | |
| 59 | ||
| 60 | static int __init pci_iommu_init(void) | |
| 61 | { | |
| 62 | if (iommu_detected) | |
| 63 | intel_iommu_init(); | |
| 64 | ||
| 65 | return 0; | |
| 66 | } | |
| 67 | ||
| 68 | /* Must execute after PCI subsystem */ | |
| 69 | fs_initcall(pci_iommu_init); | |
| 70 | ||
| 71 | void pci_iommu_shutdown(void) | |
| 72 | { | |
| 73 | return; | |
| 74 | } | |
| 75 | ||
| 76 | void __init | |
| 77 | iommu_dma_init(void) | |
| 78 | { | |
| 79 | return; | |
| 80 | } | |
| 81 | ||
| 62fdd767 FY |
82 | int iommu_dma_supported(struct device *dev, u64 mask) |
| 83 | { | |
| c190ab0b | 84 | struct dma_mapping_ops *ops = platform_dma_get_ops(dev); |
| 62fdd767 | 85 | |
| 62fdd767 FY |
86 | if (ops->dma_supported_op) |
| 87 | return ops->dma_supported_op(dev, mask); | |
| 88 | ||
| 89 | /* Copied from i386. Doesn't make much sense, because it will | |
| 90 | only work for pci_alloc_coherent. | |
| 91 | The caller just has to use GFP_DMA in this case. */ | |
| 92 | if (mask < DMA_24BIT_MASK) | |
| 93 | return 0; | |
| 94 | ||
| 95 | /* Tell the device to use SAC when IOMMU force is on. This | |
| 96 | allows the driver to use cheaper accesses in some cases. | |
| 97 | ||
| 98 | Problem with this is that if we overflow the IOMMU area and | |
| 99 | return DAC as fallback address the device may not handle it | |
| 100 | correctly. | |
| 101 | ||
| 102 | As a special case some controllers have a 39bit address | |
| 103 | mode that is as efficient as 32bit (aic79xx). Don't force | |
| 104 | SAC for these. Assume all masks <= 40 bits are of this | |
| 105 | type. Normally this doesn't make any difference, but gives | |
| 106 | more gentle handling of IOMMU overflow. */ | |
| 107 | if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) { | |
| 108 | dev_info(dev, "Force SAC with mask %lx\n", mask); | |
| 109 | return 0; | |
| 110 | } | |
| 111 | ||
| 112 | return 1; | |
| 113 | } | |
| 114 | EXPORT_SYMBOL(iommu_dma_supported); | |
| 115 | ||
| 116 | #endif |