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1da177e4 LT |
1 | /* |
2 | * linux/arch/ia64/kernel/time.c | |
3 | * | |
4 | * Copyright (C) 1998-2003 Hewlett-Packard Co | |
5 | * Stephane Eranian <eranian@hpl.hp.com> | |
6 | * David Mosberger <davidm@hpl.hp.com> | |
7 | * Copyright (C) 1999 Don Dugger <don.dugger@intel.com> | |
8 | * Copyright (C) 1999-2000 VA Linux Systems | |
9 | * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com> | |
10 | */ | |
1da177e4 LT |
11 | |
12 | #include <linux/cpu.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/profile.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/time.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/efi.h> | |
21 | #include <linux/profile.h> | |
22 | #include <linux/timex.h> | |
23 | ||
24 | #include <asm/machvec.h> | |
25 | #include <asm/delay.h> | |
26 | #include <asm/hw_irq.h> | |
27 | #include <asm/ptrace.h> | |
28 | #include <asm/sal.h> | |
29 | #include <asm/sections.h> | |
30 | #include <asm/system.h> | |
31 | ||
32 | extern unsigned long wall_jiffies; | |
33 | ||
ff741906 | 34 | volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */ |
1da177e4 LT |
35 | |
36 | #ifdef CONFIG_IA64_DEBUG_IRQ | |
37 | ||
38 | unsigned long last_cli_ip; | |
39 | EXPORT_SYMBOL(last_cli_ip); | |
40 | ||
41 | #endif | |
42 | ||
43 | static struct time_interpolator itc_interpolator = { | |
44 | .shift = 16, | |
45 | .mask = 0xffffffffffffffffLL, | |
46 | .source = TIME_SOURCE_CPU | |
47 | }; | |
48 | ||
49 | static irqreturn_t | |
50 | timer_interrupt (int irq, void *dev_id, struct pt_regs *regs) | |
51 | { | |
52 | unsigned long new_itm; | |
53 | ||
54 | if (unlikely(cpu_is_offline(smp_processor_id()))) { | |
55 | return IRQ_HANDLED; | |
56 | } | |
57 | ||
58 | platform_timer_interrupt(irq, dev_id, regs); | |
59 | ||
60 | new_itm = local_cpu_data->itm_next; | |
61 | ||
62 | if (!time_after(ia64_get_itc(), new_itm)) | |
63 | printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n", | |
64 | ia64_get_itc(), new_itm); | |
65 | ||
66 | profile_tick(CPU_PROFILING, regs); | |
67 | ||
68 | while (1) { | |
69 | update_process_times(user_mode(regs)); | |
70 | ||
71 | new_itm += local_cpu_data->itm_delta; | |
72 | ||
ff741906 | 73 | if (smp_processor_id() == time_keeper_id) { |
1da177e4 LT |
74 | /* |
75 | * Here we are in the timer irq handler. We have irqs locally | |
76 | * disabled, but we don't know if the timer_bh is running on | |
77 | * another CPU. We need to avoid to SMP race by acquiring the | |
78 | * xtime_lock. | |
79 | */ | |
80 | write_seqlock(&xtime_lock); | |
81 | do_timer(regs); | |
82 | local_cpu_data->itm_next = new_itm; | |
83 | write_sequnlock(&xtime_lock); | |
84 | } else | |
85 | local_cpu_data->itm_next = new_itm; | |
86 | ||
87 | if (time_after(new_itm, ia64_get_itc())) | |
88 | break; | |
89 | } | |
90 | ||
91 | do { | |
92 | /* | |
93 | * If we're too close to the next clock tick for | |
94 | * comfort, we increase the safety margin by | |
95 | * intentionally dropping the next tick(s). We do NOT | |
96 | * update itm.next because that would force us to call | |
97 | * do_timer() which in turn would let our clock run | |
98 | * too fast (with the potentially devastating effect | |
99 | * of losing monotony of time). | |
100 | */ | |
101 | while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2)) | |
102 | new_itm += local_cpu_data->itm_delta; | |
103 | ia64_set_itm(new_itm); | |
104 | /* double check, in case we got hit by a (slow) PMI: */ | |
105 | } while (time_after_eq(ia64_get_itc(), new_itm)); | |
106 | return IRQ_HANDLED; | |
107 | } | |
108 | ||
109 | /* | |
110 | * Encapsulate access to the itm structure for SMP. | |
111 | */ | |
112 | void | |
113 | ia64_cpu_local_tick (void) | |
114 | { | |
115 | int cpu = smp_processor_id(); | |
116 | unsigned long shift = 0, delta; | |
117 | ||
118 | /* arrange for the cycle counter to generate a timer interrupt: */ | |
119 | ia64_set_itv(IA64_TIMER_VECTOR); | |
120 | ||
121 | delta = local_cpu_data->itm_delta; | |
122 | /* | |
123 | * Stagger the timer tick for each CPU so they don't occur all at (almost) the | |
124 | * same time: | |
125 | */ | |
126 | if (cpu) { | |
127 | unsigned long hi = 1UL << ia64_fls(cpu); | |
128 | shift = (2*(cpu - hi) + 1) * delta/hi/2; | |
129 | } | |
130 | local_cpu_data->itm_next = ia64_get_itc() + delta + shift; | |
131 | ia64_set_itm(local_cpu_data->itm_next); | |
132 | } | |
133 | ||
134 | static int nojitter; | |
135 | ||
136 | static int __init nojitter_setup(char *str) | |
137 | { | |
138 | nojitter = 1; | |
139 | printk("Jitter checking for ITC timers disabled\n"); | |
140 | return 1; | |
141 | } | |
142 | ||
143 | __setup("nojitter", nojitter_setup); | |
144 | ||
145 | ||
146 | void __devinit | |
147 | ia64_init_itm (void) | |
148 | { | |
149 | unsigned long platform_base_freq, itc_freq; | |
150 | struct pal_freq_ratio itc_ratio, proc_ratio; | |
151 | long status, platform_base_drift, itc_drift; | |
152 | ||
153 | /* | |
154 | * According to SAL v2.6, we need to use a SAL call to determine the platform base | |
155 | * frequency and then a PAL call to determine the frequency ratio between the ITC | |
156 | * and the base frequency. | |
157 | */ | |
158 | status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM, | |
159 | &platform_base_freq, &platform_base_drift); | |
160 | if (status != 0) { | |
161 | printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status)); | |
162 | } else { | |
163 | status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio); | |
164 | if (status != 0) | |
165 | printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status); | |
166 | } | |
167 | if (status != 0) { | |
168 | /* invent "random" values */ | |
169 | printk(KERN_ERR | |
170 | "SAL/PAL failed to obtain frequency info---inventing reasonable values\n"); | |
171 | platform_base_freq = 100000000; | |
172 | platform_base_drift = -1; /* no drift info */ | |
173 | itc_ratio.num = 3; | |
174 | itc_ratio.den = 1; | |
175 | } | |
176 | if (platform_base_freq < 40000000) { | |
177 | printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n", | |
178 | platform_base_freq); | |
179 | platform_base_freq = 75000000; | |
180 | platform_base_drift = -1; | |
181 | } | |
182 | if (!proc_ratio.den) | |
183 | proc_ratio.den = 1; /* avoid division by zero */ | |
184 | if (!itc_ratio.den) | |
185 | itc_ratio.den = 1; /* avoid division by zero */ | |
186 | ||
187 | itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den; | |
188 | ||
189 | local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ; | |
2ab9391d | 190 | printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, " |
1da177e4 LT |
191 | "ITC freq=%lu.%03luMHz", smp_processor_id(), |
192 | platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000, | |
193 | itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000); | |
194 | ||
195 | if (platform_base_drift != -1) { | |
196 | itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den; | |
197 | printk("+/-%ldppm\n", itc_drift); | |
198 | } else { | |
199 | itc_drift = -1; | |
200 | printk("\n"); | |
201 | } | |
202 | ||
203 | local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den; | |
204 | local_cpu_data->itc_freq = itc_freq; | |
205 | local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC; | |
206 | local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT) | |
207 | + itc_freq/2)/itc_freq; | |
208 | ||
209 | if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { | |
210 | itc_interpolator.frequency = local_cpu_data->itc_freq; | |
211 | itc_interpolator.drift = itc_drift; | |
212 | #ifdef CONFIG_SMP | |
213 | /* On IA64 in an SMP configuration ITCs are never accurately synchronized. | |
214 | * Jitter compensation requires a cmpxchg which may limit | |
215 | * the scalability of the syscalls for retrieving time. | |
216 | * The ITC synchronization is usually successful to within a few | |
217 | * ITC ticks but this is not a sure thing. If you need to improve | |
218 | * timer performance in SMP situations then boot the kernel with the | |
219 | * "nojitter" option. However, doing so may result in time fluctuating (maybe | |
220 | * even going backward) if the ITC offsets between the individual CPUs | |
221 | * are too large. | |
222 | */ | |
223 | if (!nojitter) itc_interpolator.jitter = 1; | |
224 | #endif | |
225 | register_time_interpolator(&itc_interpolator); | |
226 | } | |
227 | ||
228 | /* Setup the CPU local timer tick */ | |
229 | ia64_cpu_local_tick(); | |
230 | } | |
231 | ||
232 | static struct irqaction timer_irqaction = { | |
233 | .handler = timer_interrupt, | |
121a4226 | 234 | .flags = IRQF_DISABLED, |
1da177e4 LT |
235 | .name = "timer" |
236 | }; | |
237 | ||
ff741906 AR |
238 | void __devinit ia64_disable_timer(void) |
239 | { | |
240 | ia64_set_itv(1 << 16); | |
241 | } | |
242 | ||
1da177e4 LT |
243 | void __init |
244 | time_init (void) | |
245 | { | |
246 | register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction); | |
247 | efi_gettimeofday(&xtime); | |
248 | ia64_init_itm(); | |
249 | ||
250 | /* | |
251 | * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the | |
252 | * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC). | |
253 | */ | |
254 | set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); | |
255 | } | |
f5899b5d | 256 | |
defbb2c9 | 257 | /* |
258 | * Generic udelay assumes that if preemption is allowed and the thread | |
259 | * migrates to another CPU, that the ITC values are synchronized across | |
260 | * all CPUs. | |
261 | */ | |
262 | static void | |
263 | ia64_itc_udelay (unsigned long usecs) | |
f5899b5d | 264 | { |
defbb2c9 | 265 | unsigned long start = ia64_get_itc(); |
266 | unsigned long end = start + usecs*local_cpu_data->cyc_per_usec; | |
f5899b5d | 267 | |
defbb2c9 | 268 | while (time_before(ia64_get_itc(), end)) |
269 | cpu_relax(); | |
270 | } | |
f5899b5d | 271 | |
defbb2c9 | 272 | void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay; |
f5899b5d | 273 | |
defbb2c9 | 274 | void |
275 | udelay (unsigned long usecs) | |
276 | { | |
277 | (*ia64_udelay)(usecs); | |
f5899b5d JH |
278 | } |
279 | EXPORT_SYMBOL(udelay); | |
d6e56a2a TL |
280 | |
281 | static unsigned long long ia64_itc_printk_clock(void) | |
282 | { | |
283 | if (ia64_get_kr(IA64_KR_PER_CPU_DATA)) | |
284 | return sched_clock(); | |
285 | return 0; | |
286 | } | |
287 | ||
288 | static unsigned long long ia64_default_printk_clock(void) | |
289 | { | |
290 | return (unsigned long long)(jiffies_64 - INITIAL_JIFFIES) * | |
291 | (1000000000/HZ); | |
292 | } | |
293 | ||
294 | unsigned long long (*ia64_printk_clock)(void) = &ia64_default_printk_clock; | |
295 | ||
296 | unsigned long long printk_clock(void) | |
297 | { | |
298 | return ia64_printk_clock(); | |
299 | } | |
300 | ||
301 | void __init | |
302 | ia64_setup_printk_clock(void) | |
303 | { | |
304 | if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) | |
305 | ia64_printk_clock = ia64_itc_printk_clock; | |
306 | } |