x86, pat: Sanity check remap_pfn_range for RAM region
[deliverable/linux.git] / arch / ia64 / kernel / vmlinux.lds.S
CommitLineData
1da177e4
LT
1
2#include <asm/cache.h>
3#include <asm/ptrace.h>
4#include <asm/system.h>
5#include <asm/pgtable.h>
6
1da177e4
LT
7#include <asm-generic/vmlinux.lds.h>
8
c7b645f9
KA
9#define IVT_TEXT \
10 VMLINUX_SYMBOL(__start_ivt_text) = .; \
11 *(.text.ivt) \
12 VMLINUX_SYMBOL(__end_ivt_text) = .;
13
1da177e4
LT
14OUTPUT_FORMAT("elf64-ia64-little")
15OUTPUT_ARCH(ia64)
16ENTRY(phys_start)
17jiffies = jiffies_64;
18PHDRS {
19 code PT_LOAD;
20 percpu PT_LOAD;
21 data PT_LOAD;
336cdba8 22 note PT_NOTE;
9bf77d0e 23 unwind 0x70000001; /* PT_IA_64_UNWIND, but ld doesn't match the name */
1da177e4
LT
24}
25SECTIONS
26{
27 /* Sections to be discarded */
28 /DISCARD/ : {
01ba2bdc
SR
29 EXIT_TEXT
30 EXIT_DATA
1da177e4
LT
31 *(.exitcall.exit)
32 *(.IA_64.unwind.exit.text)
33 *(.IA_64.unwind_info.exit.text)
34 }
35
36 v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
37 phys_start = _start - LOAD_OFFSET;
38
39 code : { } :code
40 . = KERNEL_START;
41
42 _text = .;
43 _stext = .;
44
45 .text : AT(ADDR(.text) - LOAD_OFFSET)
46 {
c7b645f9 47 IVT_TEXT
7664709b 48 TEXT_TEXT
1da177e4
LT
49 SCHED_TEXT
50 LOCK_TEXT
1f7ad57b 51 KPROBES_TEXT
1da177e4
LT
52 *(.gnu.linkonce.t*)
53 }
9d6f40b8
TL
54 .text.head : AT(ADDR(.text.head) - LOAD_OFFSET)
55 { *(.text.head) }
1da177e4
LT
56 .text2 : AT(ADDR(.text2) - LOAD_OFFSET)
57 { *(.text2) }
58#ifdef CONFIG_SMP
59 .text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
60 { *(.text.lock) }
61#endif
62 _etext = .;
63
64 /* Read-only data */
65
336cdba8
DMT
66 NOTES :code :note /* put .notes in text and mark in PT_NOTE */
67 code_continues : {} :code /* switch back to regular program... */
68
1da177e4
LT
69 /* Exception table */
70 . = ALIGN(16);
71 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
72 {
73 __start___ex_table = .;
74 *(__ex_table)
75 __stop___ex_table = .;
76 }
77
d89cfe7f
RA
78 /* MCA table */
79 . = ALIGN(16);
80 __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET)
81 {
82 __start___mca_table = .;
83 *(__mca_table)
84 __stop___mca_table = .;
85 }
86
a0776ec8
CK
87 .data.patch.phys_stack_reg : AT(ADDR(.data.patch.phys_stack_reg) - LOAD_OFFSET)
88 {
89 __start___phys_stack_reg_patchlist = .;
90 *(.data.patch.phys_stack_reg)
91 __end___phys_stack_reg_patchlist = .;
92 }
93
1da177e4
LT
94 /* Global data */
95 _data = .;
96
1da177e4
LT
97 /* Unwind info & table: */
98 . = ALIGN(8);
99 .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
100 { *(.IA_64.unwind_info*) }
101 .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
102 {
103 __start_unwind = .;
104 *(.IA_64.unwind*)
105 __end_unwind = .;
9bf77d0e
DMT
106 } :code :unwind
107 code_continues2 : {} : code
1da177e4
LT
108
109 RODATA
110
111 .opd : AT(ADDR(.opd) - LOAD_OFFSET)
112 { *(.opd) }
113
114 /* Initialization code and data: */
115
116 . = ALIGN(PAGE_SIZE);
117 __init_begin = .;
118 .init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
119 {
120 _sinittext = .;
01ba2bdc 121 INIT_TEXT
1da177e4
LT
122 _einittext = .;
123 }
124
125 .init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
01ba2bdc 126 { INIT_DATA }
1da177e4 127
67d38229 128#ifdef CONFIG_BLK_DEV_INITRD
1da177e4
LT
129 .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
130 {
131 __initramfs_start = .;
132 *(.init.ramfs)
133 __initramfs_end = .;
134 }
67d38229 135#endif
1da177e4
LT
136
137 . = ALIGN(16);
138 .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
139 {
140 __setup_start = .;
141 *(.init.setup)
142 __setup_end = .;
143 }
144 .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
145 {
146 __initcall_start = .;
61ce1efe 147 INITCALLS
1da177e4
LT
148 __initcall_end = .;
149 }
39e18de8
CK
150
151 .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
152 {
153 __start___vtop_patchlist = .;
154 *(.data.patch.vtop)
155 __end___vtop_patchlist = .;
156 }
157
4dcc29e1
TL
158 .data.patch.rse : AT(ADDR(.data.patch.rse) - LOAD_OFFSET)
159 {
160 __start___rse_patchlist = .;
161 *(.data.patch.rse)
162 __end___rse_patchlist = .;
163 }
164
39e18de8
CK
165 .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
166 {
167 __start___mckinley_e9_bundles = .;
168 *(.data.patch.mckinley_e9)
169 __end___mckinley_e9_bundles = .;
170 }
171
bf7ab02f
IY
172#if defined(CONFIG_PARAVIRT)
173 . = ALIGN(16);
174 .paravirt_bundles : AT(ADDR(.paravirt_bundles) - LOAD_OFFSET)
175 {
176 __start_paravirt_bundles = .;
177 *(.paravirt_bundles)
178 __stop_paravirt_bundles = .;
179 }
180 . = ALIGN(16);
181 .paravirt_insts : AT(ADDR(.paravirt_insts) - LOAD_OFFSET)
182 {
183 __start_paravirt_insts = .;
184 *(.paravirt_insts)
185 __stop_paravirt_insts = .;
186 }
187 . = ALIGN(16);
188 .paravirt_branches : AT(ADDR(.paravirt_branches) - LOAD_OFFSET)
189 {
190 __start_paravirt_branches = .;
191 *(.paravirt_branches)
192 __stop_paravirt_branches = .;
193 }
194#endif
195
39e18de8
CK
196#if defined(CONFIG_IA64_GENERIC)
197 /* Machine Vector */
198 . = ALIGN(16);
199 .machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
200 {
201 machvec_start = .;
202 *(.machvec)
203 machvec_end = .;
204 }
205#endif
206
d00195eb 207 . = ALIGN(8);
1da177e4
LT
208 __con_initcall_start = .;
209 .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
210 { *(.con_initcall.init) }
211 __con_initcall_end = .;
212 __security_initcall_start = .;
213 .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
214 { *(.security_initcall.init) }
215 __security_initcall_end = .;
216 . = ALIGN(PAGE_SIZE);
217 __init_end = .;
218
219 /* The initial task and kernel stack */
220 .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
221 { *(.data.init_task) }
222
223 .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
224 { *(__special_page_section)
225 __start_gate_section = .;
226 *(.data.gate)
227 __stop_gate_section = .;
b937dd76
IY
228#ifdef CONFIG_XEN
229 . = ALIGN(PAGE_SIZE);
230 __xen_start_gate_section = .;
231 *(.data.gate.xen)
232 __xen_stop_gate_section = .;
233#endif
1da177e4 234 }
df8f0ec1
AS
235 . = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose
236 * kernel data
237 */
1da177e4 238
dc86e88c
CL
239 .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
240 { *(.data.read_mostly) }
241
1da177e4
LT
242 .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
243 { *(.data.cacheline_aligned) }
244
245 /* Per-cpu data: */
1da177e4 246 . = ALIGN(PERCPU_PAGE_SIZE);
19390c4d
TH
247 PERCPU_VADDR(PERCPU_ADDR, :percpu)
248 __phys_per_cpu_start = __per_cpu_load;
df8f0ec1
AS
249 . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits
250 * into percpu page size
251 */
1da177e4
LT
252
253 data : { } :data
254 .data : AT(ADDR(.data) - LOAD_OFFSET)
ca967258 255 {
c459ce8b
TL
256#ifdef CONFIG_SMP
257 . = ALIGN(PERCPU_PAGE_SIZE);
258 __cpu0_per_cpu = .;
259 . = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */
260#endif
ca967258
SR
261 DATA_DATA
262 *(.data1)
263 *(.gnu.linkonce.d*)
264 CONSTRUCTORS
265 }
1da177e4
LT
266
267 . = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
268 .got : AT(ADDR(.got) - LOAD_OFFSET)
269 { *(.got.plt) *(.got) }
270 __gp = ADDR(.got) + 0x200000;
271 /* We want the small data sections together, so single-instruction offsets
272 can access them all, and initialized data all before uninitialized, so
273 we can shorten the on-disk segment size. */
274 .sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
275 { *(.sdata) *(.sdata1) *(.srdata) }
276 _edata = .;
b898a424 277 __bss_start = .;
1da177e4
LT
278 .sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
279 { *(.sbss) *(.scommon) }
280 .bss : AT(ADDR(.bss) - LOAD_OFFSET)
281 { *(.bss) *(COMMON) }
b898a424 282 __bss_stop = .;
1da177e4
LT
283
284 _end = .;
285
286 code : { } :code
287 /* Stabs debugging sections. */
288 .stab 0 : { *(.stab) }
289 .stabstr 0 : { *(.stabstr) }
290 .stab.excl 0 : { *(.stab.excl) }
291 .stab.exclstr 0 : { *(.stab.exclstr) }
292 .stab.index 0 : { *(.stab.index) }
293 .stab.indexstr 0 : { *(.stab.indexstr) }
294 /* DWARF debug sections.
295 Symbols in the DWARF debugging sections are relative to the beginning
296 of the section so we begin them at 0. */
297 /* DWARF 1 */
298 .debug 0 : { *(.debug) }
299 .line 0 : { *(.line) }
300 /* GNU DWARF 1 extensions */
301 .debug_srcinfo 0 : { *(.debug_srcinfo) }
302 .debug_sfnames 0 : { *(.debug_sfnames) }
303 /* DWARF 1.1 and DWARF 2 */
304 .debug_aranges 0 : { *(.debug_aranges) }
305 .debug_pubnames 0 : { *(.debug_pubnames) }
306 /* DWARF 2 */
307 .debug_info 0 : { *(.debug_info) }
308 .debug_abbrev 0 : { *(.debug_abbrev) }
309 .debug_line 0 : { *(.debug_line) }
310 .debug_frame 0 : { *(.debug_frame) }
311 .debug_str 0 : { *(.debug_str) }
312 .debug_loc 0 : { *(.debug_loc) }
313 .debug_macinfo 0 : { *(.debug_macinfo) }
314 /* SGI/MIPS DWARF 2 extensions */
315 .debug_weaknames 0 : { *(.debug_weaknames) }
316 .debug_funcnames 0 : { *(.debug_funcnames) }
317 .debug_typenames 0 : { *(.debug_typenames) }
318 .debug_varnames 0 : { *(.debug_varnames) }
319 /* These must appear regardless of . */
1da177e4
LT
320 /DISCARD/ : { *(.comment) }
321 /DISCARD/ : { *(.note) }
322}
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