[PATCH] Kprobes: prevent possible race conditions ia64 changes
[deliverable/linux.git] / arch / ia64 / kernel / vmlinux.lds.S
CommitLineData
1da177e4
LT
1#include <linux/config.h>
2
3#include <asm/cache.h>
4#include <asm/ptrace.h>
5#include <asm/system.h>
6#include <asm/pgtable.h>
7
8#define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE)
9#include <asm-generic/vmlinux.lds.h>
10
c7b645f9
KA
11#define IVT_TEXT \
12 VMLINUX_SYMBOL(__start_ivt_text) = .; \
13 *(.text.ivt) \
14 VMLINUX_SYMBOL(__end_ivt_text) = .;
15
1da177e4
LT
16OUTPUT_FORMAT("elf64-ia64-little")
17OUTPUT_ARCH(ia64)
18ENTRY(phys_start)
19jiffies = jiffies_64;
20PHDRS {
21 code PT_LOAD;
22 percpu PT_LOAD;
23 data PT_LOAD;
24}
25SECTIONS
26{
27 /* Sections to be discarded */
28 /DISCARD/ : {
29 *(.exit.text)
30 *(.exit.data)
31 *(.exitcall.exit)
32 *(.IA_64.unwind.exit.text)
33 *(.IA_64.unwind_info.exit.text)
34 }
35
36 v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
37 phys_start = _start - LOAD_OFFSET;
38
39 code : { } :code
40 . = KERNEL_START;
41
42 _text = .;
43 _stext = .;
44
45 .text : AT(ADDR(.text) - LOAD_OFFSET)
46 {
c7b645f9 47 IVT_TEXT
1da177e4
LT
48 *(.text)
49 SCHED_TEXT
50 LOCK_TEXT
1f7ad57b 51 KPROBES_TEXT
1da177e4
LT
52 *(.gnu.linkonce.t*)
53 }
54 .text2 : AT(ADDR(.text2) - LOAD_OFFSET)
55 { *(.text2) }
56#ifdef CONFIG_SMP
57 .text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
58 { *(.text.lock) }
59#endif
60 _etext = .;
61
62 /* Read-only data */
63
64 /* Exception table */
65 . = ALIGN(16);
66 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
67 {
68 __start___ex_table = .;
69 *(__ex_table)
70 __stop___ex_table = .;
71 }
72
73 .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
74 {
75 __start___vtop_patchlist = .;
76 *(.data.patch.vtop)
77 __end___vtop_patchlist = .;
78 }
79
80 .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
81 {
82 __start___mckinley_e9_bundles = .;
83 *(.data.patch.mckinley_e9)
84 __end___mckinley_e9_bundles = .;
85 }
86
87 /* Global data */
88 _data = .;
89
90#if defined(CONFIG_IA64_GENERIC)
91 /* Machine Vector */
92 . = ALIGN(16);
93 .machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
94 {
95 machvec_start = .;
96 *(.machvec)
97 machvec_end = .;
98 }
99#endif
100
101 /* Unwind info & table: */
102 . = ALIGN(8);
103 .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
104 { *(.IA_64.unwind_info*) }
105 .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
106 {
107 __start_unwind = .;
108 *(.IA_64.unwind*)
109 __end_unwind = .;
110 }
111
112 RODATA
113
114 .opd : AT(ADDR(.opd) - LOAD_OFFSET)
115 { *(.opd) }
116
117 /* Initialization code and data: */
118
119 . = ALIGN(PAGE_SIZE);
120 __init_begin = .;
121 .init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
122 {
123 _sinittext = .;
124 *(.init.text)
125 _einittext = .;
126 }
127
128 .init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
129 { *(.init.data) }
130
131 .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
132 {
133 __initramfs_start = .;
134 *(.init.ramfs)
135 __initramfs_end = .;
136 }
137
138 . = ALIGN(16);
139 .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
140 {
141 __setup_start = .;
142 *(.init.setup)
143 __setup_end = .;
144 }
145 .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
146 {
147 __initcall_start = .;
148 *(.initcall1.init)
149 *(.initcall2.init)
150 *(.initcall3.init)
151 *(.initcall4.init)
152 *(.initcall5.init)
153 *(.initcall6.init)
154 *(.initcall7.init)
155 __initcall_end = .;
156 }
157 __con_initcall_start = .;
158 .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
159 { *(.con_initcall.init) }
160 __con_initcall_end = .;
161 __security_initcall_start = .;
162 .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
163 { *(.security_initcall.init) }
164 __security_initcall_end = .;
165 . = ALIGN(PAGE_SIZE);
166 __init_end = .;
167
168 /* The initial task and kernel stack */
169 .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
170 { *(.data.init_task) }
171
172 .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
173 { *(__special_page_section)
174 __start_gate_section = .;
175 *(.data.gate)
176 __stop_gate_section = .;
177 }
178 . = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose kernel data */
179
180 .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
181 { *(.data.cacheline_aligned) }
182
183 /* Per-cpu data: */
184 percpu : { } :percpu
185 . = ALIGN(PERCPU_PAGE_SIZE);
186 __phys_per_cpu_start = .;
187 .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
188 {
189 __per_cpu_start = .;
190 *(.data.percpu)
191 __per_cpu_end = .;
192 }
193 . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits into percpu page size */
194
195 data : { } :data
196 .data : AT(ADDR(.data) - LOAD_OFFSET)
197 { *(.data) *(.data1) *(.gnu.linkonce.d*) CONSTRUCTORS }
198
199 . = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
200 .got : AT(ADDR(.got) - LOAD_OFFSET)
201 { *(.got.plt) *(.got) }
202 __gp = ADDR(.got) + 0x200000;
203 /* We want the small data sections together, so single-instruction offsets
204 can access them all, and initialized data all before uninitialized, so
205 we can shorten the on-disk segment size. */
206 .sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
207 { *(.sdata) *(.sdata1) *(.srdata) }
208 _edata = .;
209 _bss = .;
210 .sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
211 { *(.sbss) *(.scommon) }
212 .bss : AT(ADDR(.bss) - LOAD_OFFSET)
213 { *(.bss) *(COMMON) }
214
215 _end = .;
216
217 code : { } :code
218 /* Stabs debugging sections. */
219 .stab 0 : { *(.stab) }
220 .stabstr 0 : { *(.stabstr) }
221 .stab.excl 0 : { *(.stab.excl) }
222 .stab.exclstr 0 : { *(.stab.exclstr) }
223 .stab.index 0 : { *(.stab.index) }
224 .stab.indexstr 0 : { *(.stab.indexstr) }
225 /* DWARF debug sections.
226 Symbols in the DWARF debugging sections are relative to the beginning
227 of the section so we begin them at 0. */
228 /* DWARF 1 */
229 .debug 0 : { *(.debug) }
230 .line 0 : { *(.line) }
231 /* GNU DWARF 1 extensions */
232 .debug_srcinfo 0 : { *(.debug_srcinfo) }
233 .debug_sfnames 0 : { *(.debug_sfnames) }
234 /* DWARF 1.1 and DWARF 2 */
235 .debug_aranges 0 : { *(.debug_aranges) }
236 .debug_pubnames 0 : { *(.debug_pubnames) }
237 /* DWARF 2 */
238 .debug_info 0 : { *(.debug_info) }
239 .debug_abbrev 0 : { *(.debug_abbrev) }
240 .debug_line 0 : { *(.debug_line) }
241 .debug_frame 0 : { *(.debug_frame) }
242 .debug_str 0 : { *(.debug_str) }
243 .debug_loc 0 : { *(.debug_loc) }
244 .debug_macinfo 0 : { *(.debug_macinfo) }
245 /* SGI/MIPS DWARF 2 extensions */
246 .debug_weaknames 0 : { *(.debug_weaknames) }
247 .debug_funcnames 0 : { *(.debug_funcnames) }
248 .debug_typenames 0 : { *(.debug_typenames) }
249 .debug_varnames 0 : { *(.debug_varnames) }
250 /* These must appear regardless of . */
251 /* Discard them for now since Intel SoftSDV cannot handle them.
252 .comment 0 : { *(.comment) }
253 .note 0 : { *(.note) }
254 */
255 /DISCARD/ : { *(.comment) }
256 /DISCARD/ : { *(.note) }
257}
This page took 0.111098 seconds and 5 git commands to generate.