[deliverable/linux.git] / arch / ia64 / pci / fixup.c

/*
 * Exceptions for specific devices. Usually work-arounds for fatal design flaws.
 * Derived from fixup.c of i386 tree.
 */

#include <linux/pci.h>
#include <linux/init.h>
#include <linux/vgaarb.h>
#include <linux/screen_info.h>

#include <asm/machvec.h>

/*
 * Fixup to mark boot BIOS video selected by BIOS before it changes
 *
 * From information provided by "Jon Smirl" <jonsmirl@gmail.com>
 *
 * The standard boot ROM sequence for an x86 machine uses the BIOS
 * to select an initial video card for boot display. This boot video
 * card will have it's BIOS copied to C0000 in system RAM.
 * IORESOURCE_ROM_SHADOW is used to associate the boot video
 * card with this copy. On laptops this copy has to be used since
 * the main ROM may be compressed or combined with another image.
 * See pci_map_rom() for use of this flag. Before marking the device
 * with IORESOURCE_ROM_SHADOW check if a vga_default_device is already set
 * by either arch cde or vga-arbitration, if so only apply the fixup to this
 * already determined primary video card.
 */

static void pci_fixup_video(struct pci_dev *pdev)
{
	struct pci_dev *bridge;
	struct pci_bus *bus;
	u16 config;

	if ((strcmp(ia64_platform_name, "dig") != 0)
	    && (strcmp(ia64_platform_name, "hpzx1")  != 0))
		return;
	/* Maybe, this machine supports legacy memory map. */

	if (!vga_default_device()) {
		resource_size_t start, end;
		int i;

		/* Does firmware framebuffer belong to us? */
		for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
			if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
				continue;

			start = pci_resource_start(pdev, i);
			end  = pci_resource_end(pdev, i);

			if (!start || !end)
				continue;

			if (screen_info.lfb_base >= start &&
			    (screen_info.lfb_base + screen_info.lfb_size) < end)
				vga_set_default_device(pdev);
		}
	}

	/* Is VGA routed to us? */
	bus = pdev->bus;
	while (bus) {
		bridge = bus->self;

		/*
		 * From information provided by
		 * "David Miller" <davem@davemloft.net>
		 * The bridge control register is valid for PCI header
		 * type BRIDGE, or CARDBUS. Host to PCI controllers use
		 * PCI header type NORMAL.
		 */
		if (bridge && (pci_is_bridge(bridge))) {
			pci_read_config_word(bridge, PCI_BRIDGE_CONTROL,
						&config);
			if (!(config & PCI_BRIDGE_CTL_VGA))
				return;
		}
		bus = bus->parent;
	}
	if (!vga_default_device() || pdev == vga_default_device()) {
		pci_read_config_word(pdev, PCI_COMMAND, &config);
		if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
			pdev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW;
			dev_printk(KERN_DEBUG, &pdev->dev, "Boot video device\n");
			vga_set_default_device(pdev);
		}
	}
}
DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
				PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);
Commit	Line	Data
6b5c76b8 EO	1	/*
	2	* Exceptions for specific devices. Usually work-arounds for fatal design flaws.
	3	* Derived from fixup.c of i386 tree.
	4	*/
	5
	6	#include <linux/pci.h>
	7	#include <linux/init.h>
058a2e1b	8	#include <linux/vgaarb.h>
20cde694	9	#include <linux/screen_info.h>
6b5c76b8 EO	10
	11	#include <asm/machvec.h>
	12
	13	/*
	14	* Fixup to mark boot BIOS video selected by BIOS before it changes
	15	*
	16	* From information provided by "Jon Smirl" <jonsmirl@gmail.com>
	17	*
	18	* The standard boot ROM sequence for an x86 machine uses the BIOS
	19	* to select an initial video card for boot display. This boot video
	20	* card will have it's BIOS copied to C0000 in system RAM.
	21	* IORESOURCE_ROM_SHADOW is used to associate the boot video
	22	* card with this copy. On laptops this copy has to be used since
	23	* the main ROM may be compressed or combined with another image.
058a2e1b SE	24	* See pci_map_rom() for use of this flag. Before marking the device
	25	* with IORESOURCE_ROM_SHADOW check if a vga_default_device is already set
	26	* by either arch cde or vga-arbitration, if so only apply the fixup to this
	27	* already determined primary video card.
6b5c76b8 EO	28	*/
6b5c76b8 EO	29
5b5e76e9	30	static void pci_fixup_video(struct pci_dev *pdev)
6b5c76b8 EO	31	{
	32	struct pci_dev *bridge;
	33	struct pci_bus *bus;
	34	u16 config;
	35
f9445a38 FW	36	if ((strcmp(ia64_platform_name, "dig") != 0)
f9445a38 FW	37	&& (strcmp(ia64_platform_name, "hpzx1") != 0))
6b5c76b8 EO	38	return;
	39	/* Maybe, this machine supports legacy memory map. */
	40
20cde694 BP	41	if (!vga_default_device()) {
	42	resource_size_t start, end;
	43	int i;
	44
	45	/* Does firmware framebuffer belong to us? */
	46	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
	47	if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
	48	continue;
	49
	50	start = pci_resource_start(pdev, i);
	51	end = pci_resource_end(pdev, i);
	52
	53	if (!start \|\| !end)
	54	continue;
	55
	56	if (screen_info.lfb_base >= start &&
	57	(screen_info.lfb_base + screen_info.lfb_size) < end)
	58	vga_set_default_device(pdev);
	59	}
	60	}
	61
6b5c76b8 EO	62	/* Is VGA routed to us? */
	63	bus = pdev->bus;
	64	while (bus) {
	65	bridge = bus->self;
	66
	67	/*
	68	* From information provided by
	69	* "David Miller" <davem@davemloft.net>
	70	* The bridge control register is valid for PCI header
	71	* type BRIDGE, or CARDBUS. Host to PCI controllers use
	72	* PCI header type NORMAL.
	73	*/
11a3bd09	74	if (bridge && (pci_is_bridge(bridge))) {
6b5c76b8 EO	75	pci_read_config_word(bridge, PCI_BRIDGE_CONTROL,
	76	&config);
	77	if (!(config & PCI_BRIDGE_CTL_VGA))
	78	return;
	79	}
	80	bus = bus->parent;
	81	}
058a2e1b SE	82	if (!vga_default_device() \|\| pdev == vga_default_device()) {
	83	pci_read_config_word(pdev, PCI_COMMAND, &config);
	84	if (config & (PCI_COMMAND_IO \| PCI_COMMAND_MEMORY)) {
	85	pdev->resource[PCI_ROM_RESOURCE].flags \|= IORESOURCE_ROM_SHADOW;
	86	dev_printk(KERN_DEBUG, &pdev->dev, "Boot video device\n");
	87	vga_set_default_device(pdev);
	88	}
6b5c76b8 EO	89	}
6b5c76b8 EO	90	}
058a2e1b SE	91	DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
058a2e1b SE	92	PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);