[deliverable/linux.git] / arch / ia64 / sn / kernel / msi_sn.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2006 Silicon Graphics, Inc.  All Rights Reserved.
 */

#include <linux/types.h>
#include <linux/irq.h>
#include <linux/pci.h>
#include <linux/cpumask.h>
#include <linux/msi.h>

#include <asm/sn/addrs.h>
#include <asm/sn/intr.h>
#include <asm/sn/pcibus_provider_defs.h>
#include <asm/sn/pcidev.h>
#include <asm/sn/nodepda.h>

struct sn_msi_info {
	u64 pci_addr;
	struct sn_irq_info *sn_irq_info;
};

static struct sn_msi_info sn_msi_info[NR_IRQS];

static struct irq_chip sn_msi_chip;

void sn_teardown_msi_irq(unsigned int irq)
{
	nasid_t nasid;
	int widget;
	struct pci_dev *pdev;
	struct pcidev_info *sn_pdev;
	struct sn_irq_info *sn_irq_info;
	struct pcibus_bussoft *bussoft;
	struct sn_pcibus_provider *provider;

	sn_irq_info = sn_msi_info[irq].sn_irq_info;
	if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
		return;

	sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
	pdev = sn_pdev->pdi_linux_pcidev;
	provider = SN_PCIDEV_BUSPROVIDER(pdev);

	(*provider->dma_unmap)(pdev,
			       sn_msi_info[irq].pci_addr,
			       PCI_DMA_FROMDEVICE);
	sn_msi_info[irq].pci_addr = 0;

	bussoft = SN_PCIDEV_BUSSOFT(pdev);
	nasid = NASID_GET(bussoft->bs_base);
	widget = (nasid & 1) ?
			TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
			SWIN_WIDGETNUM(bussoft->bs_base);

	sn_intr_free(nasid, widget, sn_irq_info);
	sn_msi_info[irq].sn_irq_info = NULL;

	destroy_irq(irq);
}

int sn_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *entry)
{
	struct msi_msg msg;
	int widget;
	int status;
	nasid_t nasid;
	u64 bus_addr;
	struct sn_irq_info *sn_irq_info;
	struct pcibus_bussoft *bussoft = SN_PCIDEV_BUSSOFT(pdev);
	struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
	int irq;

	if (!entry->msi_attrib.is_64)
		return -EINVAL;

	if (bussoft == NULL)
		return -EINVAL;

	if (provider == NULL || provider->dma_map_consistent == NULL)
		return -EINVAL;

	irq = create_irq();
	if (irq < 0)
		return irq;

	set_irq_msi(irq, entry);
	/*
	 * Set up the vector plumbing.  Let the prom (via sn_intr_alloc)
	 * decide which cpu to direct this msi at by default.
	 */

	nasid = NASID_GET(bussoft->bs_base);
	widget = (nasid & 1) ?
			TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
			SWIN_WIDGETNUM(bussoft->bs_base);

	sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
	if (! sn_irq_info) {
		destroy_irq(irq);
		return -ENOMEM;
	}

	status = sn_intr_alloc(nasid, widget, sn_irq_info, irq, -1, -1);
	if (status) {
		kfree(sn_irq_info);
		destroy_irq(irq);
		return -ENOMEM;
	}

	sn_irq_info->irq_int_bit = -1;		/* mark this as an MSI irq */
	sn_irq_fixup(pdev, sn_irq_info);

	/* Prom probably should fill these in, but doesn't ... */
	sn_irq_info->irq_bridge_type = bussoft->bs_asic_type;
	sn_irq_info->irq_bridge = (void *)bussoft->bs_base;

	/*
	 * Map the xio address into bus space
	 */
	bus_addr = (*provider->dma_map_consistent)(pdev,
					sn_irq_info->irq_xtalkaddr,
					sizeof(sn_irq_info->irq_xtalkaddr),
					SN_DMA_MSI|SN_DMA_ADDR_XIO);
	if (! bus_addr) {
		sn_intr_free(nasid, widget, sn_irq_info);
		kfree(sn_irq_info);
		destroy_irq(irq);
		return -ENOMEM;
	}

	sn_msi_info[irq].sn_irq_info = sn_irq_info;
	sn_msi_info[irq].pci_addr = bus_addr;

	msg.address_hi = (u32)(bus_addr >> 32);
	msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);

	/*
	 * In the SN platform, bit 16 is a "send vector" bit which
	 * must be present in order to move the vector through the system.
	 */
	msg.data = 0x100 + irq;

	write_msi_msg(irq, &msg);
	set_irq_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq);

	return irq;
}

#ifdef CONFIG_SMP
static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
{
	struct msi_msg msg;
	int slice;
	nasid_t nasid;
	u64 bus_addr;
	struct pci_dev *pdev;
	struct pcidev_info *sn_pdev;
	struct sn_irq_info *sn_irq_info;
	struct sn_irq_info *new_irq_info;
	struct sn_pcibus_provider *provider;
	unsigned int cpu;

	cpu = first_cpu(cpu_mask);
	sn_irq_info = sn_msi_info[irq].sn_irq_info;
	if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
		return;

	/*
	 * Release XIO resources for the old MSI PCI address
	 */

	read_msi_msg(irq, &msg);
        sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
	pdev = sn_pdev->pdi_linux_pcidev;
	provider = SN_PCIDEV_BUSPROVIDER(pdev);

	bus_addr = (u64)(msg.address_hi) << 32 | (u64)(msg.address_lo);
	(*provider->dma_unmap)(pdev, bus_addr, PCI_DMA_FROMDEVICE);
	sn_msi_info[irq].pci_addr = 0;

	nasid = cpuid_to_nasid(cpu);
	slice = cpuid_to_slice(cpu);

	new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice);
	sn_msi_info[irq].sn_irq_info = new_irq_info;
	if (new_irq_info == NULL)
		return;

	/*
	 * Map the xio address into bus space
	 */

	bus_addr = (*provider->dma_map_consistent)(pdev,
					new_irq_info->irq_xtalkaddr,
					sizeof(new_irq_info->irq_xtalkaddr),
					SN_DMA_MSI|SN_DMA_ADDR_XIO);

	sn_msi_info[irq].pci_addr = bus_addr;
	msg.address_hi = (u32)(bus_addr >> 32);
	msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);

	write_msi_msg(irq, &msg);
	irq_desc[irq].affinity = cpu_mask;
}
#endif /* CONFIG_SMP */

static void sn_ack_msi_irq(unsigned int irq)
{
	move_native_irq(irq);
	ia64_eoi();
}

static int sn_msi_retrigger_irq(unsigned int irq)
{
	unsigned int vector = irq;
	ia64_resend_irq(vector);

	return 1;
}

static struct irq_chip sn_msi_chip = {
	.name		= "PCI-MSI",
	.mask		= mask_msi_irq,
	.unmask		= unmask_msi_irq,
	.ack		= sn_ack_msi_irq,
#ifdef CONFIG_SMP
	.set_affinity	= sn_set_msi_irq_affinity,
#endif
	.retrigger	= sn_msi_retrigger_irq,
};
Commit	Line	Data
fd58e55f MM	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 2006 Silicon Graphics, Inc. All Rights Reserved.
	7	*/
	8
83821d3f	9	#include <linux/types.h>
3b7d1921	10	#include <linux/irq.h>
83821d3f MM	11	#include <linux/pci.h>
83821d3f MM	12	#include <linux/cpumask.h>
3b7d1921	13	#include <linux/msi.h>
83821d3f MM	14
	15	#include <asm/sn/addrs.h>
	16	#include <asm/sn/intr.h>
	17	#include <asm/sn/pcibus_provider_defs.h>
	18	#include <asm/sn/pcidev.h>
	19	#include <asm/sn/nodepda.h>
	20
83821d3f MM	21	struct sn_msi_info {
	22	u64 pci_addr;
	23	struct sn_irq_info *sn_irq_info;
	24	};
	25
3b7d1921 EB	26	static struct sn_msi_info sn_msi_info[NR_IRQS];
	27
	28	static struct irq_chip sn_msi_chip;
83821d3f	29
3b7d1921	30	void sn_teardown_msi_irq(unsigned int irq)
83821d3f MM	31	{
	32	nasid_t nasid;
	33	int widget;
	34	struct pci_dev *pdev;
	35	struct pcidev_info *sn_pdev;
	36	struct sn_irq_info *sn_irq_info;
	37	struct pcibus_bussoft *bussoft;
	38	struct sn_pcibus_provider *provider;
	39
38bc0361	40	sn_irq_info = sn_msi_info[irq].sn_irq_info;
83821d3f MM	41	if (sn_irq_info == NULL \|\| sn_irq_info->irq_int_bit >= 0)
	42	return;
	43
	44	sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
	45	pdev = sn_pdev->pdi_linux_pcidev;
	46	provider = SN_PCIDEV_BUSPROVIDER(pdev);
	47
	48	(*provider->dma_unmap)(pdev,
38bc0361	49	sn_msi_info[irq].pci_addr,
83821d3f	50	PCI_DMA_FROMDEVICE);
38bc0361	51	sn_msi_info[irq].pci_addr = 0;
83821d3f MM	52
	53	bussoft = SN_PCIDEV_BUSSOFT(pdev);
	54	nasid = NASID_GET(bussoft->bs_base);
	55	widget = (nasid & 1) ?
	56	TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
	57	SWIN_WIDGETNUM(bussoft->bs_base);
	58
	59	sn_intr_free(nasid, widget, sn_irq_info);
38bc0361	60	sn_msi_info[irq].sn_irq_info = NULL;
83821d3f	61
f7feaca7	62	destroy_irq(irq);
83821d3f	63	}
fd58e55f	64
f7feaca7	65	int sn_setup_msi_irq(struct pci_dev pdev, struct msi_desc entry)
fd58e55f	66	{
3b7d1921	67	struct msi_msg msg;
83821d3f MM	68	int widget;
	69	int status;
	70	nasid_t nasid;
	71	u64 bus_addr;
	72	struct sn_irq_info *sn_irq_info;
	73	struct pcibus_bussoft *bussoft = SN_PCIDEV_BUSSOFT(pdev);
	74	struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
f7feaca7	75	int irq;
83821d3f	76
3b7d1921 EB	77	if (!entry->msi_attrib.is_64)
	78	return -EINVAL;
	79
83821d3f MM	80	if (bussoft == NULL)
	81	return -EINVAL;
	82
	83	if (provider == NULL \|\| provider->dma_map_consistent == NULL)
	84	return -EINVAL;
	85
f7feaca7 EB	86	irq = create_irq();
	87	if (irq < 0)
	88	return irq;
	89
	90	set_irq_msi(irq, entry);
83821d3f MM	91	/*
	92	* Set up the vector plumbing. Let the prom (via sn_intr_alloc)
	93	* decide which cpu to direct this msi at by default.
	94	*/
	95
	96	nasid = NASID_GET(bussoft->bs_base);
	97	widget = (nasid & 1) ?
	98	TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
	99	SWIN_WIDGETNUM(bussoft->bs_base);
	100
	101	sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
f7feaca7 EB	102	if (! sn_irq_info) {
f7feaca7 EB	103	destroy_irq(irq);
83821d3f	104	return -ENOMEM;
f7feaca7	105	}
83821d3f	106
38bc0361	107	status = sn_intr_alloc(nasid, widget, sn_irq_info, irq, -1, -1);
83821d3f MM	108	if (status) {
83821d3f MM	109	kfree(sn_irq_info);
f7feaca7	110	destroy_irq(irq);
83821d3f MM	111	return -ENOMEM;
	112	}
	113
	114	sn_irq_info->irq_int_bit = -1; /* mark this as an MSI irq */
	115	sn_irq_fixup(pdev, sn_irq_info);
	116
	117	/* Prom probably should fill these in, but doesn't ... */
	118	sn_irq_info->irq_bridge_type = bussoft->bs_asic_type;
	119	sn_irq_info->irq_bridge = (void *)bussoft->bs_base;
	120
fd58e55f	121	/*
83821d3f	122	* Map the xio address into bus space
fd58e55f	123	*/
83821d3f MM	124	bus_addr = (*provider->dma_map_consistent)(pdev,
	125	sn_irq_info->irq_xtalkaddr,
	126	sizeof(sn_irq_info->irq_xtalkaddr),
	127	SN_DMA_MSI\|SN_DMA_ADDR_XIO);
	128	if (! bus_addr) {
	129	sn_intr_free(nasid, widget, sn_irq_info);
	130	kfree(sn_irq_info);
f7feaca7	131	destroy_irq(irq);
83821d3f MM	132	return -ENOMEM;
	133	}
	134
38bc0361 EB	135	sn_msi_info[irq].sn_irq_info = sn_irq_info;
38bc0361 EB	136	sn_msi_info[irq].pci_addr = bus_addr;
83821d3f	137
3b7d1921 EB	138	msg.address_hi = (u32)(bus_addr >> 32);
3b7d1921 EB	139	msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
83821d3f MM	140
	141	/*
	142	* In the SN platform, bit 16 is a "send vector" bit which
	143	* must be present in order to move the vector through the system.
	144	*/
3b7d1921	145	msg.data = 0x100 + irq;
83821d3f	146
3b7d1921 EB	147	write_msi_msg(irq, &msg);
	148	set_irq_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq);
	149
f7feaca7	150	return irq;
83821d3f MM	151	}
83821d3f MM	152
3b7d1921 EB	153	#ifdef CONFIG_SMP
3b7d1921 EB	154	static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
83821d3f	155	{
3b7d1921	156	struct msi_msg msg;
83821d3f MM	157	int slice;
	158	nasid_t nasid;
	159	u64 bus_addr;
	160	struct pci_dev *pdev;
	161	struct pcidev_info *sn_pdev;
	162	struct sn_irq_info *sn_irq_info;
	163	struct sn_irq_info *new_irq_info;
	164	struct sn_pcibus_provider *provider;
38bc0361	165	unsigned int cpu;
83821d3f	166
38bc0361 EB	167	cpu = first_cpu(cpu_mask);
38bc0361 EB	168	sn_irq_info = sn_msi_info[irq].sn_irq_info;
83821d3f MM	169	if (sn_irq_info == NULL \|\| sn_irq_info->irq_int_bit >= 0)
	170	return;
	171
	172	/*
	173	* Release XIO resources for the old MSI PCI address
	174	*/
	175
3b7d1921	176	read_msi_msg(irq, &msg);
83821d3f MM	177	sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
	178	pdev = sn_pdev->pdi_linux_pcidev;
	179	provider = SN_PCIDEV_BUSPROVIDER(pdev);
	180
3b7d1921	181	bus_addr = (u64)(msg.address_hi) << 32 \| (u64)(msg.address_lo);
83821d3f	182	(*provider->dma_unmap)(pdev, bus_addr, PCI_DMA_FROMDEVICE);
38bc0361	183	sn_msi_info[irq].pci_addr = 0;
83821d3f MM	184
	185	nasid = cpuid_to_nasid(cpu);
	186	slice = cpuid_to_slice(cpu);
	187
	188	new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice);
38bc0361	189	sn_msi_info[irq].sn_irq_info = new_irq_info;
83821d3f MM	190	if (new_irq_info == NULL)
	191	return;
	192
	193	/*
	194	* Map the xio address into bus space
	195	*/
	196
	197	bus_addr = (*provider->dma_map_consistent)(pdev,
	198	new_irq_info->irq_xtalkaddr,
	199	sizeof(new_irq_info->irq_xtalkaddr),
	200	SN_DMA_MSI\|SN_DMA_ADDR_XIO);
	201
38bc0361	202	sn_msi_info[irq].pci_addr = bus_addr;
3b7d1921 EB	203	msg.address_hi = (u32)(bus_addr >> 32);
	204	msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
	205
	206	write_msi_msg(irq, &msg);
9f0a5ba5	207	irq_desc[irq].affinity = cpu_mask;
83821d3f	208	}
3b7d1921	209	#endif /* CONFIG_SMP */
83821d3f	210
3b7d1921 EB	211	static void sn_ack_msi_irq(unsigned int irq)
	212	{
	213	move_native_irq(irq);
	214	ia64_eoi();
	215	}
83821d3f	216
3b7d1921	217	static int sn_msi_retrigger_irq(unsigned int irq)
83821d3f	218	{
3b7d1921 EB	219	unsigned int vector = irq;
3b7d1921 EB	220	ia64_resend_irq(vector);
83821d3f	221
3b7d1921	222	return 1;
fd58e55f	223	}
3b7d1921 EB	224
	225	static struct irq_chip sn_msi_chip = {
	226	.name = "PCI-MSI",
	227	.mask = mask_msi_irq,
	228	.unmask = unmask_msi_irq,
	229	.ack = sn_ack_msi_irq,
	230	#ifdef CONFIG_SMP
	231	.set_affinity = sn_set_msi_irq_affinity,
	232	#endif
	233	.retrigger = sn_msi_retrigger_irq,
	234	};