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1da177e4 LT |
1 | /* |
2 | * linux/arch/ia64/sn/kernel/sn2/timer.c | |
3 | * | |
4 | * Copyright (C) 2003 Silicon Graphics, Inc. | |
5 | * Copyright (C) 2003 Hewlett-Packard Co | |
6 | * David Mosberger <davidm@hpl.hp.com>: updated for new timer-interpolation infrastructure | |
7 | */ | |
8 | ||
9 | #include <linux/init.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/sched.h> | |
12 | #include <linux/time.h> | |
13 | #include <linux/interrupt.h> | |
0aa366f3 | 14 | #include <linux/clocksource.h> |
1da177e4 LT |
15 | |
16 | #include <asm/hw_irq.h> | |
17 | #include <asm/system.h> | |
defbb2c9 | 18 | #include <asm/timex.h> |
1da177e4 LT |
19 | |
20 | #include <asm/sn/leds.h> | |
21 | #include <asm/sn/shub_mmr.h> | |
22 | #include <asm/sn/clksupport.h> | |
23 | ||
24 | extern unsigned long sn_rtc_cycles_per_second; | |
25 | ||
8e19608e | 26 | static cycle_t read_sn2(struct clocksource *cs) |
0aa366f3 | 27 | { |
40d48575 | 28 | return (cycle_t)readq(RTC_COUNTER_ADDR); |
0aa366f3 TL |
29 | } |
30 | ||
31 | static struct clocksource clocksource_sn2 = { | |
32 | .name = "sn2_rtc", | |
40d48575 | 33 | .rating = 450, |
0aa366f3 TL |
34 | .read = read_sn2, |
35 | .mask = (1LL << 55) - 1, | |
36 | .mult = 0, | |
37 | .shift = 10, | |
38 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
1da177e4 LT |
39 | }; |
40 | ||
defbb2c9 | 41 | /* |
42 | * sn udelay uses the RTC instead of the ITC because the ITC is not | |
43 | * synchronized across all CPUs, and the thread may migrate to another CPU | |
44 | * if preemption is enabled. | |
45 | */ | |
46 | static void | |
47 | ia64_sn_udelay (unsigned long usecs) | |
48 | { | |
49 | unsigned long start = rtc_time(); | |
50 | unsigned long end = start + | |
51 | usecs * sn_rtc_cycles_per_second / 1000000; | |
52 | ||
53 | while (time_before((unsigned long)rtc_time(), end)) | |
54 | cpu_relax(); | |
55 | } | |
56 | ||
1da177e4 LT |
57 | void __init sn_timer_init(void) |
58 | { | |
0aa366f3 TL |
59 | clocksource_sn2.fsys_mmio = RTC_COUNTER_ADDR; |
60 | clocksource_sn2.mult = clocksource_hz2mult(sn_rtc_cycles_per_second, | |
61 | clocksource_sn2.shift); | |
62 | clocksource_register(&clocksource_sn2); | |
defbb2c9 | 63 | |
64 | ia64_udelay = &ia64_sn_udelay; | |
1da177e4 | 65 | } |