[deliverable/linux.git] / arch / m68k / apollo / config.c

#include <linux/init.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/rtc.h>
#include <linux/vt_kern.h>
#include <linux/interrupt.h>

#include <asm/setup.h>
#include <asm/bootinfo.h>
#include <asm/bootinfo-apollo.h>
#include <asm/byteorder.h>
#include <asm/pgtable.h>
#include <asm/apollohw.h>
#include <asm/irq.h>
#include <asm/rtc.h>
#include <asm/machdep.h>

u_long sio01_physaddr;
u_long sio23_physaddr;
u_long rtc_physaddr;
u_long pica_physaddr;
u_long picb_physaddr;
u_long cpuctrl_physaddr;
u_long timer_physaddr;
u_long apollo_model;

extern void dn_sched_init(irq_handler_t handler);
extern void dn_init_IRQ(void);
extern u32 dn_gettimeoffset(void);
extern int dn_dummy_hwclk(int, struct rtc_time *);
extern int dn_dummy_set_clock_mmss(unsigned long);
extern void dn_dummy_reset(void);
#ifdef CONFIG_HEARTBEAT
static void dn_heartbeat(int on);
#endif
static irqreturn_t dn_timer_int(int irq,void *);
static void dn_get_model(char *model);
static const char *apollo_models[] = {
	[APOLLO_DN3000-APOLLO_DN3000] = "DN3000 (Otter)",
	[APOLLO_DN3010-APOLLO_DN3000] = "DN3010 (Otter)",
	[APOLLO_DN3500-APOLLO_DN3000] = "DN3500 (Cougar II)",
	[APOLLO_DN4000-APOLLO_DN3000] = "DN4000 (Mink)",
	[APOLLO_DN4500-APOLLO_DN3000] = "DN4500 (Roadrunner)"
};

int __init apollo_parse_bootinfo(const struct bi_record *record)
{
	int unknown = 0;
	const void *data = record->data;

	switch (be16_to_cpu(record->tag)) {
	case BI_APOLLO_MODEL:
		apollo_model = be32_to_cpup(data);
		break;

	default:
		 unknown=1;
	}

	return unknown;
}

static void __init dn_setup_model(void)
{
	pr_info("Apollo hardware found: [%s]\n",
		apollo_models[apollo_model - APOLLO_DN3000]);

	switch(apollo_model) {
		case APOLLO_UNKNOWN:
			panic("Unknown apollo model");
			break;
		case APOLLO_DN3000:
		case APOLLO_DN3010:
			sio01_physaddr=SAU8_SIO01_PHYSADDR;
			rtc_physaddr=SAU8_RTC_PHYSADDR;
			pica_physaddr=SAU8_PICA;
			picb_physaddr=SAU8_PICB;
			cpuctrl_physaddr=SAU8_CPUCTRL;
			timer_physaddr=SAU8_TIMER;
			break;
		case APOLLO_DN4000:
			sio01_physaddr=SAU7_SIO01_PHYSADDR;
			sio23_physaddr=SAU7_SIO23_PHYSADDR;
			rtc_physaddr=SAU7_RTC_PHYSADDR;
			pica_physaddr=SAU7_PICA;
			picb_physaddr=SAU7_PICB;
			cpuctrl_physaddr=SAU7_CPUCTRL;
			timer_physaddr=SAU7_TIMER;
			break;
		case APOLLO_DN4500:
			panic("Apollo model not yet supported");
			break;
		case APOLLO_DN3500:
			sio01_physaddr=SAU7_SIO01_PHYSADDR;
			sio23_physaddr=SAU7_SIO23_PHYSADDR;
			rtc_physaddr=SAU7_RTC_PHYSADDR;
			pica_physaddr=SAU7_PICA;
			picb_physaddr=SAU7_PICB;
			cpuctrl_physaddr=SAU7_CPUCTRL;
			timer_physaddr=SAU7_TIMER;
			break;
		default:
			panic("Undefined apollo model");
			break;
	}


}

int dn_serial_console_wait_key(struct console *co) {

	while(!(sio01.srb_csrb & 1))
		barrier();
	return sio01.rhrb_thrb;
}

void dn_serial_console_write (struct console *co, const char *str,unsigned int count)
{
   while(count--) {
	if (*str == '\n') {
	sio01.rhrb_thrb = (unsigned char)'\r';
	while (!(sio01.srb_csrb & 0x4))
                ;
	}
    sio01.rhrb_thrb = (unsigned char)*str++;
    while (!(sio01.srb_csrb & 0x4))
            ;
  }
}

void dn_serial_print (const char *str)
{
    while (*str) {
        if (*str == '\n') {
            sio01.rhrb_thrb = (unsigned char)'\r';
            while (!(sio01.srb_csrb & 0x4))
                ;
        }
        sio01.rhrb_thrb = (unsigned char)*str++;
        while (!(sio01.srb_csrb & 0x4))
            ;
    }
}

void __init config_apollo(void)
{
	int i;

	dn_setup_model();

	mach_sched_init=dn_sched_init; /* */
	mach_init_IRQ=dn_init_IRQ;
	arch_gettimeoffset   = dn_gettimeoffset;
	mach_max_dma_address = 0xffffffff;
	mach_hwclk           = dn_dummy_hwclk; /* */
	mach_set_clock_mmss  = dn_dummy_set_clock_mmss; /* */
	mach_reset	     = dn_dummy_reset;  /* */
#ifdef CONFIG_HEARTBEAT
	mach_heartbeat = dn_heartbeat;
#endif
	mach_get_model       = dn_get_model;

	cpuctrl=0xaa00;

	/* clear DMA translation table */
	for(i=0;i<0x400;i++)
		addr_xlat_map[i]=0;

}

irqreturn_t dn_timer_int(int irq, void *dev_id)
{
	irq_handler_t timer_handler = dev_id;

	volatile unsigned char x;

	timer_handler(irq, dev_id);

	x = *(volatile unsigned char *)(apollo_timer + 3);
	x = *(volatile unsigned char *)(apollo_timer + 5);

	return IRQ_HANDLED;
}

void dn_sched_init(irq_handler_t timer_routine)
{
	/* program timer 1 */
	*(volatile unsigned char *)(apollo_timer + 3) = 0x01;
	*(volatile unsigned char *)(apollo_timer + 1) = 0x40;
	*(volatile unsigned char *)(apollo_timer + 5) = 0x09;
	*(volatile unsigned char *)(apollo_timer + 7) = 0xc4;

	/* enable IRQ of PIC B */
	*(volatile unsigned char *)(pica+1)&=(~8);

#if 0
	pr_info("*(0x10803) %02x\n",
		*(volatile unsigned char *)(apollo_timer + 0x3));
	pr_info("*(0x10803) %02x\n",
		*(volatile unsigned char *)(apollo_timer + 0x3));
#endif

	if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine))
		pr_err("Couldn't register timer interrupt\n");
}

u32 dn_gettimeoffset(void)
{
	return 0xdeadbeef;
}

int dn_dummy_hwclk(int op, struct rtc_time *t) {


  if(!op) { /* read */
    t->tm_sec=rtc->second;
    t->tm_min=rtc->minute;
    t->tm_hour=rtc->hours;
    t->tm_mday=rtc->day_of_month;
    t->tm_wday=rtc->day_of_week;
    t->tm_mon=rtc->month;
    t->tm_year=rtc->year;
  } else {
    rtc->second=t->tm_sec;
    rtc->minute=t->tm_min;
    rtc->hours=t->tm_hour;
    rtc->day_of_month=t->tm_mday;
    if(t->tm_wday!=-1)
      rtc->day_of_week=t->tm_wday;
    rtc->month=t->tm_mon;
    rtc->year=t->tm_year;
  }

  return 0;

}

int dn_dummy_set_clock_mmss(unsigned long nowtime)
{
	pr_info("set_clock_mmss\n");
	return 0;
}

void dn_dummy_reset(void) {

  dn_serial_print("The end !\n");

  for(;;);

}

void dn_dummy_waitbut(void) {

  dn_serial_print("waitbut\n");

}

static void dn_get_model(char *model)
{
    strcpy(model, "Apollo ");
    if (apollo_model >= APOLLO_DN3000 && apollo_model <= APOLLO_DN4500)
        strcat(model, apollo_models[apollo_model - APOLLO_DN3000]);
}

#ifdef CONFIG_HEARTBEAT
static int dn_cpuctrl=0xff00;

static void dn_heartbeat(int on) {

	if(on) {
		dn_cpuctrl&=~0x100;
		cpuctrl=dn_cpuctrl;
	}
	else {
		dn_cpuctrl&=~0x100;
		dn_cpuctrl|=0x100;
		cpuctrl=dn_cpuctrl;
	}
}
#endif
Commit	Line	Data
a4df02a2	1	#include <linux/init.h>
1da177e4 LT	2	#include <linux/types.h>
	3	#include <linux/kernel.h>
	4	#include <linux/mm.h>
	5	#include <linux/tty.h>
	6	#include <linux/console.h>
	7	#include <linux/rtc.h>
	8	#include <linux/vt_kern.h>
	9	#include <linux/interrupt.h>
	10
	11	#include <asm/setup.h>
	12	#include <asm/bootinfo.h>
4c3c522b	13	#include <asm/bootinfo-apollo.h>
abe48101	14	#include <asm/byteorder.h>
1da177e4 LT	15	#include <asm/pgtable.h>
	16	#include <asm/apollohw.h>
	17	#include <asm/irq.h>
	18	#include <asm/rtc.h>
	19	#include <asm/machdep.h>
	20
	21	u_long sio01_physaddr;
	22	u_long sio23_physaddr;
	23	u_long rtc_physaddr;
	24	u_long pica_physaddr;
	25	u_long picb_physaddr;
	26	u_long cpuctrl_physaddr;
	27	u_long timer_physaddr;
	28	u_long apollo_model;
	29
40220c1a	30	extern void dn_sched_init(irq_handler_t handler);
1da177e4	31	extern void dn_init_IRQ(void);
c8d5ba18	32	extern u32 dn_gettimeoffset(void);
1da177e4 LT	33	extern int dn_dummy_hwclk(int, struct rtc_time *);
	34	extern int dn_dummy_set_clock_mmss(unsigned long);
	35	extern void dn_dummy_reset(void);
1da177e4 LT	36	#ifdef CONFIG_HEARTBEAT
	37	static void dn_heartbeat(int on);
	38	#endif
2850bc27	39	static irqreturn_t dn_timer_int(int irq,void *);
1da177e4 LT	40	static void dn_get_model(char *model);
	41	static const char *apollo_models[] = {
	42	[APOLLO_DN3000-APOLLO_DN3000] = "DN3000 (Otter)",
	43	[APOLLO_DN3010-APOLLO_DN3000] = "DN3010 (Otter)",
	44	[APOLLO_DN3500-APOLLO_DN3000] = "DN3500 (Cougar II)",
	45	[APOLLO_DN4000-APOLLO_DN3000] = "DN4000 (Mink)",
	46	[APOLLO_DN4500-APOLLO_DN3000] = "DN4500 (Roadrunner)"
	47	};
	48
a4df02a2 GU	49	int __init apollo_parse_bootinfo(const struct bi_record *record)
a4df02a2 GU	50	{
1da177e4	51	int unknown = 0;
abe48101	52	const void *data = record->data;
1da177e4	53
abe48101 GU	54	switch (be16_to_cpu(record->tag)) {
	55	case BI_APOLLO_MODEL:
	56	apollo_model = be32_to_cpup(data);
	57	break;
1da177e4	58
abe48101 GU	59	default:
abe48101 GU	60	unknown=1;
1da177e4 LT	61	}
	62
	63	return unknown;
	64	}
	65
a4df02a2 GU	66	static void __init dn_setup_model(void)
a4df02a2 GU	67	{
ce00aa0a FF	68	pr_info("Apollo hardware found: [%s]\n",
ce00aa0a FF	69	apollo_models[apollo_model - APOLLO_DN3000]);
1da177e4 LT	70
	71	switch(apollo_model) {
	72	case APOLLO_UNKNOWN:
	73	panic("Unknown apollo model");
	74	break;
	75	case APOLLO_DN3000:
	76	case APOLLO_DN3010:
	77	sio01_physaddr=SAU8_SIO01_PHYSADDR;
	78	rtc_physaddr=SAU8_RTC_PHYSADDR;
	79	pica_physaddr=SAU8_PICA;
	80	picb_physaddr=SAU8_PICB;
	81	cpuctrl_physaddr=SAU8_CPUCTRL;
	82	timer_physaddr=SAU8_TIMER;
	83	break;
	84	case APOLLO_DN4000:
	85	sio01_physaddr=SAU7_SIO01_PHYSADDR;
	86	sio23_physaddr=SAU7_SIO23_PHYSADDR;
	87	rtc_physaddr=SAU7_RTC_PHYSADDR;
	88	pica_physaddr=SAU7_PICA;
	89	picb_physaddr=SAU7_PICB;
	90	cpuctrl_physaddr=SAU7_CPUCTRL;
	91	timer_physaddr=SAU7_TIMER;
	92	break;
	93	case APOLLO_DN4500:
	94	panic("Apollo model not yet supported");
	95	break;
	96	case APOLLO_DN3500:
	97	sio01_physaddr=SAU7_SIO01_PHYSADDR;
	98	sio23_physaddr=SAU7_SIO23_PHYSADDR;
	99	rtc_physaddr=SAU7_RTC_PHYSADDR;
	100	pica_physaddr=SAU7_PICA;
	101	picb_physaddr=SAU7_PICB;
	102	cpuctrl_physaddr=SAU7_CPUCTRL;
	103	timer_physaddr=SAU7_TIMER;
	104	break;
	105	default:
	106	panic("Undefined apollo model");
	107	break;
	108	}
	109
	110
	111	}
	112
	113	int dn_serial_console_wait_key(struct console *co) {
	114
	115	while(!(sio01.srb_csrb & 1))
	116	barrier();
	117	return sio01.rhrb_thrb;
	118	}
	119
	120	void dn_serial_console_write (struct console co, const char str,unsigned int count)
	121	{
	122	while(count--) {
	123	if (*str == '\n') {
	124	sio01.rhrb_thrb = (unsigned char)'\r';
	125	while (!(sio01.srb_csrb & 0x4))
	126	;
	127	}
	128	sio01.rhrb_thrb = (unsigned char)*str++;
	129	while (!(sio01.srb_csrb & 0x4))
	130	;
	131	}
	132	}
	133
134	void dn_serial_print (const char *str)
135	{
136	while (*str) {
137	if (*str == '\n') {
138	sio01.rhrb_thrb = (unsigned char)'\r';
139	while (!(sio01.srb_csrb & 0x4))
140	;
141	}
142	sio01.rhrb_thrb = (unsigned char)*str++;
143	while (!(sio01.srb_csrb & 0x4))
144	;
145	}
146	}
147
66a3f820 AV	148	void __init config_apollo(void)
66a3f820 AV	149	{
1da177e4 LT	150	int i;
	151
	152	dn_setup_model();
	153
	154	mach_sched_init=dn_sched_init; /* */
	155	mach_init_IRQ=dn_init_IRQ;
c8d5ba18	156	arch_gettimeoffset = dn_gettimeoffset;
1da177e4 LT	157	mach_max_dma_address = 0xffffffff;
	158	mach_hwclk = dn_dummy_hwclk; /* */
	159	mach_set_clock_mmss = dn_dummy_set_clock_mmss; /* */
1da177e4	160	mach_reset = dn_dummy_reset; /* */
1da177e4 LT	161	#ifdef CONFIG_HEARTBEAT
	162	mach_heartbeat = dn_heartbeat;
	163	#endif
	164	mach_get_model = dn_get_model;
	165
	166	cpuctrl=0xaa00;
	167
	168	/* clear DMA translation table */
	169	for(i=0;i<0x400;i++)
	170	addr_xlat_map[i]=0;
	171
	172	}
	173
2850bc27	174	irqreturn_t dn_timer_int(int irq, void *dev_id)
0aa78106	175	{
40220c1a	176	irq_handler_t timer_handler = dev_id;
1da177e4 LT	177
	178	volatile unsigned char x;
	179
2850bc27	180	timer_handler(irq, dev_id);
1da177e4	181
1525e06e GU	182	x = (volatile unsigned char )(apollo_timer + 3);
1525e06e GU	183	x = (volatile unsigned char )(apollo_timer + 5);
1da177e4 LT	184
	185	return IRQ_HANDLED;
	186	}
	187
40220c1a	188	void dn_sched_init(irq_handler_t timer_routine)
2850bc27	189	{
1da177e4	190	/* program timer 1 */
1525e06e GU	191	(volatile unsigned char )(apollo_timer + 3) = 0x01;
	192	(volatile unsigned char )(apollo_timer + 1) = 0x40;
	193	(volatile unsigned char )(apollo_timer + 5) = 0x09;
	194	(volatile unsigned char )(apollo_timer + 7) = 0xc4;
1da177e4 LT	195
	196	/* enable IRQ of PIC B */
	197	(volatile unsigned char )(pica+1)&=(~8);
	198
	199	#if 0
ce00aa0a FF	200	pr_info("*(0x10803) %02x\n",
	201	(volatile unsigned char )(apollo_timer + 0x3));
	202	pr_info("*(0x10803) %02x\n",
	203	(volatile unsigned char )(apollo_timer + 0x3));
1da177e4 LT	204	#endif
1da177e4 LT	205
84430653 GU	206	if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine))
84430653 GU	207	pr_err("Couldn't register timer interrupt\n");
1da177e4 LT	208	}
1da177e4 LT	209
c8d5ba18 SW	210	u32 dn_gettimeoffset(void)
c8d5ba18 SW	211	{
1da177e4	212	return 0xdeadbeef;
1da177e4 LT	213	}
	214
	215	int dn_dummy_hwclk(int op, struct rtc_time *t) {
	216
	217
	218	if(!op) { /* read */
	219	t->tm_sec=rtc->second;
	220	t->tm_min=rtc->minute;
	221	t->tm_hour=rtc->hours;
	222	t->tm_mday=rtc->day_of_month;
	223	t->tm_wday=rtc->day_of_week;
	224	t->tm_mon=rtc->month;
	225	t->tm_year=rtc->year;
	226	} else {
	227	rtc->second=t->tm_sec;
	228	rtc->minute=t->tm_min;
	229	rtc->hours=t->tm_hour;
	230	rtc->day_of_month=t->tm_mday;
	231	if(t->tm_wday!=-1)
	232	rtc->day_of_week=t->tm_wday;
	233	rtc->month=t->tm_mon;
	234	rtc->year=t->tm_year;
	235	}
	236
	237	return 0;
	238
	239	}
	240
ce00aa0a FF	241	int dn_dummy_set_clock_mmss(unsigned long nowtime)
	242	{
	243	pr_info("set_clock_mmss\n");
	244	return 0;
1da177e4 LT	245	}
	246
	247	void dn_dummy_reset(void) {
	248
	249	dn_serial_print("The end !\n");
	250
	251	for(;;);
	252
	253	}
	254
	255	void dn_dummy_waitbut(void) {
	256
	257	dn_serial_print("waitbut\n");
	258
	259	}
	260
	261	static void dn_get_model(char *model)
	262	{
	263	strcpy(model, "Apollo ");
	264	if (apollo_model >= APOLLO_DN3000 && apollo_model <= APOLLO_DN4500)
	265	strcat(model, apollo_models[apollo_model - APOLLO_DN3000]);
	266	}
	267
	268	#ifdef CONFIG_HEARTBEAT
	269	static int dn_cpuctrl=0xff00;
	270
	271	static void dn_heartbeat(int on) {
	272
	273	if(on) {
	274	dn_cpuctrl&=~0x100;
	275	cpuctrl=dn_cpuctrl;
	276	}
	277	else {
	278	dn_cpuctrl&=~0x100;
	279	dn_cpuctrl\|=0x100;
	280	cpuctrl=dn_cpuctrl;
	281	}
	282	}
	283	#endif
	284